Imtisal Akhtar

By Imtisal Akhtar, Malik Abdul Rehman and Yongho Seo

Three-dimensional integration and stacking of semiconductor devices with high density, its compactness, miniaturization and vertical 3D stacking of nanoscale devices highlighted many challenging problems in the 3D parameter’s such as CD (critical dimension) measurement, depth measurement of via holes, internal morphology of through silicon via (TSV), etc. Current challenge in the high-density 3D semiconductor devices is to measure the depth of through silicon via (TSV) without destructing the sample; TSVs are used in 3D stacking devices to connect the wafers stacked vertically to reduce the wiring delay, power dissipation, and of course, the form factor in the integration system. Special probes and algorithms have been designed to measure 3D parameters like wall roughness, sidewall angle, but these are only limited to deep trench-like structures and cannot be applied to structures like via holes and protrusions. To address these problems, we have proposed an algorithm based nondestructive 3D Atomic Force Microscopy (AFM). Using the high aspect ratio (5, 10, 20, 25) multiwall carbon nanotubes (MWCNTs) AFM probe, the depth of holes up to 1 micron is faithfully obtained. In addition to this, internal topography, side walls, and location of via holes are obtained faithfully. This atomic force microscopy technique enables to 3D scan the features (of any shape) present above and below the surface.

Part of the book: 21st Century Surface Science