Kiyofumi Tanaka
Dr. Kiyofumi Tanaka, Associate Professor at Japan Advanced Institute of Science and Technology is a researcher with substantial experience in computer architecture, operating systems, and real-time embedded systems fields. He was born in Japan, in 1971. He obtained a B.S., M.S., and Ph.D. from the University of Tokyo. He is working on two major research topics, high-performance/energy-aware processor architecture including efficient hierarchical cache memories, and real-time embedded systems including fast response mechanisms and practical real-time embedded operating systems. In his research career, he developed a parallel computer with hardware-controlled distributed shared memories and a highly functional interconnection network, real-time embedded RISC processors with multi-contexts and various mechanisms for fast interrupt response, and a real-time embedded operating system with adaptive task scheduling ability.