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The protection of the wind turbine generator (WTG) required discrimination between internal and parallel WTG faults. Furthermore, it must discriminate the fault of its feeder line and parallel feeder line. This chapter describes the protection of wind turbine generators based on fault current and voltage analysis, which can identify the instantaneous operation, delay operation, or immune operation. A proposed Algorithm based digital relay is presented to provide all the different fault detection in a single unit suitable for internal and external fault protection of wind turbine generator. The main challenge to this scheme is that fault resistance may wrongly operate the scheme in some rare conditions. The phase angle of negative sequence current components determines the type of fault. The algorithm used negative sequence current and voltage to positive sequence current and voltage ratio, which is less than the set value in case of external fault. The fault seniors have been explained using simulation results on the wind turbine generator system modeled in a software environment.
Ganpat University, U.V. Patel College of Engineering, Mehsana, India
*Address all correspondence to: jpd.fetr@gmail.com
1. Introduction
The parts of the wind turbine generator are shown in Figure 1. Blades are connected to this rotor hub. By rotating the motor shaft angle, one can turn the blade’s direction, resulting in a change in mechanical power. This rotational mechanical energy rotates the rotor, and by using a gearbox, speed can be changed. By changing the speed, torque will be changed. The frequency of the generated voltage depends on the speed and number of poles. The variable frequency is converted into the constant frequency using a power converter. At this stage, two converters are used. One is an AC-DC converter, and the second is a DC-AC converter called a back-to-back converter. This is often called a gear-less wind turbine generator [2]. As electrical technology is very advanced, mechanical energy to electrical energy can be converted with different machines. Based on this machine used, the wind turbine generators are classified. The most common challenges for the wind turbine are as follows: (1) highly variable wind power injection into the grid, (2) increased penetration of wind energy, (3) Electrically weak distribution network, and (4) heavy reactive power burden by Induction generator (IG).
Figure 1.
Parts of wind turbine generator adapted from [1].
The classification of wind energy conversion system (WECS) is shown in Figure 2. Squirrel cage induction generators (SCIG) are a traditional method, but one cannot get maximum power at different wind speeds. The SCIG is generally known as a fixed-speed wind turbine. At variable rates, wind turbine generators are two types which are gear-less and with gear. Gear-less wind turbine generators may be running at a slower speed, but one can change the number of poles. The wound rotor synchronous generator (WRSG) and permanent magnet synchronous generator (PMSG) is the gear-less wind turbine. The wound rotor synchronous generator (WRSG) and permanent magnet synchronous generator (PMSG) maybe with gear also [3]. Doubly fed induction generator (DFIG), SCIG, wound rotor induction generator (WRIG) with variable rotor resistance also come under the gear category.
The SCIG has the following main parts: (1) Gear Box, (2) cage induction generator, (3) soft starter, and (4) Capacitor for power factor compensation.
The SCIG is a very simple structure of WTG used in the system. SCIG is directly connected to the grid using a starter and transformer. A soft starter is available in starting only to limit high inrush current. This is the most widely used structure worldwide due to less maintenance and simple design. The main disadvantage is that full power cannot be extracted from the grid. The SCIG needs high reactive power, which the capacitor bank locally supplies, as shown in Figure 3. The machine is run above synchronous speed using pitch control.
A wind farm composed of six 1.5 MW wind turbines is connected to a 25 kV distribution system that exports electricity to a 120 kV network via a 25 km long feeder from a 25 kV bus 4. Three 1.5 MW wind turbines pairs simulate the 9-MW wind farm. Wind turbines use squirrel cage induction generators (SCIG) [5]. Figure 4 shows the system considered for protection in which three wind turbine generators are connected to the grid.
Figure 4.
9 MW—Wind farm connected to the grid.
The stator winding is connected directly to the 60 Hz grid, and a controllable-pitch windmill drives the rotor [6, 7]. The pitch angle is controlled to limit the generator’s output power to its nominal value for winds exceeding the little velocity (9 m/s). A protection system is installed at each wind generator from W1 to W3, which measures voltage, current, and speed. Reactive power absorbed by the IGs is partly compensated by capacitor banks connected at each wind turbine low voltage bus [8, 9, 10]. The rest of the reactive power required to maintain the 25-kV voltage at bus B4 close to 1 pu is provided by a 3-Mvar STATCOM with a 3% droop setting. Modeling of Wind Turbine Generator is carried in MATLAB Software [11]. The data of wind turbine generator modeling is shown in Appendix A.
The digital protection system installed on W1 to W3 consist of following protections covers in single digital relay for wind turbine generator [12].
Instantaneous AC overcurrent
Positive-sequence AC overcurrent
Unbalance AC current
Positive-sequence under voltage
Positive-sequence under voltage
Negative-sequence unbalanced voltage
Zero-sequence unbalanced voltage
The desired protection for relay 1 at W1, relay 2 at W2, and relay 3 at W3 are shown in Table 1 for different fault locations.
Fault position
Relay 1 operation
Relay 2 operation
Relay 3 operation
F1
Instantaneous
Non-operation
Non-operation
F2
Non-operation
Instantaneous
Non-operation
F3
Non-operation
Non-operation
Instantaneous
F4
Instantaneous
Instantaneous
Instantaneous
F5
Instantaneous
Instantaneous
Instantaneous
F6
Instantaneous
Instantaneous
Instantaneous
F7
Delayed
Delayed
Delayed
Table 1.
Desired operation of digital relay R1, R2, and R3 at W1, W2, and W3 respectively.
4.1 Protection algorithm
The relay R1, R2, and R3 are located at Bus 1, Bus 2, and Bus 3. The algorithm is explained in this section by considering Relay R1 to protect W1 against internal faults F1. For faults F4, F5 and F6 at POC at Bus 4, R1 reacts instantaneously as both these three faults impact the W1 directly. On the other hand, the relay R1 remains stable for F2, F3 and F7 and maybe operate as a backup to the primary relay addressing these faults. Here, F2 and F3 are parallel feeder faults considered external faults for F1. F7 is a external fault in the grid system. The protection algorithm for such desired operation as per Table 1 is shown in Figure 5. As per the Algorithm, relay R1 measured three-phase voltage and current Vabc and Iabc with the help of PT and CT in the beginning [13]. Using the symmetrical component method, Positive sequence, negative sequence, and zero sequence voltage and current are V1, V2, V0 and I1, I2, I0 respectively have been calculated. Based on the different conditions as shown in Figure 5, the tripping commands have been sent to the circuit breaker of W1. The next section will describe how the Algorithm detects LG, LL, LLL, LLLG faults for internal and external fault conditions.
5. Different internal and external fault detection by digital relay
5.1 LG faults
LG faults have been applied at F1 to F7 locations as internal and external faults. Considered F1 fault as LG fault and used at 15 s of simulation time for 0.3 s duration which is an internal fault for W1. in this case-1, the voltages are unbalanced significantly which has V0/V1 ratio found 0.985pu which is greater than a set value and as per algorithm the relay issue tripping after 0.001 s which instantaneous. It is important to note that in this case, relay R2 at W2 and R3 at W3 are not affected and remain immune. The tripping coordination of R1 to R3 for this case-1 is shown in Figure 6. Figure 7 shows that positive sequence and zero sequences are present significantly during the fault, and the ratio of V0/V1 exceeds the set value. Similarly, LG fault has been applied at the F6 location. In this case, the fault is at POC, which required the operation of all the relays operated at 0.2 s. Table 2 shows the other faults and measurement of current and voltage sequence components during the faults at bus 1.
Figure 6.
Tripping of at W1, W2, and W3 while LG fault near bus 1.
Figure 7.
Positive, negative, and zero sequence voltage variation during internal fault at W1.
Internal fault type
Fault location
Max (Ia,Ib,Ic) (p.u)
I1 (p.u)
I2/I1 (p.u)
V1 (p.u)
V2/V1 (p.u)
V0/V1 (p.u)
LG
Bus 1
R1:0 R2: 0.977 R3:0.979
R1:0 R2:0.983 R3:0.9846
R1:0 R2:0 R3:0
R1:0.998 R2:0.979 R3:0.979
R1:0 R2:0 R3:0
R1:0.985 R2:0.0001 R3:0.0001
LL
Bus 1
R1: 0 R2:0 R3:0
R1: 0 R2:0 R3:0
R1:0.037 R2:0.022 R3:0.022
R1:0.821 R2:0.9015 R3:0.9015
R1:0.458 R2:0.2568 R3:0.2568
R1:0 R2:0 R3:0
LLG
Bus 1
R1:0 R2:0 R3:0
R1:0 R2:0 R3:0
R1:0.037 R2:0.022 R3:0.022
R1:0.0821 R2:0.9015 R3:0.09015
R1:0.458 R2:0.2568 R3:0.2568
R1:0.662 R2:0 R3:0
LLL
Bus 1
R1:0 R2:0 R3:0
R1:0 R2:0 R3:0
R1:0 R2:0 R3:
R1:0.738 R2:0.738 R3:0.738
R1:0 R2:0 R3:0
R1:0 R2:0 R3:0
LLLG
Bus 1
R1:0 R2:0 R3:0
R1:0 R2:0 R3:0
R1:0 R2:0 R3:0
R1:0.665 R2:0.738 R3:0.738
R1:0 R2:0 R3:0
R1:0 R2:0 R3:0
Table 2.
Internal fault on feeder 1, 2, and 3 near SCIG.
5.2 LL faults
As internal and external faults, LL faults have been applied at F1 to F7 locations. Considered F2 fault as LL fault and used at 15 s of simulation time for 0.3 s duration which is an internal fault for W2. In this case-2, the positive sequence voltages less than set value and as per the algorithm the relay issue tripping after 0.001 s. It is important to note that in this case, relay R1 at W1 and R3 at W3 are not affected and remain immune. Additionally, It provides backup protection after 0.15 s and 0.14 s by R1 and R3 to R2. The V1 and V2/V1 variations are shown in Table 2 during the LL fault at bus 2.
5.3 LLG faults
As internal and external faults, LLG faults have been applied at F1 to F7 locations. Considered F3 fault as LLG fault and used at 15 s of simulation time for 0.3 s duration which is an internal fault for W3. in this case-3, the positive sequence voltages less than set value and as per algorithm the relay issue tripping after 0.001 s. It is important to note that in this case, relay R1 at W1 and R3 at W3 are not affected and remain immune. Additionally, It provides backup protection after 0.15 s and 0.14 s by R1 and R2 to R3.
5.4 LLLG faults
LLLG faults have been applied at F1 to F7 locations as internal and external faults. Considered F4 fault as LLLG fault and used at 15 s of simulation time for 0.3 s duration which is the internal fault for W1. in this case-4, the positive sequence voltages less than set value and as per algorithm the relay issue tripping after 0.001 s. In this case, relay R2 at W2 and R3 at W3 is also instantaneous as the fault is on the point of Common Coupling (POC). Table 3 shows that I2/I1 and V1 change significantly during fault at bus 4.
Fault type
Fault location
Max (Ia,Ib,Ic) (p.u)
I1 (p.u)
I2/I1 (p.u)
V1 (p.u)
V2/V1 (p.u)
V0/V1 (p.u)
LG
Bus 4
R1:0 R2:0 R3:0
R1:0 R2:0 R3:0
R1:0.02 R2:0.02 R3:0.02
R1:0.88 R2:0.88 R3:0.88
R1:0.24 R2:0.24 R3:0.24
R1:0.76 R2:0.76 R3:0.76
LL
Bus 4
R1:0 R2:0 R3:0
R1:0 R2:0 R3:0
R1:0.05 R2:0.05 R3:0.05
R1:0.545 R2:0.545 R3:0.545
R1:1.0 R2:1.0 R3:1.0
R1:0 R2:0 R3:0
LLG
Bus 4
R1:0 R2:0 R3:0
R1:0 R2:0 R3:0
R1:0.046 R2:0.046 R3:0.046
R1:0.473 R2:0.473 R3:0.473
R1:1.0 R2:1.0 R3:1.0
R1:0.994 R2:0.994 R3:0.994
LLL
Bus 4
R1:0 R2:0 R3:0
R1:0 R2:0 R3:0
R1:0 R2:0 R3:0
R1:0.0007 R2:0.0007 R3:0.0007
R1:0 R2:0 R3:0
R1:0 R2:0 R3:0
LLLG
Bus 4
R1:0 R2:0 R3:0
R1:0 R2:0 R3:0
R1:0 R2:0 R3:0
R1:0.0007 R2:0.0007 R3:0.0007
R1:0 R2:0 R3:0
R1:0 R2:0 R3:0
Table 3.
Internal fault on feeder 1, 2, and 3 near POC.
5.5 LLL faults
LLL faults have been applied at F1 to F7 locations as internal and external faults. Considered F5 fault as LLL fault and used at 15 s of simulation time for 0.3 s duration which is the internal fault for W2. In this case-5, the positive sequence voltages less than set value and as per algorithm the relay issue tripping after 0.001 s. It is important to note that in this case, relay R1 at W1 and R3 at W3 is also instantaneous as the fault is on the point of Common Coupling (POC).
5.6 External fault
When LG fault is applied on the F7 location, which is in the grid and considered an external fault to the wind farm, the ratio of negative sequence voltage to positive sequence voltage and negative sequence current to positive sequence current is less than the set value [14]. So, as per the algorithm, relays R1 to R3 issued delayed tripping at 0.21 s after the fault instant. For all the other external faults, the variation of V1, V2/V1, and I2/I1 are shown in Table 4.
The main challenge in this protection scheme is that the relays R1 to R3 are affected by fault resistance while power swing occurs near them, and they cannot detect it. It is important to note that power swing blocking and out-of-step tripping functions are available to handle these challenges in the existing system [15].
The results of Tables 2–4 clearly show the quantity such as instantaneous overload current (Ia, Ib, Ic), I1, I2/I1, V1, V2/V1, and V0/V1 changes during different faults differently. This variation is used in the digital relay to identify internal and external feeder faults. The relays at W1 to W3 remain immune due to correct settings during grid faults. In this protection scheme, instantaneous overload current (Ia, Ib, Ic) provides instantaneous AC Over current, I1 provides AC Overcurrent (positive-sequence), I2/I1 provides Ac Current unbalance, V1 provides AC over and under-voltage (positive sequence), V2/V1 provides AC unbalance voltage (negative sequence), V0/V1 provides C unbalance voltage (zero sequences) protection to W1 to W3 against internal and external feeder faults correctly.
F1 from F2 and F3 can be detected using positive sequence voltage because the fault current of F2 and F3 can be seen at W1 via step-up transformer and feeder, due to which current is reduced compared to F1 in case of LG fault. While W2 sees F2 directly and W3 sees F3 directly, that is not affected F1, which is a parallel feeder fault. In the case of external fault, zero sequences cannot be used as they are trapped in the winding. So algorithm used negative sequence current and voltage to positive sequence current and voltage ratio, which is less than the set value in case of external fault. So, R1 to R3 does not operate. The proposed Algorithm based digital relay provides all the different fault detection in a single unit suitable for internal and external fault protection of WTG. The main challenge to this scheme is that fault resistance may mal-operate the scheme in some rare events.
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