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A VLSI Architecture for Output Probability and Likelihood Score Computations of HMM-Based Recognition Systems

Written By

Kazuhiro Nakamura, Ryo Shimazaki, Masatoshi Yamamoto, Kazuyoshi Takagi and Naofumi Takagi

Submitted: 15 June 2011 Published: 16 March 2012

DOI: 10.5772/38223

From the Edited Volume

Embedded Systems - High Performance Systems, Applications and Projects

Edited by Kiyofumi Tanaka

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Written By

Kazuhiro Nakamura, Ryo Shimazaki, Masatoshi Yamamoto, Kazuyoshi Takagi and Naofumi Takagi

Submitted: 15 June 2011 Published: 16 March 2012