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Characterization and Application of Thermoelectric Nanowires

Written By

Friedemann Voelklein, Matthias C Schmitt, Heiko Reith and Daniel Huzel

Submitted: 04 November 2010 Published: 18 July 2011

DOI: 10.5772/19656

From the Edited Volume

Nanowires - Implementations and Applications

Edited by Abbass Hashim

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1. Introduction

In recent years, numerous studies on the electrical transport properties of semiconducting and metallic nanostructures have been performed because of their possible applications in future miniaturized devices, such as thermoelectric sensors or generators. In particular, the electrical transport properties of quasi one-dimensional structures such as nanowires were investigated intensively (Dresselhaus et al., 2003; Cornelius et al., 2006; Toimil-Molares et al., 2003). When the structure size is comparable to the electronic mean free path, finite-size effects and quantum-size effects are expected to occur (Fuchs, 1937; Sondheimer, 1952; Mayadas & Shatzkes, 1970). These effects are anticipated to affect also the thermal transport mechanisms. Besides a decrease of the thermal conductivity λ, theories predict an increase of the Seebeck coefficient S and the thermoelectric efficiency z = S²σ /λ, where σ denotes the electrical conductivity, when reducing the dimensionality of the specimen (e.g. by decreasing the diameter of nanowires) (Lin et al., 2000; Zou & Balandin, 2001; Dresselhaus & Heremans, 2006). Therefore, nanowires are promising candidates for new thermoelectric devices (TED) with significantly increased thermoelectric figure of merit.

Experimental verification of these predicted effects requires the simultaneous measurement of the above mentioned transport coefficients (S, σ, λ) on single nanowires. In contrast to the extensive studies on electrical transport, only few experimental investigations of thermal conductivity and Seebeck coefficient of nanowires have been reported. For thermal conductivity experiments any thermal bypass has to be avoided, i.e., these studies must not be performed on single wires lying on a substrate but on individual suspended needles. To measure the Seebeck effect accurately, a temperature difference along the nanowire axis (between the electrical contacts) of a few Kelvin has to be established. In the case of a single nanowire contacted between two electrodes placed 10 μm apart, the temperature gradient along the wire amounts 105 K/m. Furthermore, the thermoelectric voltage U caused by this temperature gradient and the temperatures at the nanowire contacts (i.e. at two positions separated by only few micron) have to be measured precisely. Thus, sophisticated micro-structured devices are required for the determination of the thermoelectric transport coefficients of individual nanostructures (Shi et al., 2003; Boukai et al., 2006). Measurements of S, σ and λ have been performed on assemblies of many identical nanowires of bismuth (Boukai et al., 2006) and silicon (Boukai et al., 2008) and on individual silicon nanowires (Li et al., 2003; Hochbaum et al., 2008).

Here, we present new methods and microchips for the measurement of electrical and thermal conductivity and Seebeck coefficient on individual nanowires prepared by two different methods: (i) wires electrochemically deposited in etched ion-track membranes (Toimil-Molares et al., 2001; Cornelius et al., 2005; Karim et al., 2006) and (ii) nanostructures fabricated by focused electron/ion beam induced deposition (FEBID/FIBID). In addition, we discuss finite element method (FEM) simulations performed to optimize the design and the fabrication process of a z-microchip that can be applied for the complete characterization of the thermoelectric efficiency of an individual nanowire. In addition, we have investigated the thermoelectric parameters of nanowire arrays embedded in 30 μm thick etched ion-track polymer foils. Measurements of the cross-plane thermal conductivity of template-embedded bismuth nanowires using a steady-state method are presented.


2. Fabrication of thermoelectric nanostructures by ion-track technology and FEBID/FIBID

2.1. Fabrication of nanowires by ion-track technology

The steps of nanowire fabrication by electrodeposition and ion-track technology are schematically depicted in figure 1. In a first step, a 30-60 μm thick polycarbonate foil is irradiated with a high-energetic ion beam (typical ions: Au, Pb, U; E ~ GeV) at the UNILAC accelerator of GSI. Each ion generates a damage-zone called latent track along its trajectory.

Figure 1.

Schematic of the nanowire fabrication process by electrodeposition and ion-track technology.

In a second step, the tracks are selectively etched in a 6M NaOH solution at 50 C, leading to the formation of nearly cylindrical nanochannels, whose diameter d increases linearly with the etching time. After rinsing the membrane in distilled water, a Au metal layer is deposited on one membrane surface. This layer acts as cathode during the electrochemical deposition of Bi, Bi1−xSbx (0 < x < 1) and Bi2Te3 nanowires (Cornelius, 2005; Picht, 2009). The length l of the nanowires is limited by the thickness of the membrane (60 μm) and is controlled by the duration of the deposition process. Free-standing nanowires are created by dissolving the matrix in an organic solvent. Subsequently, the nanowires are detached from the back electrode by ultra-sonication, and nanowires with lengths ranging from a few to 60 µm are available in the suspension. The wires are then placed onto a substrate of choice (e.g. a Si wafer with a SiO2 film) by applying few drops of the solvent containing the needles. The solvent evaporates within a few minutes leaving behind randomly distributed wires. By controlling the fabrication parameters, polycrystalline as well as single-crystalline wires can be fabricated (Toimil-Molares et al., 2001; Cornelius et al., 2005; Karim et al., 2006). Figure 2 presents a representative scanning electron microscopy (SEM) image, displaying Pt nanowires with smooth contours and narrow diameter distribution.

Figure 2.

SEM image of Pt nanowires after dissolving the polycarbonate foil and detachment from the back electrode.

2.2. Focused Electron/Ion Beam Induced Deposition

Focused electron/ion beam induced deposition (FEBID/FIBID) is a direct beam writing technique for the realization of nano- and microstructures. The schematic FEBID process is represented in figure 3. Precursor molecules are emitted from a gas injection system close to the focal point of an electron beam. The molecules are dissociated by primary, backscattered and secondary electrons. With a predefined pattern, the primary electron beam can be scanned over the substrate surface. Relevant process parameters for this scanning process are the distance between successive dwell points of the electron beam (pitch) and the time period during which the electron beam is held at each dwell point (dwell time). Typical pitches vary between 10 to 100 nm. The required dwell times depend on the precursor gas and the substrate material. Detailed recent reviews concerning FEBID/FIBID and related techniques are given in (Utke et al., 2008; Huth, 2011). By proper selection of the precursor gas and the process parameters, different functionalities of the resulting deposits can be obtained. FEBID-generated nano-granular films are very promising substances regarding the optimization of thermoelectric material parameters due to nano-dimensions. Quite generally, nano-granular metals can be considered as tunable model systems for studying the interplay of electronic correlation effects, quantum size effects and disorder. Particularly interesting are nano-granular FEBID/FIBID structures for which an insulator-to-metal transition is observed as a function of the inter-grain coupling strength. Valuable information about the electronic properties close to this transition can be obtained from Seebeck effect measurements.

Figure 3.

Schematic representation of the FEBID process: The adsorbed precursor molecules (orange spheres) are dissociated by electron impact (red spheres) and a permanent deposit (blue spheres) is formed in the focal area of the electron beam. The green lines indicate exemplary trajectories of electrons leaving the excitation volume.


3. Electrical conductivity

3.1. Fabrication of electrical contacts

The thermoelectric characterization of nanowires and FEBID nanostructures requires their integration into specific microchips. In this nano-micro-integration process it is very important to fabricate reliable electrical contacts that do not influence the thermoelectric properties of the nanostructures (e.g. by diffusion processes). To obtain electrical contacts and measuring devices for nanostructures such as nanowires or FEBID/FIBID lines two different approaches are commonly used:

  1. The nanostructure is (randomly) placed on a substrate and the measuring device is realized around the nanostructure by micropatterning using surface micromachining technologies. This approach includes the direct formation of electrical connections to the nanostructures as part of the construction of the measuring device.

  2. Specific microchips are produced (preferably) by standard semiconductor batch-process fabrication and the nanostructures are subsequently placed onto the chips by particular handling and deposition techniques. Highly resistive electrical contacts to the pre-fabricated microchips have to be improved by additional methods.

The first approach has the advantage of requiring no equipment or techniques for handling and micro-positioning of the nanostructure. On the other hand, due to the small dimension of the samples, the patterning of the measuring device has to be performed using local microscopic lithography which makes the fabrication time-consuming (Voelklein et al., 2009a, 2009b, 2010). The second approach, applying separately batch-fabricated chips and afterwards putting the nanostructures onto these devices, is associated with challenging handling and positioning procedures. One method is to place droplets of a solution containing nanowires (see section 2.1) onto the device and to repeat the procedure until one nanowire is (randomly) placed at the right position (Hochbaum et al., 2008; Shi et al., 2005; Mavrokefalos et al., 2009). Another method is the direct positioning of the sample onto the microchip using a nano-manipulator (Hochbaum et al. 2008, Shi et al., 2003). After such placing procedures usually the electrical contacts of the nanowire to the electrical connections (e.g. thin film contact pads) has to be improved by local deposition of FEBID/FIBID layers at the overlap of nanowire and contact pads.

3.1.1. Lift-off process

Electrical connections to individual nanowires fabricated according to approach i) can be realized by the lift-off technique. The preparation sequence for electrical contacts on both ends of a single nanowire is depicted in figure 4.

Figure 4.

left: Preparation scheme of electrical contact pads for a single nanowire performed with local microscopic photolithographic exposure of photoresist, resist development, thin-film deposition, and lift-off technique; right: SEM image of electrical contact layers above a 20 μm long suspended nanowire on a Si/SiO2 substrate.

Nanowires are placed randomly on a (100)-oriented silicon wafer with an insulating (300 nm thick) SiO2 layer on top. After spin-coating the photoresist on the SiO2 surface and inspection of the nanowire positions, the resist is locally exposed to UV light at both ends of the nanowire using a photolithographic micro-mask. The exposed photoresist is then developed and removed at both ends, whereas the central area of the nanowire is still protected. Next, a thin metal contact film is deposited onto the wafer by sputtering. Finally, this film is structured by lift-off technique forming contact pads at both ends of the selected nanowire. This contacting procedure is used for all Seebeck coefficient, electrical and thermal conductivity measurements. To determine the thermal conductivity, suspended nanowires have to be prepared to avoid any thermal bypass through the substrate. Therefore, after contact preparation the SiO2 layer below the nanowire is removed by reactive ion etching (RIE). Due to optimized process parameters (etching gas, pressure, bias voltage) the usually anisotropic RIE process is transformed in a partially isotropic one, removing the SiO2 layer below the nanowire within a few minutes. During the etching process, the metal contact films serve as etching mask layers, and the SiO2 film is removed exclusively in the gap area.

Long-term stability is a crucial criterion of thin film contacts on nanostructures, especially for their applications at elevated temperatures. Therefore thermal cycling tests have been performed on various film materials to study the stability of the contacts regarding their ohmic behavior. Contacts consisting of 20 nm Ti (diffusion barrier) and 150 nm Au film have shown best long-term stability without degradation due to diffusion effects.

3.1.2 Direct writing of FEBID/FIBID nanostructures on measuring devices

Figure 5 represents an example for the deposition of nanostructures on a pre-fabricated microchip according to approach ii). Here, nano-granular FEBID layers are placed by direct writing between prepared Au contact films of a sensor chip.

Figure 5.

Nano-granular sensor element (left-to-right structure) and reference element (top-to-bottom structure) prepared by FEBID direct writing between Au contact films using the precursor MeCpPt(Me)3

A very important benefit of such FEBID techniques arises from the fact that nano-granular structures can be deposited at arbitrary positions of a planar or 3-dimensional measuring device or also of a specific application device. For example, in figure 5 the nano-granular layer is deposited on a 10 µm thin cantilever in order to investigate its resistivity as function of induced strain.

3.2. Four-point-probe measurement

Contact resistances are known to have considerable influence on the measuring results. The effect of the contact resistances on nanostructures has been investigated and eliminated by using a 4-point-probe arrangement, fabricated as previously described using the lift-off technique. The structure of the used lithographic micro-mask for 4-point measurements is presented in figure 6. The occurrence of contact resistances can be deduced by comparing the results of 2-point-probe and 4-point-probe resistivity measurements. To obtain the 2-point-probe resistivity ρ2p a current flow I and the corresponding voltage drop U2p between the contacts 1 and 4 are measured. In case of negligible contact resistance the resistivity ρ2p, calculated according to

ρ 2 p = U 2 p A I ( l 12 + l 23 + l 34 ) E1

represents the true resistivity of the nanowire, where A indicates its cross section area and the l ij denote the lengths of the wire segments between the contact probes. For the determination of the 4-point-probe resistivity ρ4p the same current flow I is supplied using contacts 1 and 4, whereas the potential difference is measured between contacts 2 and 3. Without any contact resistance, the difference between the 2-point-probe and 4-point-probe resistivity (ρ2p - ρ4p), related to ρ2p

ρ 2 p ρ 4 p ρ 2 p = 1 U 4 p ( l 12 + l 23 + l 34 ) U 2 p l 23 E2

should be zero.

Figure 6.

Ti/Au film 4-point-probe contact structure (bright area). The gaps between contact probes (marked with 1 to 4) are 5 µm.

Figure 7.

SEM image of a Bi2Te3 nanowire with a diameter of 180 nm contacted in a 4-point-probe structure.

Figure 7 shows a SEM image of a Bi2Te3 nanowire contacted by a 4-point-probe arrangement. Its dimensions (length, diameter) are determined by evaluation of high-resolution SEM pictures. Table 1 lists the lengths of the nanowire segments between the contact probes and the corresponding voltage drops.

l12 [µm] l23 [µm] l34 [µm] U2p [mV] U4p [mV]
2.73 3.87 3.55 12.7 4.7

Table 1.

Lengths of segments of a 180 nm diameter Bi2Te3 nanowire between contact probes and voltage drops U2p in 2-point-probe and U4p in 4-point-probe arrangement for I=0.88 μA

The relative deviation between 2-point-probe and 4-point-probe resistivity

ρ 2 p ρ 4 p ρ 2 p = 1 U 4 p ( l 12 + l 23 + l 34 ) U 2 p l 23 E3
< 0.03(3)

of this nanowire is smaller than 3% and indicates that the effect of contact resistances can be neglected for our preparation technique. This may be attributed to sputter deposition of the adhesion/barrier layer (Ti) before the deposition (thermal evaporation) of the conducting Au film, since sputtered particles have a very high energy (about 100 eV) and form very intimate bindings with the nanowire surface atoms.

In addition, conventional 2-point-probe contacts can be transferred to 4-point-probe arrangements using FEBID for direct writing of potential contacts as indicated in figure 8. Furthermore, the additional application of a focused ion beam (FIB) allows controlled doping of potential barriers (Schottky barriers) which may appear between metal-semiconductor junctions. Therefore FIB can be used for reducing contact resistances, where the junction is doped with Ga until a metallic behavior is achieved (Cronin et al., 2002). In general, it is necessary to verify 2-point-probe measurement results with appropriated 4-point-probe measurements.

Figure 8.

SEM image of a 30 μm long Pt nanowire contacted in a 4-point-probe arrangement with the interior potential contacts written by FEBID (see labels in the picture for details).

3.3. Current-voltage characteristics

It is known that potential barriers (Schottky barriers) may occur at metal-semiconductor junctions. Current-voltage characteristics measured on single nanowires reveal the metal-like or semiconductor-like character of the contacts. Thus, a metal-like (ohmic) contact leads to a linear current-voltage curve, as shown in figure 9 for the Bi2Te3 nanowire with negligible contact resistance at room temperature (see equation (3)).

Figure 9.

Current-voltage characteristic of a Bi2Te3 nanowire (l = 18.4 µm, d = 180 nm) measured at room temperature

Figure 10 displays the current-voltage characteristics of an individual Bi0.9Sb0.1 nanowire contacted with Ti/Au pads measured at both room temperature and 100 K. The observed non-linear current-voltage characteristics indicate a larger barrier height at 100 K compared to room temperature. Since the Schottky barrier height is increased by decreasing carrier concentration in the semiconducting material of a metal-semiconductor contact, the current-voltage behavior can be interpreted by the semiconducting state of the Bi0.9Sb0.1 nanowire. Compared to the situation at 100 K the nanowire carrier concentration is increased at room temperature. Thus, the influence of the Schottky barrier decreases and the current-voltage characteristic becomes almost linear.

Figure 10.

Current-voltage characteristics of a Bi0.9Sb0.1 nanowire (l = 20 µm, d = 200 nm) measured at room temperature (empty triangles) and at 100 K (filled triangles)

3.4. Electrical conductivity and temperature coefficient of resistance

Since we showed that the contact resistance of the system (Au/Ti)/Bi2Te3 nanowire/(Au/Ti) was negligible (see section 3.2), Bi2Te3 nanowires displaying a linear current-voltage characteristic have been also measured in a 2-point-probe arrangement in the temperature range between 4K – 300 K. In figure 11 the resistance and electrical resistivity of a Bi2Te3 nanowire with diameter 180 nm and length 18.4 µm is presented. The geometrical data were obtained by SEM measurements.

Figure 11.

Resistance/resistivity as function of temperature of a Bi2Te3 nanowire (d = 180 nm,l = 18.4 µm)

The measurements of the resistance as function of temperature were performed in a 4He cryostat. A very small electrical power of 10−8 W was dissipated in the nanowire during this measurement by appropriate choice of the applied current. With respect to the high current densities generated in the nanowire, especially for low resistances (metal nanowires), preferably an AC current source and lock-in technique should be used to prevent damages of the nanowire by electromigration. The resistivity value at room temperature, ρ≈17 µΩm, is consistent with values previously reported in literature for polycrystalline Bi2Te3 material. The resistivity decreases with decreasing T indicating the metallic behavior of the Bi2Te3 nanowire.

The temperature coefficient of resistance is calculated using TCR = [1/R0]dR(T)/dT being R0 the resistance of the wire measured at T0 = 295 K. The slope can be obtained either by differentiation of an appropriated fit function of the resistivity data or by a partial linearization of the data points. The TCR presented in figure 12 is calculated using a polynomial fit of the resistivity data.

Figure 12.

Temperature coefficient TCR of resistivity of a Bi2Te3 nanowire.


4. Seebeck coefficient

To accurately measure the Seebeck effect on single nanowires, a specific microchip has been designed and optimized. This chip has to meet the following requirements:

  • In order to achieve sufficient measuring accuracy, a temperature difference along the nanowire axis of at least 1 K should be realized. Thus, a temperature gradient of at least 105 K/m has to be established between the electrical contacts (assuming a contact distance of about 10 μm).

  • Besides the thermoelectric voltage U caused by the temperature difference, also the temperatures at the nanowire contacts (i.e., at two positions with a distance of only a few microns) have to be measured precisely.

Micromachining and microlithographic methods were employed to realize a newly developed microchip, which meets both experimental challenges.

4.1. Experimental details

A 300 nm thin Si3N4 membrane is prepared by micromachining in the center of a silicon chip. After low pressure chemical vapour deposition (LPCVD) of Si3N4 layers on both sides of a silicon wafer, a square-shaped window is opened by photolithographic patterning and reactive ion etching (RIE) of the Si3N4 layer on the back side. Then, the exposed (100)-oriented silicon is removed by anisotropic etching in KOH-solution at 80 C. The LPCVD layer is not attacked by this etchant; therefore a square-shaped Si3N4 membrane of 2x2 mm² remains at the front side of the chip. This very thin membrane with low thermal conductivity is a crucial feature of the chip with respect to realization of the above mentioned temperature gradient.

Prior to the membrane preparation, nanowires are placed on the front side Si3N4 layer of the (100)-oriented silicon wafer. After inspection of the wires and their positions on the Si3N4 surface, one pair of Ti/Au contact films is structured at the ends of a selected wire by lift-off technique (described in figure 4). An identical second pair of contact films is patterned adjacent to the first one as shown in figure 13. After preparation of these contact layers, the opening of the back side windows for anisotropic silicon etching is established by photolithography, using a double-side exposure mask aligner. Due to double-side alignment, the correct position and orientation of the back side window with respect to the nanowire and contact film positions at the wafer front side is achieved. The anisotropic etching is performed in a KOH-resistant etching box in order to protect the wafer front side against the etchant. When aligned correctly, the single nanowire is located near the centre of the membrane (or window) and the edges of the rectangular contact films are oriented parallel to the membrane edges, as shown in figure 13. Next, a Seebeck reference film (thickness 200 nm) with known Seebeck coefficient is deposited on the second pair of contact films by thermal evaporation through a metal diaphragm. Polycrystalline bismuth films have been applied as reference films, because their thermoelectric properties and Seebeck coefficients have been investigated in detail (Voelklein & Kessler, 1986). Furthermore, the Seebeck reference film can be deposited simultaneously on the bulk silicon rim of the chip, where its Seebeck coefficient can be measured with calibrated thermocouples.

Finally, a thin-film heater is deposited onto the membrane region of the chip in order to generate the required temperature difference. This heating film can be placed on the back side of the membrane without additional electrical insulation. Alternatively, it can also be deposited on the membrane front side, if the heater is separated from the contact films by a thin insulating layer. The contact films are electrically connected by wire bonding, where the bond contacts have to be realized outside the membrane region on the bulk silicon rim.

The heater generates a temperature difference ∆T at the gap between the metal contacts. The chip design, shown in figure 13, was investigated and optimized by finite element method (FEM) simulations. As demonstrated in the next section, an identical temperature difference ΔT between both pairs of contact films can be achieved. Therefore, ∆T at the nanostructure is determined by using the reference voltage U R of the Seebeck reference film

U R = ( S R S C ) Δ T E4

where S R is the known Seebeck coefficient of the reference film (S R = − 63 μV/K for 200 nm thick Bi films at room temperature) and S C is the Seebeck coefficient of the contact pads. For Ti/Au contact films, S C amounts −0.4 μV/K at room temperature. With the measured Seebeck voltage U N of the nanowire (and the known temperature difference) its Seebeck coefficient S N can be calculated according to

S N S C = U N Δ T = U N ( S R S C ) U R E5

Figure 13.

left: Scheme of the microchip for Seebeck coefficient measurements with 1: surface of silicon wafer, 2: Si3N4 membrane, 3: Ti/Au contact pad, 4: bismuth reference layer, 5: position of the nanowire, 6: heating layer; right: SEM picture (back side view) of the microchip, showing electrical connections to the heating layer, the Ti/Au contact pads and Bi reference film.

4.2. FEM simulation

By finite element method (FEM) simulations using COMSOL Multiphysics, the temperature profile in the membrane region as a function of the heating power and the position of the thin-film heater has been investigated. The temperature difference at the gap between the contact films is the most important feature of the chip design. Since the bulk silicon rim has a very high thermal capacitance and thermal conductivity compared to the membrane, it can be considered as a heat sink with constant ambient temperature T 0. Therefore, we apply the boundary condition of constant temperature T=T 0 at the membrane edges. Because of the very small thickness of the membrane and of all deposited films compared with their lateral dimensions, the FEM simulation can be performed with a two-dimensional (2D) model. Figure 14 shows the various areas of the membrane region that must be distinguished because of their different thin-film stacks. By using a 2-dimensional model, all individual areas (subdomains) are modeled by a uniform model thickness d. Then the effective thermal conductivities λ eff of the subdomains have to be calculated by

λ e f f d = i λ i d i E6

with λ i denoting the thermal conductivities and d i representing the thicknesses of the individual layers of the stacks. Radiation losses of the membrane areas are included in the calculation by Stefan-Boltzmann radiation law. With respect to thermal radiation, the subdomains are characterized by two emissivities ε 1 and ε 2 for the top and bottom surface, respectively.

Figure 14.

FEM subdomains in the membrane region, each characterized by specific effective thermal conductivities λeff and emissivities ε1, ε2. 1: membrane, 2: membrane + Ti/Au film, 3: membrane + Bi heating film, 4: membrane + Ti/Au film + Bi heating film, 5: membrane + Bi reference film, 6: membrane + Ti/Au film + Bi reference film.

Figure 15.

Simulated three-dimensional temperature profile in the membrane region for a microchip operating in high vacuum (pressure p < 10−5 mbar) with a thin-film heater 0.2 mm distant from the gap and a heating power density of 28 W/mm3, indicating temperature differences ∆T> 10 K for the nanowire and reference film, respectively.

Simulations were performed for microchips applied both in high vacuum and at atmospheric pressure. Heat losses by convection can be neglected for measurements in high vacuum at pressures p< 10−5 mbar. Convective heat losses in atmospheric air are simulated by using a heat transfer coefficient α = 6.4 W/m2K. The temperature differences ∆T at the gaps between the contact pairs depend on the heating power density Q and on the distance between gap and thin-film heater. Figure 15 demonstrates the 3-dimensional temperature profile in the membrane region for a microchip with a thin-film heater placed on the back side of the membrane at a distance of 0.2 mm to the gap. A moderate heating power density Q = 28 W/mm³ generates temperature differences of ΔT> 10 K between the nanowire contacts for operation in high vacuum as well as at atmospheric pressure. A nearly identical temperature difference can be achieved between the contact pairs for the Seebeck reference film (200 nm Bi), because of its small thermal conductance.

4.3. Seebeck coefficient results

First experimental investigations of the Seebeck coefficient were performed on nano-granular (W)-FEBID lines (Voelklein et al., 2010). Nano-granular metals may be promising thermoelectric materials because of the expected reduction of thermal conductivity. Therefore, their thermopower has been investigated with respect to thermoelectric applications. A typical FEBID layer is shown in figure 5. For Seebeck effect measurements nano-granular W-FEBID lines (length: 13 μm, thickness: 300 nm, width: 1.2 μm) are deposited between the Ti/Au contact pads of the chip. Applying a voltage of 20 mV to a thin-film heater of 50 Ω, a temperature difference of a few Kelvin is generated at the gap. By increasing the heating power, a linear increase of the thermoelectric voltage has been observed (figure 16). The Seebeck coefficient is calculated using the slope of the thermoelectric voltage as function of temperature difference. A small Seebeck coefficient S N S C = − 8.1 μV/K has been determined for nano-granular W-FEBID with a metal content of about 22 at.% at room temperature, where S C denotes the Seebeck coefficient of the contact material (- 0.4 µV/K).

Figure 16.

Thermoelectric voltage U th as function of temperature difference ΔT for a nano-granular W-FEBID layer (thickness: 300 nm, width: 1.2 µm, length: 13 µm) with a metal content of about 22 at.% at room temperature

Figure 17 shows the thermoelectric voltage U th as function of the temperature difference ΔT measured on a single Bi2Te3 nanowire at various ambient temperatures. The Seebeck coefficient decreases with decreasing temperature in the observed temperature range. Figure 18 indicates the Seebeck coefficient of a 200 nm diameter Bi0.9Sb0.1 nanowire in a temperature range from 80 K to 300 K. The measured Seebeck coefficient of −95 ± 5 μV/K at room temperature is close to the value reported for Bi1-xSbx thin films with an antimony content of about 10 at.% (Cho et al., 2000; Liu et al., 2007), as expected for nanowires with these dimensions.

Figure 17.

Thermoelectric voltage U th as function of temperature difference ΔT for a Bi2Te3 nanowire (d: 180 nm, l: 18 µm) at different ambient temperatures

Figure 18.

Seebeck coefficient of a 200 nm diameter Bi0.9Sb0.1 nanowire in the temperature range from 80 K to 300 K. Data points indicate measured values during continuous temperature increase (filled triangles) and decrease (empty triangles).


5. Thermal conductivity

Sophisticated micro devices have been designed and applied for the measurement of thermal conductivity of nanostructures (Shi et al., 2003; Boukai & Heath, 2006; Boukai et al., 2008). Extremely fragile suspended cantilevers are prepared for measuring platforms in order to reduce the thermal conductance of the device. We present an alternative steady-state method that requires only heat sink conditions at the ohmic contacts of the nanostructure. Measurements of the thermal conductivity at the single nanowire level are important to investigate the influence of finite-size and quantum-size effects. In addition, methods to determine the thermal conductivity of nanowire arrays embedded in the polymer are relevant to explore the potential integration and application of thermoelectric nanowires in TEDs.

5.1. Steady-state method for suspended nanowires

5.1.1. Experimental details

For thermal conductivity measurements, the nanowire must be suspended to avoid thermal bypass though the substrate. The fabrication and contacting of suspended nanowires by RIE and lithography has been discussed in section 3.1.1. The nanowire endings are in intimate thermal contact with the metallic contact pads and are separated from the bulk silicon wafer only by a thin Si3N4 layer. During electrical heating of the nanowire by an electrical current I, most of the heating power is dissipated in the suspended part of the wire, since the resistance of this part is large compared to the resistance of the contact pads. Therefore, the ends of the nanowire can be considered as heat sinks of constant temperature T 0, as demonstrated by finite-element method (FEM) simulations (see figure 19).

Figure 19.

Temperature profile (FEM simulation) in a suspended, electrically heated nanowire (heating power I 2 R = 1 μW, wire radius = 100 nm, length = 15 μm) contacted on a Si3N4/Si chip (Si3N4-thickness amounts 0.3 μm) with Ti/Au contact layers, demonstrating heat sink conditions at the contacts.

The measuring principle and experimental setup for the thermal conductivity measurements are illustrated in figure 20. The measuring sequence starts with the determination of the nanowire resistance R(T 0) at any ambient temperature T 0, using a 4-point-probe technique and a low measuring current I 0. The temperature T 0 of the setup can be varied between 80 K and 400 K, but, in general, measurements can also be performed at liquid He temperatures. Because of the low I 0, the temperature increase of the nanowire due to Joule heating can be neglected. From these measurements, the slope of the resistance-temperature curve m = dR(T 0)/dT 0 is determined at an arbitrary T 0. Then, a heating current I is applied leading to a temperature increase of the wire which involves a rise of the electrical resistance ΔR=R(T M)−R(T 0), where R(T M) denotes the resistance and T M the mean temperature of the heated nanowire. The usually applied heating currents lead to mean temperature increases ΔT M = T MT 0 of less than 10 K. ΔT M can be determined experimentally by using the measured resistance increase ΔR and the slope m according to

Δ T M = Δ R m E7

On the other hand, ΔT M is a function of the thermal conductivity λ of the nanowire. In order to find the dependence of ΔT M on λ, the thermal heat equation has to be solved for the specific boundary conditions, given by the experimental setup.

Figure 20.

Schematic cross section of the experimental setup with temperature profile T(x)

Measurements are performed in a high vacuum (pressure p< 10−5 mbar). Therefore, convective heat losses from the heated wire to the ambient can be neglected. Furthermore, radiation losses according to the Stefan-Boltzmann law can be omitted because of the small ΔT M and the dimensions of the suspended nanowire. With respect to the wire length of (typically) 10 μm compared to its small diameter in the order of 100 nm, the heat transport can be described using a one-dimensional model. A detailed derivation of the heat equation (Voelklein et al., 2009b) leads to

Δ T M = I 2 R 12 λ ( A / l ) E8

Combining equations (7) and (8), we can calculate the thermal conductivity

λ = m I 2 R l 12 A Δ R E9

by using the measured increase in resistance ΔR, the heating power I 2 R, the slope m of the resistance-temperature curve and the geometrical dimensions (A, l) of the wire, which are determined by SEM investigations.

5.1.2. Thermal conductivity results

For a first test of measuring principle the thermal conductivity of individual polycrystalline Pt nanowires has been investigated ( Voelklein et al., 2009 b). The presented measurements are performed in the temperature range from 260 K – 360 K on a nanowire with 131 nm diameter and a suspended length of 14.7 μm. The values of electrical conductivity σ (figure 21) are deduced from measurements of the nanowire resistance R(T 0) performed with a low AC current of frequency 113 Hz. During these measurements a very low Joule heat of 10−7 W is dissipated and, therefore, the mean temperature increase ΔT M in the nanowire remains smaller than 0.3 K. Compared to the bulk value σbulk = 9.6x106 (Ωm)−1 at 295 K, the electrical conductivity of the Pt nanowire is reduced by a factor of 2.5.

Figure 21.

Electrical conductivity σ of a Pt nanowire as function of temperature (Voelklein et al., 2009b)

This decrease is in good agreement with classical size effect theory (Sondheimer, 1952; Mayadas & Shatzkes, 1970). For thermal conductivity measurements an electrical heating power of 4x10−6 W was applied, causing a mean temperature increase of ΔT M = 12.7 K. Figure 22 shows the thermal conductivity in the temperature range 260 K – 365 K. The bulk values (e.g. λbulk = 71 W/mK at room temperature) are more than three times larger than the measured thermal conductivities of the polycrystalline Pt nanowire. This is also attributed to size effects (Ouarbya et al., 1981), mainly caused by grain boundary scattering of electrons.

Figure 22.

Thermal conductivity λ of a Pt nanowire as function of temperature ( Voelklein et al., 2009 b)

5.2. Cross-plane thermal conductivity of embedded nanowires

Arrays of nanowire bundles can be applied for thermoelectric micro generators or for arrays of thermoelectric radiation sensors. Figure 23 shows the fabrication sequence of an array of thermoelectric sensors, where each sensor pixel consists of a thermocouple of p-type and n-type nanowire bundles.

Figure 23.

Fabrication process for an array of thermoelectric sensors. top: selective electrochemical deposition of p- and n-type nanowire arrays. bottom: fabrication of the sensor pixels, each consisting of a bundle of p- and n-type nanowires.

To achieve a selective deposition of two different kinds of nanowire arrays, it is necessary to provide independent contacts to the template material. As heat sink, a substrate with high thermal conductivity is used. In particular, a silicon wafer with an electrical insulating layer (e.g. SiO2 or Si3N4), on which metal contact pads were structured by microlithography (figures 23 and 24) acts as a heat sink. A polycarbonate etched ion-track membrane with pore diameters between 100 and 200 nm, is placed on such a substrate. Alternatively, thin polymer layers such as PMMA, SU8 negative resist or thick AZ photoresist can be deposited by spin coating, irradiated with heavy ions and etched in suitable solutions. Half of the metal contact pads are connected together for selected fabrication of n-type nanowire bundles in a first electrodeposition process and the second group of contact pads is used in the next electrodeposition step for the realization of p-type nanowire bundles. Then, thermocouples are formed by connecting a p- and n-type bundle by physical vapor deposition (PVD) and photolithographic patterning of a metal layer. To form a radiation sensor array these metal contact layers are coated with a broadband radiation absorbing layer with high absorption coefficient from the visible to the infrared radiation range. Finally, the template foil can be removed by dissolution (figure 24), using an organic solvent, in order to increase sensitivity and detectivity of the array pixels. By using the presented technology, a minimum size of an individual thermocouple (pixel) of about 10x20 μm2 can be achieved. For simulation and characterization of the sensor parameters, the thermoelectric figure of merit of such template foils filled with nanowires has to be investigated.

Figure 24.

left: SEM image shows the surface of an etched ion-track membrane and the Au contact pads patterned by microlithography to act as cathodes for selective electrodeposition of different materials; right: bundle of nanowires with metal contact layer after dissolution of template foil (Rauber, 2008).

The investigation of nanowire arrays requires the measurement of the cross-plane thermal conductivity of thin foils with thickness in the order of 10 μm. The measuring principle and experimental setup of the applied steady-state method is represented in figure 25. Metallic heater/thermometer films with high temperature coefficients of resistivity are deposited on the top surfaces of the samples and electrically insulated from them by thin dielectric layers (interfaces). Measurements are performed on two foils and results are compared in order to calculate the thermal conductivity of embedded nanowires: on a template foil after irradiation and etching (figure 26) and on an identical foil (same thickness, nanochannel diameters and ion-track density) filled with thermoelectric nanowires. The template foils are fixed on a substrate by an adhesive and thus are thermally separated from the substrate by an interface with unknown thermal resistance. The substrate is fixed on a heat sink with temperature T 0. On the heater/thermometer films (length l, width b) on top of the two template foils with cross-plane thermal conductivities λ 1 and λ 2, the electrical heating powers N 1 and N 2 are dissipated, respectively.

Figure 25.

Method and experimental setup (cross-sectional view) for steady-state measurements of cross-plane thermal conductivity of thin template foils (without and with embedded nanowires).

These cause temperature increases T 1T 0 and T 2T 0, respectively, which are measured by the resistance increases of the heating films (thermometers). The ratios of the specific temperature increases and heating powers (T 1T 0)/N 1 and (T 2T 0)/N 2, respectively, represents the total thermal resistances R T1 and R T2 of the samples. Besides the thermal resistances of the templates R TF1 = d/(λ 1 bl) and R TF2=d/(λ 2 bl), these total thermal resistances include the thermal resistances of the substrate RTSub, of the interfaces RTInt and of the heater/thermometer RTH=d H/(2λ H bl). Usually, the thermal resistance of the heater/thermometer is very small and can be neglected, since the thickness d H of the used metallic heating films amounts 100 nm and its thermal conductivity λ H is higher than 100 W/mK. For our measurements the thermal resistance of all interfaces R TInt can also be neglected, since the insulation between heater and foil is realized by spin coating of a very thin resist layer and the interface between foil and substrate is formed by a thin metal-filled adhesive with high thermal conductivity. Furthermore, by proper choice of the geometrical dimensions l and b of heater and sample, the spreading thermal resistance RTSub of the substrate can also be omitted. In general, the geometrical conditions b> d and b l should be fulfilled. Then, the measured total resistance R T1 represents the thermal resistance R TF1 of the irradiated and etched polycarbonate foil and R T2 is equivalent to the thermal resistance R TF2 of the foil with embedded nanowires. Figure 26 shows a cross sectional view of a template foil after etching of nanochannels. For our measurements we used polycarbonate foils of about 30 µm thickness with an average channel diameter of 200 nm and an ion track density of 109/cm². Consequently, the volume content of etched channels V Ch in the foil amounts about 30%. Figure 26 shows the thermal conductivity λ 1 of the polycarbonate foil with nanochannels as function of temperature, which has been determined from the measured data of the thermal resistance R T1, and the calculated thermal conductivity λ PC of polycarbonate, assuming the nanochannels are filled with air at atmospheric pressure. Then λ PC is evaluated by

λ P C = λ 1 ( V P C + V C h ) V P C λ a i r V C h V P C E10

where λ air indicates the thermal conductivity of air at atmospheric pressure and V PC is the volume content of polycarbonate of the etched foil.

Figure 26.

left: Template foil after irradiation with heavy ions and etching of nanochannels (Spohr, 1990); right: Measured thermal conductivities λ 1 and λ 2 and calculated thermal conductivities of polycarbonate template foil λ PC and embedded Bi nanowires λ Bi.

Figure 26 indicates also the thermal conductivity λ 2 of such a polycarbonate foil filled with Bi nanowires. Taking into consideration the volume content of Bi nanowires of 30%, the thermal conductivity of embedded Bi nanowires λ Bi (also shown in figure 26) can be calculated using

λ B i λ a i r = ( λ 1 λ 2 ) ( V P C + V C h ) V C h E11

Figure 25 demonstrates the problems associated with the measurement of the cross-plane thermal conductivity. Interfaces between substrate and template foil and between template foil and heater/thermometer may have a thermal resistance that cannot be ignored in comparison to the thermal resistance of the investigated template. However, both the presented steady-state technique as well as the transient 3-Omega method have to solve this experimental challenge. One advantage of the steady-state method compared to the 3-Omega method is a much lower electrical power density required for the heater/thermometer and a less expensive/complex electrical measuring setup.


6. Microchip for the complete characterization of thermoelectric transport coefficients (σ, S, λ) on an individual nanowire (z-chip)

Various specific and sophisticated microchips and methods for the measurement of thermoelectric transport properties of nanostructures have been presented in the previous sections. In the ideal case, only one chip should be applied for the complete characterization of all thermoelectric transport coefficients (σ, S, λ) on an individual nanowire. This section deals with the design (simulation) and realization of a z-chip fabricated by micromachining. Figure 27 shows the scheme of the z-chip and the measuring principle. By microlithographic patterning and anisotropic etching in silicon a comb-like silicon cantilever array is fabricated. The cantilevers (length l = 550 µm, width b = 16 µm, thickness d = 40 µm) are separated by a distance w of about 10 µm. The top surface of the cantilevers is coated with a thin insulating Si3N4 film and two thin film Ti/Au contact stripes are patterned by photolithography on each cantilever. The cantilever array is fabricated by using a SOI wafer with a top silicon wafer of 40 µm thickness, an insulating SiO2 interface and a bottom silicon wafer of 300 µm thickness. After patterning of the electrical contact stripes, the cantilever array is realized by anisotropic etching of the top wafer. Finally, the cantilevers are thermally separated from each others by anisotropic etching of a cavity in the bottom wafer, where the etching process is stopped beneath the cantilevers due to the SiO2 interface. The thermal cross-talk between the cantilevers caused by the remaining SiO2 interface layer (300 nm thick) is very small and can be minimized by removing the SiO2 film using reactive ion etching (RIE).

Figure 27.

Scheme and measuring principle of a cantilever array for the characterization of thermoelectric efficiency z of individual nanowires (z-chip).

One part of the bulk silicon rim of the z-chip is connected with a heat sink of temperature T 1, the other part with a heat sink of temperature T 0. Because of the very small thermal cross-talk between the cantilevers and the high thermal conductivity of silicon, one set of the cantilevers have a temperature close to the heat sink temperature T 1, the other half close to T 0. Thus two neighboring cantilevers possess a temperature difference which is proportional to the temperature difference of the heat sinks T 1T 0. Figure 28 shows the temperature profiles along two neighboring cantilevers, one of them connected with a heat sink of temperature T 1=298 K and the other with a heat sink of temperature T 0=295 K. Figure 28 demonstrates that the temperature difference between the cantilevers is about 2.4 K and nearly independent of the position. Ion-track fabricated nanowires are deposited on the cantilever array (figure 29, left) using few drops of the solvent containing the wires (see section 2.1). The solvent evaporates within a few minutes leaving behind randomly distributed suspended wires (figure 29, right) fixed on neighboring cantilevers.

Figure 28.

Temperature profile along two neighboring cantilevers connected to heat sinks of temperatures T 1=298 K and T 0=295 K, respectively.

Measurements of electrical conductivity σ are performed using a 4-point-probe technique, where the 4 thin film Ti/Au lines of two neighboring cantilevers are applied as current and potential probes. For the measurement of the Seebeck coefficient S a defined temperature difference between the heat sinks is generated, leading to a specific lower temperature difference between neighboring cantilevers and consequently to a thermoelectric voltage, that can be measured using the Ti/Au contact lines. The temperature difference between neighboring cantilevers is a defined function of the heat sinks temperature difference (T 1T 0) and has been determined by separate measurements, using thin film temperature sensors.

Figure 29.

left: cantilever array with 56 cantilevers; right: suspended Bi0.9Sb0.1 nanowire (d=200 nm, l=35 µm) deposited and contacted on two neighboring cantilevers with thin Ti/Au metal lines.

For measurements of thermal conductivity λ both heat sinks are kept at the same temperature. Because of their high thermal conductivity, the cantilevers act as heat sinks of identical temperature despite electrical heating of the nanowire. Therefore, the steady-state method described in section 5.1 can be applied. The 4-point-probe technique is employed for the determination of the heating power I²R dissipated in the nanowire and the resistance change ΔR, and λ is calculated using equation (9). Thus, all transport coefficients (σ, S, λ) can be characterized on one and the same individual nanowire.


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Written By

Friedemann Voelklein, Matthias C Schmitt, Heiko Reith and Daniel Huzel

Submitted: 04 November 2010 Published: 18 July 2011