## Abstract

Atmospheric pressure dielectric barrier discharges (DBD) has many industrial applications and remains a focus of academic research. This chapter provides a thorough overview of electrical diagnostics for DBD, with a specific focus on charge-voltage measurement techniques. These methods are often underutilised in the existing scientific literature, despite the fact that they can provide useful insights into plasma behaviour. Both optimization of the electrical measurement setup and the interpretation of results are treated in-depth. The diagnostic techniques are discussed for a range of applications, from classic planar DBDs, to catalyst packed beds, plasma actuators, as well as techniques for measuring single microdischarges.

### Keywords

- electrical diagnostics
- dielectric barrier discharges
- packed bed
- Q-V diagram
- Lissajous figure

## 1. Introduction

Atmospheric pressure dielectric barrier discharges (DBD) has many industrial applications, due to its inherent simplicity and moderate operating conditions, and remains a focus of academic research. A schematic of a DBD is shown in Figure 1, along with a depiction of current and voltage characteristics over time. Upon breakdown of the gas in the gap, the dielectric prevents transition to a high current arc-like discharge, which would otherwise occur between two uncovered metal electrodes. Though spatially uniform discharging in DBDs can be achieved under certain conditions [1, 2, 3, 4, 5, 6, 7], under most circumstances a filamentary discharge will develop [8]. Since filaments are characterised by high local electron densities of up to 10^{15} cm^{−3} and strong electric fields of up to 10^{5} V/cm, it is these filaments that determine the plasma chemistry [9, 10, 11]. The filaments are self-limiting, because they charge the dielectric surface and locally negate the gap voltage until extinction occurs within 10^{−7} s. Not only are the filaments spread out over the surface, they also occur over a wide timeframe. If, for example, the DBD is driven by a sinusoidal external voltage at a frequency of 100 kHz, filaments will ignite over a period of ≈3 μs in each half-cycle, at many different stages of the external voltage [12].

For many applications of DBD it is highly desirable to know the power dissipated in the discharge, e.g. for gas conversion or plasma actuators. The so called ‘capacitor method’ is generally the most accurate means of measuring plasma power, as well as allowing for more in-depth electrical characterisation of the reactor properties. For instance, the average gas gap voltage at which filaments (or any DBD plasmas in general) ignite can be determined with great accuracy using electrical diagnostics, combined with a suitable equivalent circuit model. This ignition voltage tends to be constant and is here referred to as the ‘burning voltage’ *Ub*, as depicted in Figure 1. The burning voltage *Ub* provides a measure for the (reduced) electric field within the DBD plasma and is highly relevant for assessing the plasma chemistry occurring within the reactor [11, 13]. Along with large scale discharges, individual filaments have also been a subject of study, both experimentally [10, 14, 15, 16] and in modelling [9, 10, 17, 18]. In this regard, electrical diagnostics are ideally suited to assess the relationship between large-scale multi-filament discharges and computer simulations of individual filaments.

This chapter provides an overview of electrical diagnostics for DBD, with a focus on charge-voltage (Q-V) measurement techniques. Particular attention is paid to setting up Q-V measurements, identifying systematic errors, and performing in-depth analysis of the results to obtain reactor properties. Additionally, Q-V techniques for studying individual filaments and filament distributions are presented.

## 2. Charge-voltage diagrams in DBD

A charge-voltage (Q-V) diagram, or Lissajous figure, is obtained by making an X-Y plot of the voltage *V*(*t*) across the DBD reactor’s electrodes against the charge *Q*(*t*) on a monitor capacitor. The voltage across the reactor electrodes is preferably measured using a calibrated high voltage probe (typically with a 1000:1 attenuation), connected as close as possible to the electrodes^{1}. The monitor capacitor, having capacitance *Cm*, is situated between the reactor and the ground, and the voltage across it is measured using a standard (10:1 attenuation) oscilloscope probe. The instantaneous voltage *Vm*(*t*) across the capacitor can be converted into the instantaneous charge on the capacitor *Q*(*t*) by applying the relationship in Eq. (1). A schematic showing a typical experimental set-up to generate a Q-V diagram is shown in Figure 2.

### 2.1 Ideal Q-V diagrams

An ideal Q-V diagram can be defined as having a parallelogram shape, as shown in Figure 3. In a real DBD, there may be some deviations from this ideal shape, for which several cases are discussed in Section 3. The general principles behind analysis, however are the same for all Q-V diagrams. Parallelogram-shaped Q-V diagrams are the simplest case, where the discharging phases of the plasma reactor are clearly distinguishable by various line segments (AB, BC, CD and DA in Figure 3). Understanding the shape of the Q-V diagram, and deriving discharge properties from it, requires an equivalent electrical circuit, for which the simplest case is depicted in Figure 4. If we consider a parallel plate DBD during a full cycle of the applied voltage, there are two ‘plasma off’ phases (AB and CD in Figure 3) and two ‘plasma on’ phases (BC and DA in Figure 3). During the ‘plasma off’, or capacitive phase, the reactor behaves as two capacitors in series. These capacitances are due to the dielectric layer, *Cdiel*, and the discharge gas gap, *Cgap*, both being able to store charge, either from an applied voltage, or from charges accumulated by a plasma discharge. The overall ‘DBD cell’ capacitance, *Ccell*, of these two elements is found by applying Kirchoff’s laws, yielding:

Note that if both metal electrodes are covered with dielectrics, or if multiple gas gaps are found in series in the DBD reactor, the equivalent circuit of the reactor can be reduced to that depicted in Figure 4, where equivalent capacitances for both *Cdiel* and *Cgap* can be found by applying a similar inverse addition as in Eq. (2).

The capacitances *Ccell* and *Cdiel* can be obtained from the shape of an ideal Q-V diagram.^{2} Remembering that *C* = d*Q*/d*V*, we can see that the gradients of the lines AB, BC, CD and DA in Figure 3 correspond to constant capacitances. Lines AB and CD of the Q-V diagram correspond to the capacitive phase (i.e. ‘plasma off’), where the gradient is equal to *Ccell*. This can be inferred from the equivalent circuit of Figure 4, since in the absence of plasma in the gap, current can only flow via the capacitive elements *Cdiel* and *Cgap*.

Conversely, the gradient of the lines BC and DA corresponding to the discharging phase (i.e. ‘plasma on’) are usually identified as *Cdiel* [19]. This is often (qualitatively) explained as the microdischarges ‘bridging the gap’, thus negating the *Cgap* term such that *Ccell* = *Cdiel* in Eq. (2). However, this view would imply that the voltage drop across the gas gap, *Ugap*, instantly drops to zero as soon as even a single microdischarge is ignited somewhere in the gap. The reasons for this are not immediately obvious based on inspection of Figure 4, and are only revealed after examination of the electrical behaviour of the discharge in the equivalent circuit.

Note that if no discharging would occur at all during a full cycle of the applied voltage *V*(*t*) (if for instance the voltage amplitude is too low to achieve breakdown in the gas), the lines AB and CD would overlap and cross the origin in the Q-V plot. The fact that AB and CD develop opposing offsets on the *Q-*axis upon discharging is due to deposition of charges on the dielectric surface(s) by the plasma. In terms of the equivalent circuit, the time-varying (and surface-averaged) voltage across the gap capacitance *Ugap*(*t*), as well as the voltage across the dielectric capacitance *Udiel*(*t*) = *V*(*t*)−*Ugap*(*t*), become significantly modulated and phase-shifted with respect to the applied voltage *V*(*t*), as is schematically depicted in the top-right-hand-side of Figure 1. Note the convention used here, where externally measurable voltages are referred to by *V*, and internal voltage drops are referred to by *U* (which are indirectly derived by modelling the electrical behaviour of the reactor).

### 2.2 Detailed analysis of the equivalent circuit

During the ‘plasma on’ phase, the gas gap in the reactor contains a variable, conducting medium, which is often represented by a time-dependent resistor *R*(*t*), placed parallel to *Cgap* [20]. Since this approach requires *R*(*t*) to be infinite until just before the ‘plasma on’ phase and neglects the possibility of an inductive element to the discharge, it is preferable to represent the discharge as a ‘black box’ element, through which a plasma current *iplasma*(*t*) flows due to the voltage *Ugap*(*t*) across the gap [21]. In either case, the plasma current conductively transfers charge across the discharge gap, from a metal or dielectric coated electrode surface to an opposing dielectric electrode surface. As detailed in [21], the plasma current *iplasma*(*t*) and gap voltage *Ugap*(*t*) for the equivalent circuit of Figure 4 are given by:

Eqs. (3) and (4) show how both current and voltage for the ‘black box’ element can be obtained from the measurable quantities *Ccell*, *Cdiel*, *Q*(*t*) and *V*(*t*), without any a-priori assumptions regarding the electrical behaviour of the plasma. The term between brackets in Eq. (3) consists of the externally measured current, d*Q*(*t*)/d*t* = *i*(*t*), from which a capacitive current, *Ccell*·d*V*(*t*)/d*t* is subtracted. This last term is often erroneously referred to as the *displacement current* of the DBD. The true displacement current, defined as *idisplacement*(*t*) = *i*(*t*)−*iplasma*(*t*), can be quite different due to the pre-factor 1/(1−*Ccell*/*Cdiel*) in Eq. (3). Neglecting this pre-factor can lead to underestimation of *iplasma*(*t*) and overestimation of *idisplacement*(*t*), especially in reactors where the ratio *Cgap*/*Cdiel* ≫ 0.01. Physically, this pre-factor is due to the electrical energy stored in *Cgap* prior to discharge ignition, which is subsequently drained through the plasma and leading to an enhanced plasma current during discharging.

The equivalent circuit model implicitly assumes a spatially uniform discharge, so that gap voltage *Ugap*(*t*), described by Eq. (4), is always an average over the DBD surface area. This is worth keeping in mind when interpreting results on the level of individual microdischarges, but is certainly sufficient to describe reactor-averaged properties resulting from large numbers of filamentary microdischarges. The behaviour of *Ugap*(*t*) can reveal an important feature of the equivalent circuit in Figure 4 after solving for *Q*(*t*) and differentiating with respect to *V*(*t*):

Eq. (5) is always valid for the equivalent circuit in Figure 4 (also during ‘plasma off’ phases), irrespective of the shape of the Q-V diagram it is assumed to describe. For a parallelogram-shaped Q-V diagram, however, the term between brackets must be a constant, or AB and CD, or BC and DA, would not form straight lines. Identification of the gradients of BC and DA with *Cdiel*, as is usual in the literature, requires that d*Ugap*(*t*)/d*V*(*t*) = 0 during a discharge half-cycle (reducing the term between brackets in Eq. (5) to (1). Since the applied voltage *V*(*t*) changes significantly over the time-span of a ‘plasma on’ phase (i.e. d*V*(*t*) ≠ 0), this implies that d*Ugap*(*t*) = 0 while there is discharging occurring in the gap. In other words, a straight line in a Q-V diagram during a ‘plasma on’ phase indicates a constant *Ugap* from the moment the discharge begins, until its end. See also Figure 1 for an illustration of this phenomenon, where this constant gap voltage is identified as the burning voltage *Ub*.

Eq. (5) is applicable to both ‘plasma on’ and ‘plasma off’ phases. The straight lines AB and CD during ‘plasma off’ imply that Eq. (5) must equal *Ccell*, meaning that the term between brackets is a constant with a value of *Ccell*/*Cdiel* during these periods. During ‘plasma on’, straight lines emerge as long as the term d*Ugap*(*t*)/d*V*(*t*) is a constant, but not necessarily equal to zero. In general, Eq. (5) can be used to derive the relationships between external voltage *V*(*t*) and gap voltage *Ugap*(*t*) for parallelogram-shaped Q-V diagrams:

where the time-dependence in d*Ugap*/d*V* has been removed to indicate that this rate is a constant during either ‘on’ or ‘off’ phases. The equality for ‘plasma off’ in Eq. (6) matches Kirchhoff’s laws for the division of voltage between two capacitors in series. It further shows that *Ugap* responds more strongly to changes in external voltage *V* if *Cdiel* ≫ *Cgap*. As will be shown in Section 3.5, this is relevant to quickly regain small drops in *Ugap* occurring between individual filamentary discharges. Meeting the condition *Cdiel* ≫ *Cgap* ensures a maximum number of filaments is ignited during a ‘plasma on’ period, since any reduction in *Ugap* due to discharging is more quickly compensated by the external voltage *V*. Regarding the inequality in Eq. (6) for the ‘plasma on’ phase, there is no a-priori reason to assume that d*Ugap*/d*V* = 0, since any constant value for d*Ugap*/d*V* can produce a constant d*Q*/*dV* gradient during ‘plasma on’ in a parallelogram-shaped Q-V diagram. As Eq. (5) already showed, *Cdiel* simply represents the highest constant d*Q*/*dV* gradient that can be observed in an ideal DBD, corresponding to d*Ugap*/d*V* = 0, i.e. a constant gap voltage *Ub* during discharging. Values for d*Q*/*dV* < *Cdiel*, and a non-zero d*Ugap*/d*V*, during ‘plasma on’ are equally possible. This situation occurs in the case of partial surface discharging, where only a portion of the available dielectric surface area is exposed to discharges during ‘plasma on’ phases, and will be discussed further in Section 3.1. The inequality in Eq. (6) becomes invalid for individual microdischarges, since these do not produce ideal parallelogram Q-V diagrams. In these cases d*Q*/*dV* gradients can easily exceed *Cdiel*, which is related to the sudden drops in gap voltage produced by microdischarges; a situation which is discussed further in Section 3.5.

### 2.3 Power measurements

The most common usage of a Q-V diagram is to determine the *active* power dissipated in the discharge using the area covered by the hysteresis loop [22]. In some of the available literature, the equations derived for the power calculation are based upon the geometric features of the Q-V diagram by assuming a perfect parallelogram [19, 23]. In practice, as will be demonstrated in Section 3, this ideal behaviour rarely occurs. For completion, the relationship between area and average power will be derived here, valid for any shape of the Q-V diagram. Differentiating Eq. (1) with respect to time, the current through the monitor capacitor *im*(*t*) becomes:

where the last equality is due to continuity of current through the series circuit of DBD + monitor capacitor in Figure 2. The instantaneous power *P*(*t*) in the DBD is then given by:

The time-averaged power

*reactive*power in the capacitive parts of the circuit will not average out to zero.

### 2.4 Selection of an appropriate monitor capacitor

In order to apply the Q-V method, a suitable capacitor must be selected. The required monitor capacitor is dependent upon the capacitance of the reactor *Ccell*. The capacitance of the monitor capacitor should greatly exceed the capacitance of the reactor, i.e. *Cm* ≫ *Ccell*. As a rule of thumb, a ratio of *Cm*:*Ccell* between 100:1 to 10,000:1 is generally appropriate. If the selected monitor capacitance is too small, the voltage across the capacitor will exceed the maximum voltage range of the oscilloscope (for a typical oscilloscope this is 20 V full scale), and the signal will over-range. The voltage on the monitor capacitor, *in the absence of discharging in the DBD*, will be:

Taking into account the common 10:1 attenuation for an oscilloscope probe, Eq. (10) divided by a further factor 10 provides a lower limit on the signals to be detected by the oscilloscope. As a rule-of-thumb, the peak signal to be detected *during discharging* can exceed this lower limit by a factor of 5–10, though this depends strongly on the configuration of the DBD. Typically, the greater the ratio between dielectric capacitance *Cdiel* and gap capacitance *Cgap*, the greater the amplitude of *Q*(*t*), and thereby *Vm*(*t*), will become during a full period.

Eq. (2) also shows that when *Cm* is too large compared to *Ccell*, the amplitude of the voltage across the monitor capacitor will become very small, and the resulting low signal-to-noise ratio will become problematic (a typical oscilloscope has a minimum range of 20 mV full scale, but also a non-zero noise floor in the 1 mV range). It is also worth noting that most oscilloscopes use 8-bit analog-to-digital converters (ADCs), which divides the full scale into 256 discrete steps. For accurate measurement of *Vm*(*t*), and thereby *Q*(*t*), optimising the value of *Cm* to make as much use of the oscilloscope’s full scale is recommended. Depending on the maximum values of *Vm*(*t*), it is possible to forego the use of 10:1 oscilloscope probe and directly attach the poles of the measurement capacitor to a coaxial line to the oscilloscope. This should only be attempted if *Vm*(*t*) ≲ 3 V, since the oscilloscope channel will have to be set to 50 Ω to prevent reflections in the line, which simultaneously has a low maximum DC voltage limit (usually < 5 V). The advantage of this method is a high bandwidth and a higher signal-to-noise than oscilloscope probes can provide.

Provided *Cm* ≫ *Ccell*, almost all the voltage applied to the reactor + monitor capacitor drops across the DBD, keeping the equivalent circuit in Figure 4 valid, while not subjecting the monitor capacitor to high voltages. Therefore, a relatively low voltage capacitor in the range of 100–250 V may be selected (a value motivated more by a desire for robustness than with an expectation of applying 100 V to it during measurements). With regards to the type of capacitor, class 1 ceramic capacitors are preferred, as they have relatively low parasitic inductances and parasitic capacitances, providing a greater accuracy and stability with resonant circuits (of which DBD reactors, as well as the measurement circuit, are examples). If possible, it is worth measuring the capacitance of the monitor capacitor and the assembled monitoring circuit with an LCR meter, as measured values can fluctuate from the values given by the manufacturer. The monitoring circuit can also introduce additional capacitance, leading to additional inaccuracies in determining the absolute value of *Q*(*t*).

The voltage across a shunt resistor, or an inductive Rogowski coil, can also be used in place of a monitor capacitor in Figure 2. This method relies on direct measurement of current *i*(*t*) from DBD to ground, instead of integrating the current on a capacitor. Time-integration of *i*(*t*) can then be employed in post-processing to obtain *Q*(*t*). Since filamentary discharges coincide with fast-rising currents in the sub-nanosecond range, this approach ideally requires a high bandwidth measurement system and a high sampling rate to prevent measurement errors. The advantage of integrating on a capacitor is essentially that no charge moving through the reactor can be ‘missed’, even with low bandwidth (and sampling rate) of the probe + oscilloscope, allowing for e.g. more accurate power measurements.

As a final note, certain reactor geometries have a poorly defined ground electrode, making it difficult to attach a monitor capacitor, shunt resistor, or coil. The ‘ground’ electrode can be electrically floating, for instance, or multiple potential pathways can exist for current to reach ground, such as with plasma jets impinging on a surface. In these cases, it may be beneficial to use a Rogowski coil after all, and measure current directly on the high voltage line between voltage source and reactor. This poses additional engineering and safety challenges, however, since unwanted discharging, or accidental application of high voltages to measurement devices must be prevented. While caution is advised, these problems can be overcome. Care must be taken to prevent sharp metallic edges from forming corona discharges, and air-gaps between high voltage line and coil from forming arc discharges. This can be achieved by covering and filling in all sharp edges and air gaps with a higher breakdown strength material, such as e.g. paraffin. as was done in [24].

## 3. Non-ideal DBD scenarios

There are a number of scenarios in which Q-V diagrams do not display a parallelogram shape. This can be due to the real, physical characteristics of the reactor, or experimental error. In this section, various shapes of Q-V diagrams will be discussed, along with the possible implications regarding the characterisation of the reactor.

The following deviations from ideal behaviour will be addressed:

Q-V diagrams with gradients less than

*Cdiel*Almond shaped Q-V diagrams, with rounded corners at the transition from non-discharging to discharging regions

Elliptical Q-V diagrams, with no straight lines at all

Noisy Q-V diagrams, particularly during ‘plasma on’ phases

Stepped Q-V diagrams

This list is not exhaustive, but should provide a troubleshooting guide for any problems that arise, both experimentally and in interpretation of data. The fundamentals for the analysis of these plots are all based on the equivalent circuit of Figure 4, combined with the theory provided in the previous sections.

### 3.1 Q-V diagrams with gradients less than *Cdiel*

A common irregularity observed in Q-V diagrams for DBDs and PBRs is a gradient during discharging changes depending on experimental conditions, despite the geometry of the reactor remaining the same. This is caused by partial discharging of the available (dielectric) area in the gas gap. Partial discharging is commonly observed when the voltage applied to the discharge gap is not far in excess of the reactor breakdown voltage [21, 25, 26]. It is also a common feature when dielectric packing materials are introduced into the gas gap, as is the case in PBRs, which lead to a complicated (electrical) geometry with a range of gap widths and breakdown voltages [13, 27, 28, 29, 30]. The latter case will be treated in the next section, while this section focuses on parallelogram-like Q-V diagrams resulting from plane-parallel reactor geometries.

Example Q-V diagrams where changing the applied voltage amplitude leads to different gradients in the discharging phase are shown in Figure 5. Aside from applied voltage amplitude, changing the fractional composition of the gas in the discharge, or changing the frequency of the applied voltage, can have similar effects [31]. In these cases, the gradient of the ‘plasma on’ phase is termed the effective dielectric capacitance *ζdiel*, to distinguish it from the dielectric capacitance *Cdiel*, which should only depend on the geometry of the reactor. The fact that the gradient during ‘plasma on’ phases can be less than, but never exceed, *Cdiel* was already discussed in Section 2.2. Examples of changes to *ζdiel* as a function of gap width, dielectric thickness and applied voltage are shown in Figure 6.

This data demonstrates that the higher the *Cgap*/*C*_{diel} ratio (corresponding to narrower gas gaps, and thicker dielectrics and/or lower permittivity of the dielectric material), the broader the range of applied voltage amplitudes over which partial surface discharging will occur. It also demonstrates that the value of *Cdiel* to be used in the equivalent circuit of Figure 4, and any subsequent analysis of *Q*-*V* diagrams, can simply be defined as the value towards which *ζdiel* saturates at sufficiently high applied voltage amplitudes. A method to characterise the properties of the reactor in the intermediate range where *ζdiel* < *Cdiel*, including the fractional discharged area, are described in detail in [21].

### 3.2 Almond shaped Q-V diagrams

Almond shaped Q-V diagrams, an example of which is depicted Figure 7, can be observed in PBRs, particularly with high dielectric constant materials [31], and with surface discharge DBDs such as plasma actuators [32]. In both cases, the almond shape is caused by the gradual expansion of the plasma across the available dielectric area during the discharge phase. In a plane-parallel DBD configuration, the gas gap is uniformly spaced and the plasma ignition voltage across the gap, the burning voltage *Ub*, is approximately constant throughout the discharging phase. As pointed out in Section 2.2, this constant voltage across the gap is a requirement for observing straight lines in Q-V diagrams during the discharging phase. In discharges with non-uniform gap widths, plasma will ignite across a wide range of gap voltages, since the breakdown criterion is not the same everywhere.

In PBRs, the electric field strength prior to discharging is highest at certain localised points in the gap, either in the small gas gaps between, or near sharp features of, packing particles [33, 34]. In a plasma actuator, see Figure 8, the electric field is initially strongest at the minimum distance between the two electrodes. In both cases, as the applied voltage increases during the AC cycle, discharging will commence at the point where the electric field strength is highest (and the breakdown criterion is met first) and then gradually expand across the surface of the electrode, as the breakdown criterion is met for wider and wider gaps. Whilst this plasma expansion occurs, the fractional surface area of the gap capacitance *Cgap* and dielectric capacitance *Cdiel* actually participating in the discharge increases, leading to an effective capacitance during discharging *ζdiel* which grows during a half-cycle, see Figure 8. When the dielectric area charged by the plasma reaches a maximum, the gradient of the line will be at its steepest. Similar to the ‘ideal’ DBD discharges, once the applied voltage *V*(*t*) reaches its maximum no further discharging can occur, because electric field strengths will only start decreasing everywhere in the gas gap and no further breakdown criteria will be met. This leads to the sharp apex at the maximum and minimum voltage and charge amplitudes on the Q-V diagram.

Regarding the analysis of almond shaped Q-V diagrams, the theory is the same as for Q-V diagrams with gradients less than *Cdiel* discussed in the previous section. The difference being that the effective capacitance *ζdiel* is now a function of time. In a similar fashion, *Cdiel* can be determined from the maximum observed slope (i.e. *ζdiel3* in Figure 8), preferably from Q-V diagram obtained at the highest attainable applied voltage amplitude.

Seen from the perspective of the equivalent circuit of Figure 4, what needs to be kept in mind is that the entire area of the reactor that can potentially discharge is treated as a single point. This means that *iplasma*(*t*) and *Ugap*(*t*) obtained via the equivalent circuit represent instantaneous values, averaged over the entire reactor area. Especially in packed beds, where the true electrical geometry is far more complicated than the simplified DBD equivalent circuit, no detailed, local information on the discharge properties can be obtained. Nonetheless, reactor-averaged values for e.g. *Ugap*(*t*) and effective surface coverage of the discharge can be determined and effectively compared between different reactor geometries and experimental conditions. See for example [31, 32], where it is also explained how the equivalent circuit in Figure 4 can be amended to include the capacitance of the packing materials.

### 3.3 Elliptical Q-V diagrams

Elliptical Q-V diagrams have been observed in a number of scenarios [35, 36]. For elliptical Q-V diagrams to be physical, there would have to be a continuous plasma current *iplasma*(*t*) during all phases of the discharge cycle. The elliptical shape is then indicative of a significant residual electron density in the discharge gap surviving through the ‘plasma off’ period between sequential (filamentary) discharge cycles. Below the possibility of this occurring will be investigated.

Referring once more to the equivalent circuit in Figure 4, the typical capacitive behaviour during a ‘plasma off’ period would cease if the ‘black box’ element representing the plasma maintains an effective residual impedance *Rresidual* lower than the impedance of the gap capacitance *Cgap*:

where *ω* = 2π*f*, with *f* the driving frequency of the applied voltage *V*(*t*). Using this criterion, the maximum impedance of residual volume plasma leading to an elliptical Q-V diagram can be determined. With typical electron mobilities at atmospheric pressure *μe* ≈ 10^{−1} m^{2}/Vs [37, 38] versus positive or negative ion mobilities *μion* < 10^{−3} m^{2}/Vs [39, 40, 41], we will assume for now that electrons determine the conductivity. Further limiting the analysis to plane-parallel DBD configurations with gap width *dgap* and electrode area *Adischarge*, we can write:

*ρresidual*the resistivity of the residual plasma,

*e*the electron charge,

*ne,res*the residual electron density and

*ε0*the permittivity of free space. By substituting Eqs. (12) and (13) in (11) and solving for

*ne,res*we find the minimum gas-phase electron density required to have a noticeable plasma current throughout a full period of the applied voltage:

This result indicates that the minimum required residual electron density does not depend on DBD geometry, only on the driving frequency of the applied voltage *f* and the mobility of charge carriers in the gas-phase.

The next question is what residual electron density can be sustained between discharge half-cycles. To estimate this, the approximate recombination time of residual electron-ion pairs *τe,res* at atmospheric pressure and room temperature can be compared to the driving frequency:

where a typical value for the electron-ion recombination rate *krec* is used [42]. According to Eq. (15), at a typical frequency *f* = 100 kHz, a residual electron density *ne,res* ≈ 10^{17} m^{−3} (ionisation degree < 10^{−8}) can be sustained. More detailed models, including losses of charged species to (dielectric) surfaces, predict *ne,res* ≳ 5×10^{17} m^{−3} under these conditions [43]. When compared with Eq. (14) this is sufficient to expect a Q-V diagram to have a noticeably elliptical shape. In fact, this is true for all frequencies, as well as if we assume conductivity to be determined by ion mobility instead of electron mobility. Why then are elliptical Q-V diagrams not consistently observed in DBD? The answer is that while *iplasma*(*t*) always remains greater than zero during ‘plasma off’ phases, it is negligibly small compared to the large plasma currents occurring during ‘plasma on’ phases. The tendency for Q-V diagrams to become more elliptical, especially with increasing power can, however, be observed as small increases to the ‘plasma off’ gradient [24, 44, 45]. This apparent increase in the *Ccell* capacitance can be attributed to the formation of plasma sheaths between the weak residual plasma in the centre of the gas gap and the surrounding surfaces, which can be treated as a small (and likely time-dependent) additional capacitance parallel to *Cgap* in the equivalent circuit. This is why *Ccell* is best determined from Q-V diagrams measured at low applied voltage amplitudes, ensuring that no discharging occurs.

Truly elliptical Q-V diagrams can be expected if ionisation (and increased electron densities) can be sustained over full periods of the AC voltage, but this is only expected for capacitive discharges at gas pressures well below 1 bar [46]. If elliptical Q-V diagrams are observed at atmospheric pressure, it could (a) be the result of a relatively unstable discharge combined with averaging Q-V data over a large number of applied voltage cycles, or (b) an error in the measurement setup.

A good way to check the measurement setup is to run it at low voltages, when no plasma is present in the reactor. If an elliptical Q-V diagram emerges, it can be indicative of a parasitic capacitance or inductance. A common source of parasitic components to the measurement circuit is poor connections between monitor capacitor, probe and/or oscilloscope. This can have an impact on the measurement of plasma power and the characterisation of the reactor when it is in operation, since the Q-V diagram may already have a non-zero area in the absence of plasma. This is especially important with small reactors, or applications where a high sensitivity power measurement is required [28]. The phase angle of an inductive circuit is different to a capacitive circuit, so that the phase shift between the voltage across the monitor capacitor *Vm*(*t*) relative to the applied voltage *V*(*t*) can be used to identify potential problems, or simply to assess the accuracy of any subsequent power measurements. Note that these phase shifts (and elliptical Q-V diagrams) can also emerge if the measurement delay between the high voltage probe for V(*t*) and the voltage probe for Q(*t*) is significant. Since 1 meter of coaxial cable will provide only a ≈ 3–4 ns delay, this is not a factor worth considering for large scale DBDs, but it does become relevant for electrical measurements requiring a high time-resolution, such as for single filament discharges (Figure 9).

### 3.4 Noisy Q-V diagrams

It is a common, and almost unavoidable, occurrence for Q-V diagrams to show noise during the discharging phase of the DBD cycle. The noise is caused by interference from the plasma microdischarges themselves, hence the reason that they only occur during the discharging phases. An example of noise experienced in Q-V diagrams is shown in Figure 10, as well as Refs. [47, 48]. The unfiltered plot in Figure 10 shows background noise during the capacitive phase, but larger spikes during the discharging phase of the DBD cycle.

The background noise is usually broadband in nature and, provided it is not due to measuring near the noise floor of the oscilloscope (see Section 2.4), can be attributed to RF pickup. To mitigate this type of noise it is essential to ensure the shielding on both ends of a coaxial line is connected to the same ground. Moreover, when using low voltage oscilloscope probes, it is good practice not to use the alligator clip ground wire supplied with the probe, but to solder one end of a short wire directly between the ground side of the monitor capacitor and wrapping the other end tightly around the grounded barrel of the probe. The grounded barrel of the probe may be covered by a plastic sheath, but this can usually be removed with ease. The concept behind this approach is to remove any undesirable ‘loop antennas’ from the circuit, which would otherwise pick up any radiated electromagnetic noise from both the DBD reactor and other nearby sources.

The large spikes are a direct consequence of the rapid increase in current (and correspondingly rapid shifts in charge) in the reactor + measurement system due to the ignition of individual filaments. With current rise times of < 1 ns, the individual discharges introduce high frequency harmonics into the measurement circuit. This becomes visible on the oscilloscope as ‘ringing’ signals, such as depicted in Figure 11. Generally, this ‘ringing’ is caused by impedance discontinuities in the measurement circuit. In any coaxial transmission line, transmitted voltage waves will reflect to some degree at points where the impedance is discontinuous. These impedance discontinuities tend to occur where the coaxial line is attached to the monitor capacitor, or where the line is attached to the scope, and will introduce at least some parasitic inductance. Since the value of this parasitic inductance *L* depends on the physical length of the discontinuity, with higher frequencies producing a higher *L* for a given length, the impedance created by any given discontinuity is proportional to *f2* and becomes significant for high frequency signals. The steep rising edge signals from a filamentary current pulse will then appear as in Figure 11, where a single pulse produces damped oscillations due to the R-L-C circuit formed by the measurement system. To reduce this parasitic inductance on the reactor side (which is likely the dominant source), best practice is to attach the probe head *and* ground line (or the core and shielding of the coaxial line, if no probe is used) as close as possible to the electrodes of the monitor capacitor. The number of coaxial connectors is also best kept to a minimum, i.e. using a single cable is recommended.

Note that parasitic inductance, and subsequent ringing, is always introduced wherever a coaxial transmission line is interrupted, irrespective of whether the connections are mechanical or soldered. A standard method of removing the ringing is by including a low pass filter in the circuit. It is desirable to do this in the measurement circuit itself and not in post-processing, since ringing can introduce significant overshoots in the (apparent) measured voltage *Vm*(*t*), making it impossible to make full use of the vertical resolution of the oscilloscope. A capacitor *C* in series with a resistor *R*, placed between the electrodes of the monitor capacitor, with the probe electrodes attached to the filter capacitor will provide a cut-off frequency *fLP* = (*RC*)^{−1}. Common values for *fLP* are 50 MHz, *R* = 100 Ω and *C* = 200 pF. This method will, however, reduce the bandwidth of the measurement and will reduce signal magnitudes of *Vm*(*t*) to some degree, introducing errors into e.g. power measurements. To determine the highest possible cut-off frequency for low pass filtering, performing a Fast Fourier Transform (FFT) of the unfiltered measured signal can be considered [49]. If it is of particular interest to measure the rise time of a single filamentary discharge, the loss of bandwidth introduced by filtering may be undesirable. It is worth keeping in mind, however, that this rise time may be too short to readily measure with standard equipment in any case [50]. Additional noise removal can be done in post-processing using the Savitzky-Golay algorithm [51]. This is a commonly used averaging technique that provides satisfactory noise reduction whilst simultaneously minimising the loss of signal magnitude.

### 3.5 Stepped Q-V diagrams

The stepped Q-V diagram typically occurs when a small electrode area is used, making the number of individual streamers that can be formed per AC half-cycle low enough for individual filaments to be observed. In this case each ‘step’ in the Q-V diagram corresponds to an individual filamentary streamer transferring charge between the electrodes, see Figure 12 for an example. Stepped Q-V diagrams cause difficulty in trying to determine certain reactor operating characteristics from the geometry of the Q-V diagram, particularly burning voltage *Ub* and the maximum capacitance *Cdiel*. The nearly horizontal segments between each step have a gradient close to *Ccell*, since very little plasma current *iplasma*(*t*) is flowing between filament ignitions. The steep, almost vertical part of each step in Figure 12, is the point where *iplasma*(*t*) is highest, with a gradient that is clearly higher than the average slope along the line BC. This high gradient violates the statement in Section 2.2 that the slope in a Q-V diagram can never exceed *Cdiel*. However, this statement is valid only for parallelogram-shaped Q-V diagrams, and assumes the discrete nature of individual discharges can be neglected. Instead, Eq. (5) can be used to interpret the nearly vertical slopes: during these instances d*Ugap*/d*V* would have to be less than zero for d*Q*/d*V* to exceed *Cdiel*. In other words, during a filamentary discharge, the *area*-*averaged* gap voltage *Ugap*(*t*) in the reactor must drop faster than the applied voltage *V*(*t*) increases. This is exactly what occurs during the nearly vertical gradients seen in Figure 12. In practice, however, *V*(*t*) also decreases during a single discharge (i.e. d*V* < 0), because real voltage sources are not ideal. The effect of d*V* < 0 during discharging can also be seen in a number of vertical steps in Figure 12 as negative gradients on the Q-V diagram (sloped from bottom right to top left). Since this implies that d*Q*/d*V* < 0, Eq. (5) suggests that d*Ugap*/d*V* > 1 at these points. Since d*V* is negative, d*Ugap* must also be negative and have a greater magnitude than *dV*. Both of these features can be observed in Figure 13, where *iplasma*(*t*) and *Ugap*(*t*) have been calculated from the data in Figure 12 using the equivalent circuit approach.

To utilise the equivalent circuit of Figure 4 to determine (reactor-averaged) discharge properties from Q-V diagrams, as was done in Figure 13, the average gradient of the BC line segment can be used, as indicated in Figure 12. Due to variations in ignition voltage and amounts of charge transferred per filament, as well as variations in the number of streamers per discharge cycle, it is advised to average over a large number of applied voltage cycles when determining both *ξdiel* and *Cdiel* (see also Section 3.1) Note that once *Cdiel* is determined in this way, it can subsequently be used in analysis of single applied voltage cycles as well.

Since reactors for study of individual discharges are necessarily small, there is likely to be a large parasitic reactor capacitance, which enlarges the gradient *Ccell* of the AB line segment in Figure 12. In these cases it is worthwhile to simply calculate an expected maximum reactor capacitance *Ccell,calc* from the DBD geometry and adding the parasitic reactor capacitance *Cparasitic* = *Ccell*−*Ccell,calc* as an additional parallel capacitor to the equivalent circuit of Figure 4, see e.g. [12, 23, 24]. A convenient expression for calculating *Cparasitic* in plane-parallel configurations is:

*dgap*,

*ddiel*and

*εr*the gap width, dielectric thickness and dielectric constant, respectively, and

*ξdiel,sat*the average gradient of the BC line segment at high applied voltage (at which point it saturates to a constant value, as in Figure 6). The results depicted for

*Ugap*(

*t*) in Figure 13, with a nearly constant voltage

*Ub*at each discharge ignition, was only achieved after taking into account a parasitic capacitance

*Cparasitic*= 45 fF on a total cell capacitance

*Ccell*= 76 fF. Note also that the dielectric capacitance to be used in the equivalent circuit is

*Cdiel*=

*ξdiel,sat*−

*Cparasitic*[21].

If the DBD features only one electrode covered with a dielectric, as is the case in Figure 12, only one half of the discharge cycle may be stepped, while the other shows a continuous discharge during at least part of the discharging slope. The purely filamentary discharge occurs when the dielectric side acts as cathode, with filaments propagating towards the dielectric in the same direction as the current, while a Townsend-like discharge can occur when the metal electrode serves as cathode [5, 12, 52, 53]. In asymmetric cases in general (whether due to geometry or driving voltage), the average gradients of BC and DA may be somewhat different and it may be required to use a value for *Cdiel* averaged over both half-cycles. Using constant values for all capacitive elements in the equivalent circuit model is a requirement to ensure continuity of charge, or more complex models must be considered instead.

## 4. Single filaments and filament distributions

As we saw in the previous section, it is possible to discern individual filaments in Q-V diagrams. The existence of these individual filaments in DBDs was first discovered by Buss in 1932 [54]. In his work, he used photographic glass plates as dielectrics from which a number density of 15 filaments/cycle/cm^{2} could be determined. Similar photographic methods have resulted in number densities between 3 and 40 filaments/cycle/cm^{2} for DBDs in air at atmospheric pressure [55, 56, 57, 58]. However, filament footprints tend to overlap during a half-cycle and only a very limited number of cycles can be studied in one exposure, making accurate counting difficult. Monitoring the current through the DBD is, therefore, the preferred method for filament counting. Moreover, this allows the transferred charge/filament to be derived as well.

For filament counting to work, filaments need to be sufficiently spread out over time. Since this is not necessarily the case, studies of filamentary current are often restricted to geometries favouring a single filament per voltage cycle [55, 59]. A small diameter current probe embedded in a larger planar DBD has also been used, but only to obtain data on individual current pulses [57, 60, 61]. Many literature sources use relatively large electrode surface areas >1 cm^{2}, combined with direct digital post-processing on the DBD current *i*(*t*) to determine single filament properties [62, 63, 64, 65, 66, 67, 68]. In this section, results are presented for a plane-parallel DBD with a surface area of 7 mm^{2}, large enough to have multiple interacting filaments per half-cycle, but small enough to prevent significant overlap between them in time. The measurement circuit in this case is an R-C circuit, with a decay constant τ = RC lower than the duration of a single half-cycle, see Figure 14. The voltage *V*_{m}(*t*) from the capacitor is passed through an analog circuit which first corrects for the capacitive displacement current by subtracting a signal (*Cgap*/*Cm*)*V*(*t*) (see also Eq. (3)), followed by the creation of a second, delayed signal *V*_{m}(*t* + *Δt*)−(*Cgap*/*Cm*)*V*(*t* + *Δt*). By subtracting the delayed signal from the original signal (with *Δt* ≈ 50 ns), a pulse train is created in which the height of each pulse corresponds to the horizontal charge step in a stepped Q-V diagram; see Figure 14 for a simplified schematic of this approach. Using an ADC, robust post-processing can then be performed, in which transferred charge/filament can be determined with high fidelity, as well as allowing for identification of near-simultaneous discharges by monitoring the occurrence of multiple rising slopes within a single time interval *Δt*. Note that the pre-factor from Eq. (3) needs to be applied in post-processing to obtain the actual charge transferred by the plasma, instead of the transferred charge as it appears in the external circuit. A more detailed description of this pulse counting method can be found in Ref. [12].

Figure 15 shows results obtained by applying this method to a multitude of DBD configurations. Figure 15(a) shows the average (or mean) charge transferred per filament, while Figure 15(b) shows the number density of filaments occurring during a half-cycle. Several scaling laws are revealed in this data, which are irrespective of the type of dielectric used: average charge/filament increases with increasing gap width *dgap* and decreases with dielectric thickness *ddiel*. Furthermore, the lower both *dgap* and *ddiel*, the more filaments can be ignited per half-cycle at a given applied voltage amplitude. When using thin gaps and thin dielectrics, plasma current densities can be as high as 100 A/m^{2} averaged over time and area. With filament channels in air possessing a cross-section of about 10^{−8} m^{2} and an average duration of 20 ns [69, 70], this can actually amount to peak current densities of 10^{9} A/m^{2} at the locations of filaments. As Figure 15(a, b) show, the nature of the dielectric material seems to affect the discharges mainly by the capacitance they provide in the form of *Cdiel*. In this regard, however, it is worth noting that none of the three materials presented here possess ‘extreme’ electrical properties, with *εr* ≤ 10. Materials such as BaTiO_{3}, with *εr* > 1000 could present quite different behaviour [31, 48].

Aside from the behaviour of an average filament, the variation from filament to filament can be studied in detail using the same electrical measurements. Figure 16 shows histograms of the charge/filament obtained for two different systems: in both configurations the same alumina dielectric with *ddiel* = 0.6 mm and gap width *dgap* = 0.6 mm was used, while in Figure 16(a), the plane metal electrode was replaced with a single rounded metal wire (Ø = 0.3 mm). In this way, Figure 16(a) shows the distribution of charge/filament for only a single filament per half-cycle, while Figure 16(b) shows the same distribution with up to 9 filaments per half-cycle. It is immediately obvious that a single filament produces a nearly symmetric distribution over many consecutive ignitions, while multiple filaments per half-cycle add up to a very skewed distribution. The degree of asymmetry in the distributions can be represented by the non-parametric skew *S*:

*μ*the mean,

*ν*the median and σ the standard deviation. While

*S*≈ 0 for a single, non-interacting filament, it increases to

*S*= 0.16 ± 0.04 for all plane-parallel DBD configurations, irrespective of applied voltage amplitude, gap width, dielectric thickness or dielectric material. Furthermore, the pin-to-plane distributions fit well to a normal distribution, while the plane-parallel configuration is described well by a log-normal distribution, as depicted in Figure 16. While the normal distribution for a single filament re-igniting every (half-)cycle is not surprising, multiple filaments igniting at different moments and in different places during a (half-)cycle clearly interact to produce a relatively predictable charge/filament distribution. Accounting for these log-normal-like distributions is beyond the scope of this chapter, but studies of this interaction can be found in e.g. Refs. [71, 72]. The existence of this additional scaling law for plane-parallel DBDs, where charge/filament follows a log-normal distribution with

*S*= 0.16 ± 0.04, is presented here to demonstrate the potential of electrical diagnostics in assessing the behaviour of a complex, discrete system. Similar distributions could be obtained for e.g. a suitably shortened coaxial packed bed reactor, allowing computer simulations of individual filaments to be compared to real experimental data in greater detail.

## 5. Conclusions

In this chapter, a thorough description of charge-voltage (*Q*-*V*) measurement techniques is provided. Pointers are given for properly setting up *Q*-*V* measurements, as well as the theoretical framework required to interpret results. Causes for deviation from ideal parallelogram-shaped Q-V diagrams are treated in detail, including Q-V diagrams with variable gradients, almond-shaped and elliptical Q-V diagrams, and noisy or stepped Q-V diagrams. The chapter is rounded off with a discussion on extending *Q*-*V* measurements to include monitoring of individual microdischarges.

## Acknowledgments

The work of Floran Peeters is part of project ‘EnOp’ of the Interreg V programme Flanders, Netherlands, with financial support from the European Union. This chapter is dedicated to the memory of Rein Rumphorst (1925-2018), without whom our measurements would have worked out only as well as we deserved.

## Notes

- Alternatively, some power supplies feature an output voltage monitor. This method can be used, but should be treated with caution as a small phase difference in voltage and charge signals can lead to significant errors in power measurement.
- It is also possible to calculate approximate values for Cdiel and Cgap for simple geometries. For a planar, parallel plate capacitor this is given by C = εrε0A/d. Where ε0 is the permittivity of free space, εr is the relative permittivity of the dielectric, A is area and d is dielectric thickness. In principal, this should give a reliable value of reactor capacitances, however, this method ignores edge effects which may be significant in some reactor geometries.