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CMOS Circuits and Systems for Lab‐on‐a‐Chip Applications

Written By

Yehya H. Ghallab and Yehea Ismail

Submitted: 16 October 2015 Reviewed: 24 March 2016 Published: 29 June 2016

DOI: 10.5772/63303

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Complementary metal oxide semiconductor (CMOS) technology allows the functional integration of sensors, signal conditioning, processing circuits and development of fully electronic integrated lab‐on‐a‐chip. On the other hand, lab‐on‐a‐chip is a technology which changed the traditional way by which biological samples are inspected and tested in laboratories. A lab‐on‐a‐chip consists of four main parts: sensing, actuation, readout circuit and microfluidic chamber. Lab‐on‐a‐chip gives the promise of many advantages including better and improved performance, reliability, portability and cost reduction. This chapter reviews the currently used lab‐on‐a‐chips based on CMOS technology. Also, this chapter presents and discusses the features of the existing CMOS based lab‐on‐a‐chips and their applications at the cell level.


  • lab‐on‐a‐chip
  • biochips
  • biological cells
  • CMOS technology
  • integrated sensors

1. Introduction

Integration and miniaturization are the two main factors in the device engineering research, and these two factors are also the main features of the lab‐on‐a‐chip technology. The main contributor for this major trend is the fast advances of integrated circuit (IC) technology. As a result of miniaturization, portable and cheaper equipment replaced the traditional bulky and expensive equipment.

In the field of cell biology, the use of micro‐ and nano‐fabricated lab‐on‐a‐chip using active substrates and integrated sensors [1] is still at experimental stage. In order to replace traditional optical inspection techniques, these techniques have been tested for the identification of objects at microscopic level to envision several applications [2].

Many research groups believe that lab‐on‐a‐chip technology will be the major contributor to novel diagnostic tools. The target of these research groups is to have lab‐on‐a‐chip systems that will allow healthcare suppliers and workers in poorly equipped clinics to do different tests which need more sophisticated equipment in a simpler way, for example, nucleic acid assays and immunoassays tests [3]. Thus, lab‐on‐a‐chip innovation is a vital part of the endeavors to upgrade and enhance worldwide healthcare system, especially through the advancement of clinics and laboratories’ testing techniques [4].

One dynamic area of lab‐on‐a‐chip research includes approaches to analyze and oversee HIV infections. In view of UNAIDS 2014 report [5], more than 40 million individuals are tainted with HIV around the world; 13 million of these individuals get hostile to retroviral treatment. Around 55% of individuals with HIV have never been tested for the infection [5].

Measuring the quantity of CD4+ T lymphocytes in a man’s blood is an exact and right approach to figure out whether a man has HIV and to track the advancement of a HIV contamination. Right now, flow cytometry is the brilliant standard for acquiring CD4 checks; yet, flow cytometry is a confounded method that is not accessible in most developing regions since it requires prepared professionals and costly instruments [6, 7].

The vicinity of the complementary metal oxide semiconductor (CMOS) technology allows the integration of sensors, amplifiers, filters and other circuitry on a single chip. Also, CMOS technology leads to a totally electronic integrated lab‐on‐a‐chip utilizing a homogenous technology [8, 9]. CMOS is an innovation used in building integrated circuits. It is used in microcontrollers, static RAM, registers, microchips and other digital circuits. CMOS technology is utilized also for a wide assortment of analog circuits, for example, image sensors, amplifiers, analog to digital converters, and transceivers for communication modules. Low static power consumption and high noise immunity are two advantages of CMOS devices [10].

Numerous specialists and research teams have begun to utilize the CMOS technology in lab‐on‐a‐chip applications [11, 12]. These applications incorporate, yet not restricted to, identification of neurons’ activities, microorganism discovery and portrayal, electric field imaging, flow cytometry and polymerase chain reaction (PCR) applications [1317].

This chapter covers and presents the state of the art in CMOS circuits and systems for lab‐on‐a‐chip applications. It summarizes and reviews different circuits and systems of CMOS‐based lab‐on‐a‐chip technology at the cell level. These circuits and systems include: polymerase chain reaction (PCR), microorganism detection and characterization, neuronal activity detection, flow cytometry and electric field imaging applications.


2. Lab‐on‐a‐chip based on CMOS technology

2.1. Polymerase chain reaction (PCR)

CMOS‐based lab‐on‐a‐chip has numerous applications in the science and biomedical fields. It is likewise utilized as a part of numerous different fields, for example, environmental applications. In medicine, lab‐on‐a‐chip can be utilized as a part of real‐time polymerase chain reaction (PCR) applications to identify bacteria, viruses and cancers [18, 19]. PCR is a biochemical technology in molecular biology to duplicate one or few DNA pieces, creating thousands to a huge number of duplicates of a specific DNA sequence [20].

The incredible preference about PCR is in the snappy and specific enhancements of target qualities through a cyclic and enzyme‐catalyzed [21]. PCR procedures have been connected to mutation analysis and DNA [18, 19, 21]. As of late, Norian et al. [22] displayed an ongoing PCR lab‐on‐a‐chip that was implemented using 0.35 μm CMOS technology. It performs electrowetting droplet‐based transport, reagent heating, temperature sensing and integrated fluorescence measurements.

Figure 1 demonstrates the 4 × 4mm chip. It has a 7 × 8 array of 200 × 200 μm electrodes [22]. Using electrowetting‐on‐dielectric transport technique, each droplet can be dislodged [23]. The three temperature zones on the top of the chip are managed by a heater and temperature sensors. Based on this PCR lab‐on‐a‐chip, a droplet can be allocated at a thermal cycled area on the chip. Also, a thermal equilibrium can be obtained in a 500 ms at most, if a droplet's volume is under 1nL. Likewise, fluorescent measurement using integrated Geiger‐mode single‐photon avalanche photodiodes (SPADs) allows for sensitive fluorescent detection. Figures 2 and 3 show the on‐chip thermal regulation and PCR thermal cycling on chip, respectively.

Figure 1.

PCR Chip [22].

Figure 2.

On‐chip thermal regulation. (a) Layout of metal‐resistor temperature sensors; (b) layout of polysilicon heaters; (c) cross‐sectional COMSOL simulation; (d) IR image displays distinct temperature region generated by a single polysilicon heater [22].

Figure 3.

PCR thermal cycling on chip. (a) Fluorescence measurements for Staphylococcus aureus target; (b) on‐chip temperature profile [22].

2.2. Dielectrophoresis (DEP)

Lab‐on‐a‐chip based on CMOS technology is utilized as a part of biochemical tests, where it is utilized to quantify the presence of a target element which can be a biochemical substance or a medication or a cell in a sample [24]. Diverse range of uses is the dielectrophoresis applications where CMOS‐based lab‐on a‐chip is utilized to recognize microbes, bacteria and cancer cells [14].

Figure 4.

The lab‐on‐a‐chip architecture for cells manipulation and sensing [25].

Manaresi et al. [25, 26] proposed a CMOS lab‐on‐a‐chip for cell control and identification. The proposed lab‐on‐a‐chip is fabricated on a standard 0.35 μm CMOS technology. This CMOS lab‐on‐a‐chip comprises three principle parts, they are: actuation, sensing and microfluidic package. The lab‐on‐a‐chip framework, see Figure 4, has two‐dimensional array of microsites; these microsites provide the following functions: (1) produce the electric field which is important to make dielectrophoretic cages and (2) optically sense the existence of a single particle or cluster on the top of the microsite. Each microsite comprises of an actuation electrode, executed with a top metal plate, and underneath embedded circuitry for programming and identification. Row and column decoders can address any microsite in a random access mode, for both actuation and sensing. Particles are detected by photodiodes, embedded in the substrate that measure signal variations from uniform light impinging on the chip surface. Recently, Miled et al. presented a CMOS‐based lab‐on‐chip system for dielectrophoresis‐based cell manipulation and detection [27]. The lab‐on‐a‐chip based on CMOS technology is fabricated utilizing a CMOS full‐custom chip and a microfluidic chamber. The CMOS chip is used to pass on all parameters required to control the dielectrophoresis (DEP) parameters, for instance, electric field intensity, speed of the field and the profile of the electric field applied on the lab‐on‐a‐chip.

2.3. Flow cytometry

Flow cytometry applications are implemented using CMOS‐based lab‐on‐a‐chip. In flow cytometry, fluorescence markers are used to tag either biological cells or single particle that is immersed in an aqueous media. These cells are hydrodynamically focused and made to traverse a small region of space across which a focused laser beam is used [28].

The input laser light will be scattered and/or fluorescence produced light will be released when a cell passes on a light source. These optical signs provided by the particles will be aggregated as spectral components of predominantly visible light. Utilizing optical multipliers and other light instrumentation, the obtained signals can be utilized to recognize and evaluate the biochemical or biophysical attributes of the cell sample.

Hartley et al. introduced a CMOS‐based platform for microfluidic cytometry, where optical image detecting is incorporated on the microfluidic substrate. The stage is using flip‐chip bundling innovation. Figure 5 shows a schematic diagram of the general flip‐chip digital cytometry [29].

Figure 5.

Photograph of the linear active pixel CMOS sensor chip with interface pads, digital logic block and analog signal path indicated [29].

As of late, Dupont et al. displayed a lab‐on‐a‐chip that was manufactured based on silicon involving a framework of 84 diodes, i.e., single photon avalanche diodes (SPADs), to distinguish and separate fluorescently labeled single cells and fluorescent beads in a polydimethylsiloxane (PDMS) cartridge that is situated on the CMOS chip [30]. The identification depends on the diverse photon tally when either a fluorescent or a non‐fluorescent bead or cell is available over a SPAD, because of the extra photons radiated from a fluorescent item. This strategy permits magnifying instrument‐less fluorescence recognition and allows simple trade of the expendable microfluidic cartridge [30, 31].

2.4. Neuronal activity monitoring

Neurons are biological cells specialized in transmission and processing of information [32]. The basic neural signals are action potentials, which are transient changes of the voltage drop across the cell membrane with a typical and defined shape.

The action potential is typically 70 mV peak‐to‐peak. Today’s standard devices utilized to measure the action potential are patch pipettes [32] or microelectrodes [33]. These apparatuses have prompted awesome change in the field of neural cell observing. Though, these strategies face downsides, for example, they require an elaborate mechanical setup, which permits observing not many cells in parallel as it were. Along these lines, they are for the most part not suitable to satisfy high‐throughput prerequisites. Additionally, long‐time recording is not feasible, because of the intrusive sort of contact, decreasing the life time of the cell.

Figure 6.

Architecture of sensor array with complete system [34].

Noninvasive (extracellular) recording techniques open a way to overcome these drawbacks [3436].

In extracellular recording strategy, cells are refined straightforwardly on top of a transducing component, which is for the most part either a metallic cathode or a floating gate transistor [34, 35]. At the point when an action potential happens in a cell, the nearby stream of particles all through the cell causes the membrane to be polarized in a non‐uniform way. The ionic current streams over the cleft resistance and sets up an electric field which prompts electrical charge in the fundamental transducer, which is the recorded signal.

Eversmann et al. proposed a CMOS lab‐on‐a‐chip for non‐invasive recording and detection of neuronal activity [34, 35]. Figure 6 shows the system setup and chip architecture. Heer et al. [37] presented a CMOS lab‐on‐a‐chip for bidirectional communication (stimulation and recording). Figure 7 shows a picture of the CMOS lab‐on‐a‐chip. Figure 8 shows a schematic of the overall system.

Figure 7.

Micrograph of the chip [37].

Figure 8.

Block schematic of the overall system architecture [37].

Recently, Rothberg et al. [38] presented a CMOS sensor chip which can be used to harbor neurons and glial cells in vitro. The CMOS chip incorporates a vast cluster of sensor components, each with a single floating gate connected to an underlying ion‐sensitive field‐effect transistor (ISFET), to gauge the pH [39].

2.5. Electric field imager

Ghallab et al. [12, 40] presented a CMOS‐based lab‐on‐a‐chip. The used technology is CMOS 180 nm TSMC technology. This lab‐on‐a‐chip is utilized to get electric field images for biocells. These images depend on the electrical characteristics of the cells which can be utilized to distinguish between various sorts of cells [12]. Figure 9 shows the die picture; the total die area is 0.75 × 0.6 mm. The CMOS‐based lab‐on‐a‐chip includes two main parts. They are: (1) the actuation part, that generates the planned non‐uniform electric field pattern; the actuation part has four electrodes that generate a DEP force to levitate the cell that should be identified; (2) the sensing part, which is an array of the differential electric field sensitive field effect transistor (DeFET) sensor [12, 40, 41].

2.5.1. The actuation part

The actuation electrodes are the quadrupole setup, see Figure 9. Utilizing this arrangement, the profile of the non‐uniform electric field can be controlled by associating the entire four electrodes or few of them. Likewise, the quadrupole levitator contains an azimuthally symmetric electrode arrangement fit for supporting passive stable molecule levitation [42].

Figure 9.

The Die picture shows the quadrupole electrodes and the DeFET sensors [42].

2.5.2. The sensing part

The sensing part is made out of an array of DeFETs. This array is situated around the center of the chip, where the cell is levitated (suspended). In DEP levitation, the controlling electric field is a non‐uniform electric field. Consequently, we can recognize the electric field by utilizing the electric field sensitive field effect transistor [eFET] as an electric field sensor.

Figure 10.

Physical structure of an eFET [12, 42].

Figure 10 demonstrates the physical structure of the eFET. It comprises of two neighboring drains, two nearby floating gates with separation space “d” between the two floating gates, and one source.

For the eFET, it is proportionate to two indistinguishable enhancement MOSFET transistors. Affected by the non‐uniform electric field, different current passes through each drain. Because of the drain current reliance on the gate voltage, the eFET can sense the difference between the two gate voltages, which mirrors the magnitude of the used non‐uniform electric field. To increase the measurement range of the eFET, CMOS technology is used to implement the differential electric field sensitive field effect transistor (DeFET) sensor, and this sensor will be the basic sensor in the sensing part of the proposed electric field imager [4042].

2.5.3. DeFET sensor

The DeFET consists of two complementary eFETs, one is a P eFET and the second one is an N eFET [12, 42]. The equivalent circuit of the DeFET is shown in Figure 11.

Figure 11.

An equivalent circuit of a DeFET [12], the two gates of P eFET and N eFET are connected with each other, and there is a cross coupling between the two drains of the P eFET and the N eFET. The output current IOut is equal to the difference between the two drain currents IpIn (i.e., IOut = IpIn,). Ip and In are functions of the two applied gate voltages Vin1 and Vin2, respectively.

The DeFET is intended to accomplish a voltage VOut, specifically identified with the difference between the two gate voltages (Vin1Vin2), and Vin1Vin2 is equivalent to the generated electric field over the two gates (E) (E) multiplied by the distance between them (Vin1Vin2/Y = E), where Y is the distance between the two split gates, which is constant. Thus, VOut is related straightforwardly to the non‐uniform electric field's intensity. In this way by measuring VOut, the non‐uniform electric field intensity can be obtained.

To extract an expression that relates VOut and E, and from Figure 11, the output current (Iout) is:


The sensitivity is given by


where gm is the transconductances of the transistors M2 and M4, which have equal gm and Y is the distance between the two gates.

From (2)


The output voltage (Vout) can be expressed in terms of the sensitivity and the electric field:


where Vuni is the output voltage due to a uniform electric field (i.e., Vin1 = Vin2), and RL is the load resistance. From (2) into (4)


From equation (5), it can be observed that Vo is related linearly to the intensity of the non‐uniform electric field generated on the top of the DeFET sensor. Thus, in an array form of DeFET sensors, an image related to the electric field intensity at different locations can be extracted.

2.5.4. Experimental results

The CMOS electric field imager is experimentally examined with micro‐beads having a relative permittivity of 2.5 and radius of 4.5 and 10.45 μm, respectively. The experiment was done in two steps. First, the chip is tested on air. Second, it is tested with micro‐beads suspended on medium. This CMOS electric field imager allows sensing the impact of the cells on the electric field intensity profile.

Figures 12 and 13 show sample of the results. The configuration used is as follows: (1) a 3V sinusoidal signal with 3 MHz frequency is connected to Electrode 2 and Electrode 4, see Figure 9; (2) an out of phase (−3V) sinusoidal signal with 3 MHz is connected to Electrode 1 and Electrode 3. The cells were suspended in de‐ionized water with a measured conductivity between 1.3 and 1.9 μs/cm. A microscope with digital camera is used to observe the particles from the top.

Figure 12.

Levitated polystyrene cell with diameter 8.9 μm [42].

Figure 13.

Levitated polystyrene cell with diameter 20.9 μm [42].

Figures 12 and 13 demonstrate a trapped cell not long after the electric field is turned on, simply over the center of the imager. The levitated/trapped cell shows up out of focus of the microscope's focal length [42]. Figure 14 shows the measured output voltage from the DeFET sensor numbers 1, 4, 7 and 10, in air and after adding the suspending fluid, which contains 4.5 and 10.5 μm radius polystyrene microspheres. From this figure, it can be noticed that DeFETs 4 and 7 show lower readings compared with DeFETs 1 and 10. Also, note from Figure 14 that for the cells with 20.9 μm diameters, DeFETs 1, 4 and 10 provide high readings, while DeFET 7 does not. Leading to the surmise that there are cells above 1, 4, and 10, but no cells above DeFET 7 [42].

Figure 14.

The DeFET sensors’ response in air and in fluid contains different cell size [42].


3. Conclusion

In this chapter, up‐to‐date, advances in CMOS circuits and systems based lab‐on‐a‐chip are provided and discussed. Additionally, distinctive applications of CMOS lab‐on‐a‐chip are presented. CMOS‐based lab‐on‐a‐chip guarantees many advantages to be provided to the biology and medicine fields. These advantages are portability, disposability and miniaturization. Also, these advantages allow scientists to do complex experiments anywhere with portable devices. However, until now, there is an unmet need for lab‐on‐a‐chip to effectively deal with the biological systems at the cell level.



This research was partially funded by Zewail City of Science and Technology, AUC, the STDF, Intel, SRC, Mentor Graphics, ASRT and MCIT.


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Written By

Yehya H. Ghallab and Yehea Ismail

Submitted: 16 October 2015 Reviewed: 24 March 2016 Published: 29 June 2016