Switching states of the individual inverters
Abstract
Openend winding induction machines fed from two standard twolevel voltage source inverters (VSI) provide an attractive arrangement for AC drives. An alternative approach is to use a dual output indirect matrix converter (IMC). It is well known that IMC provides fully bidirectional power flow operation, with small input size filter requirements. Whilst a standard IMC consists of an AC–DC matrix converter input stage followed by a single VSI output stage, it is possible to replicate the VSI to produce multiple outputs. In this chapter, an openend winding induction machine fed by an IMC with two output stages is presented. Different modulation strategies for the power converter are analyzed and discussed.
Keywords
 Openend winding
 Electrical drive
 Matrix converter
 Pulse width modulation (PWM)
1. Introduction
An openend winding induction machine, fed by two 2level VSIs, offers several advantages when compared to a standard wye or delta connected induction machine drive. The main features of an openend winding induction machine drive can be summarized as [1, 2]: equal power input from both sides of each winding, thus each VSI is rated at half the machine power rating; each phase stator current can be controlled independently; possibility to have twice the effective switching frequency (depending on the modulation strategy); extensibility to more phases, therefore multiphase induction machines can be considered if current reduction is required; possibility of reducing commonmode voltage; and certain degree of fault tolerance, as there is voltage space vector redundancy.
However, an openend winding induction machine drive can have some drawbacks, such as [1]: possibility of zero sequence current flowing in the machine because of the occurrence of zero sequence voltage; increased conduction losses; more complex power converter requirements, i.e., more power devices, circuit gate drives, etc.
To supply energy to an openend winding machine, different power converter topologies have been developed; for instance, [3–6] propose an openend winding induction machine drive based on two 2level VSIs fed from isolated DC sources. This topology has the advantage of avoiding the circulation of zero sequence current; however, two isolation transformers are needed. On the other hand, [7–11] present a topology based on two 2level VSIs fed by a single DC source. In this case, a zero sequence current could circulate in the machine windings (depending on the modulation strategy used), but just one transformer is needed, reducing the volume and cost of the drive.
Multilevel topologies for openend winding AC drives are presented in [12–16] where different voltage levels can be achieved in the machine phase windings with certain power converter configurations, then reducing the output voltage distortion but increasing the system cost and complexity.
In the past decades, significant research effort has been focused on direct frequency changing power converters, such as the matrix converter (MC) [17] or the indirect matrix converter [18]. It is known that these power converter topologies offer a suitable solution for direct AC–AC conversion, achieving sinusoidal input and output currents, bidirectional power flow capability and controllable input power factor, without using bulky energy storage elements [18]. Matrix converters have been utilized to supply openend winding AC machines such as reported in [19–21].
In this chapter, the application of an IMC with two output stages to supply energy to an openend winding induction machine is described [22–24]. For evaluation purposes, simulations and experimental results are presented.
2. Power converter topologies for openend winding induction machine drives
An openend winding induction machine drive can be supplied by different configurations of power converters. Some of the most common topologies will be reviewed in this chapter.
2.1. Two 2level voltage source inverters fed by isolated DC sources
This is the basic power converter for openend winding AC drives. The circuit configuration is shown in Figure 1 where a standard twolevel VSI is connected at each side of the machine stator winding [3]. The VSIs are supplied by isolated DC power sources.
The voltage vectors for inverter 1 are shown in Table 1; the same space vectors are valid for inverter 2, but with superscript 2. As each VSI can produce eight voltage space vector locations independent of the other, there are 64 voltage vector combinations of the full converter, resulting in a vector locus similar to a threelevel neutral point clamped (NPC) inverter [6].










Let
2.2. Two 2level voltage source inverters fed by a single DC source
This topology is basically the same described in Section 2.1, but now just one DC supply is considered for the drive, as shown in Figure 3. The disadvantage of this converter is that zero sequence current could circulate in the machine windings because of the generation of output zero sequence voltage; however, this issue can be addressed with an appropriate modulation strategy for the inverters [7].
2.3. Multilevel topologies
Several multilevel power converters have been developed for openend winding induction motor drives. For example, Figure 4a shows a threelevel inverter [12] and Figure 4b shows a fivelevel inverter [16]. The main advantage of the multilevel topologies is that the machine phase voltage presents lower voltage distortion, increasing the performance of the drive; but on the other hand, the complexity and cost of the system are also increased.
2.4. Direct power converters
Modern direct power converters consider matrix converter and indirect matrix converters. A matrix converter [17] is a direct frequency converter consisting of nine bidirectional switches (three switches per phase) allowing to connect any of the output terminals to any of the input voltages. For an openend winding induction motor drive, two MCs are required, connected in the arrangement shown in Figure 5. The main features of a matrix converter are: bidirectional power flow capability, sinusoidal input and output currents without bulky energy storage elements, and controllable input power factor. For a standard matrix converter, a total of 36 IGBTs and diodes are required in this topology.
An indirect matrix converter [18] is also a direct frequency converter having the same features of an MC, but now a DC stage is clearly identified in the topology. The IMC consists of an input rectifier, an AC–DC matrix converter, built of six bidirectional switches; this rectifier produces the DC voltage to supply the converter output stage which is a standard twolevel VSI. To supply an openend winding AC machine, two output inverters are required as can be seen in Figure 6. Considering the six bidirectional switches of the input stage and the two output stages, a total of 24 discrete IGBTs and diodes are required in this topology.
3. Model of the openend winding induction motor drive based on IMC
The complete drive of Figure 6 can be modeled by state equations which describe the dynamic behavior of the system. The effects of power devices deadtimes on zero sequence voltages are neglected. All the equations derived below are written in fixed
The differential equations for the input side are:
where
are the source voltage and current (3), and the rectifier input voltage and current (4).
The DC link voltage can be obtained as:
with the rectifier switching matrix:
where
where the switching matrices of Inverter 1 (
and
Considering a model of the AC machine with
where
The rotor angle is
As
where
Assuming
and (13) can be redefined by:
The DC link current is:
and the rectifier input current:
Taking into account (1) – (18), the state space model of the drive is given by (19) –(21):
4. Zero sequence voltage
As mentioned before, the dualinverter fed openended winding induction motor drive may suffer from zero sequence current caused by zero sequence voltage. This zero sequence voltage is produced because of the asymmetry of the instantaneous phase voltages applied to the machine windings (due to the voltage space vectors used). In general, zero sequence currents may give rise to increased RMS phase current, thus increasing the system losses, high current/voltage THD, and machine overheating and vibrations. The zero sequence voltage is given by [11]:
The zero sequence voltage contributions from the 64 space vector combinations are shown in Table 2. As can be noted, there are twenty voltage space vectors that do not produce zero sequence voltage; thus in order to avoid the circulation of zero sequence current in the machine windings, only these space vector combinations could be used in the modulation strategy for the dual inverter [9].








0  






Moreover, from Table 2 and Figure 2, it can be noted that there are two different but equivalent sets of active vectors producing null zero sequence voltage (see Table 3), which could be used along with the zero vectors:








5. Commonmode voltage
Conventional PWM inverters generate alternating commonmode voltages relative to ground which generate currents through the motor parasitic capacitances to the rotor iron [25]. These currents find their way via the motor bearings back to the grounded stator case. The socalled bearing currents have been found to be a major cause of premature bearing failure in PWM inverter motor drives [26].
One of the main features of an openend winding induction machine drive is the possibility of reducing the commonmode voltage by using certain space vector combinations of the dualinverter topology (Figure 2). In general, for an openend winding machine, the commonmode voltage is given by [8]:
where
For the topology depicted in Figure 6, the commonmode voltage is given by:
where the common point
where
Let
where
where
The voltages of the DC link rails are given by:
where
thus
Differentiating (29) with respect to
This can be further investigated by considering a virtual midpoint of the DC link as a reference point (see point 0 in Figure 6). Then, (24) can be rewritten as:
where the contributions of the input and output stages to the overall commonmode voltage have been separated (
It can be seen in (34) that
Therefore, it can be seen in (35) that by using
As can be noted from Table 4 and Figure 2, there are larger and lower active vectors available which produce zero commonmode voltage. Any of them could be considered in the modulation strategy for the dualinverter system depending on the machine voltage requirement. However, from Table 2 and Table 4, it can be appreciated that the space vectors which reduce the commonmode voltage are not the same vectors which reduce the zero sequence voltage; thus, if a commonmode voltage is required, a compensation should be done for the zero sequence voltage; in other case, large zero sequence current components will circulate in the machine windings; a type of compensation will be reviewed in the following section.






















6. Pulse width modulation strategies
In this section, PWM strategies for an openend winding induction motor drive based on a twooutput IMC are described.
6.1. Modulation strategies for the input stage of the IMC
The modulation for the input (rectifier) stage of the converter aims to obtain a positive DC link voltage in each sampling period and unity displacement factor at the input [27]. Two different space vector modulation (SVM) strategies can be used for the rectifier [28]. One modulation maximizes the DC voltage by commutating between the largest and the second largest positive line input voltage (Figure 7). The other modulation produces a reduced DC voltage commutating between the lowest and the second lowest input line voltage (Figure 8).
If
with
the duty cycles for maximum DC voltage and
the duty cycles for reduced DC voltage. Figure 9a shows the transition from reduced DC voltage to maximum DC voltage and Figure 9b shows the opposite situation.
The rectifier SVM for reduced DC link voltage decreases the voltage gain by
6.2. Modulation strategies for the output stages of the IMC
6.2.1. Carrierbased modulation strategy
In a PWM strategy based on a triangular carrier (SPWM), the duty cycles for each leg of inverter 1 are [29]:
In this case, It is necessary a variable modulation index given by
To obtain a correct balance of the input currents and the output voltages in a switching period, the modulation pattern should produce all combinations of the rectification and the inversion switching states [27], resulting in the following duty cycles for the active vectors:
The duty cycle corresponding to the switching state
and the combined zero vectors duty cycles are:
The output stages duty cycles are different for each inverter and are represented in Figure 11 [23] for inverter
6.2.2. Space vector modulation strategy for zero sequence reduction
As mentioned in Section 4, in an openend winding induction machine drive, the zero sequence voltage can be reduced by using the active space vectors given in Table 3. The zero vectors are mapped depending on the sector information [9]. The mapping is shown in Table 5.





















The duty cycles for the output stages are calculated as:
where
The combined zero vectors duty cycles are:
Thus, the switching sequence, which is the same for both output stages, is shown in Figure 12, commutating the input stage with zero DC current [27].
6.2.3. Space vector modulation strategy for commonmode voltage reduction
If only the voltage space vectors shown in Table 4 are used in the modulation strategy for the output stages of the IMC, the contribution of the dualinverter to the overall commonmode voltage can be eliminated. The duty cycles for the IMC outputs are calculated as in (49) – (50). However, as mentioned in Section 5, the space vectors producing null
The average zero sequence voltage within a sampling interval can be eliminated by forcing the zero sequence voltseconds to zero [11] by applying the null voltage vectors with unequal times. Accordingly, the standard switching sequence used in the IMC [27] is modified in order to reduce/eliminate the average zero sequence voltage within a sampling period. For the modulation strategy presented, the duty cycles for both output VSIs are the same, which can be noted in Figure 13.
Taking into account that the same space vectors sequence applied in
where
7. Openend winding induction machine drive
In this section, the application of a twooutput IMC supplying an openend winding induction machine will be presented. The performance of the drive by using some of the modulation strategies discussed above will be shown and analyzed via simulation and experimental results. The simulations are carried out in a PSIM/MATLAB simulation platform. On the other hand, experimental results are obtained using the setup shown in Figure 14. The IMC has been designed and built at the Power Electronics, Machines and Control lab facilities, University of Nottingham, UK. A sixpole induction machine rated at 7.5 kW is used. A DSP board, based on the TMS320C6713 processor, is used as the control platform. The calculation of duty cycles is carried out on the DSP among several other tasks. An FPGA interface board, designed at Nottingham University, is used to implement the modulation strategies and data acquisition. Communication between the DSP and a PC is achieved using a DSK6713HPI (Host Port Interface) daughter card. The converter input stage uses SK60GM123 modules and the output stages use SK35GD126 modules. The switching frequency is 10 kHz and voltages and currents are also sampled at 10 kHz. The load used in the experimental system is a DC generator, supplying a resistive load, coupled with the induction motor shaft.
7.1. SVM strategy for zero sequence voltage reduction and changing DC voltage
The modulation strategies, presented in Section 6.1 and 6.2.2, are used to implement a standard feedforward vector control scheme [30] for the machine currents (Figure 15). Simulation and experimental results are shown in Sections 7.1.1 and 7.1.2, respectively.
7.1.1. Simulation results
The performance of the vector control scheme is verified by applying step changes in the
Figure 17a shows the performance of the control scheme when a step change from 6 to 8 A is applied in
Figure 18 (top) shows the converter input phase voltage and current; the unity input displacement factor can be noted. Figure 18 (bottom) shows the output zero sequence voltage that has been obtained from the voltage across the load in each phase and then applying (22). As can be seen, the zero sequence voltage has been eliminated due to the modulation strategy used for the output stages.
7.1.2. Experimental results
The
Figure 20a shows the
Finally, Figure 21 (top) shows the input phase voltage and current. The zero sequence voltage shown in Figure 21 (bottom) is not exactly zero, but this is probably due to the measurement procedure because not all of the channels are sampled at the same time and because in Figure 18 the input switches are ideal.
7.2. SVM strategy for commonmode voltage reduction and zero sequence voltage compensation
Simulation and experimental results for the modulation strategy presented in Section 6.2.2 will be shown in this section. The rectifier is modulated to maximize the DC link voltage (Figure 7) and the full drive is tested in openloop
7.2.1. Simulation results
The DC link voltage and phase
Small disturbances, occurring every 60°, can be noted in the motor currents shown in Figure 22b. These current disturbances are due to the application of zero voltage vectors to machine windings, see PWM pattern in Figure 13, aiming to reduce the zero sequence voltage. During the application of zero voltage vectors, each machine phase winding is supplied with a voltage of
The input (supply) currents are shown in Figure 24 (top) while Figure 24 (bottom) shows the converter input phase voltage (blue) and current (green) for an output reference of 150 V and 50 Hz. The unity displacement factor is evident in Figure 24 (bottom).
The loworder harmonics of the machine currents are presented in Table 6.


Fundamental  14.400 
2nd  0.250 
3rd  0.184 
4th  0.112 
5th  0.025 
6th  0.815 
Figure 25a shows the commonmode voltage separated into
where
It can be seen in the simulation results that the contribution of the output inverters to the commonmode voltage is completely eliminated due to the modulation strategy used. Figure 25b shows the zero sequence voltage (top) and its frequency spectrum (bottom). It can be noted that the loworder zero sequence harmonics are reduced because of the asymmetry of the null vector duty cycles used in the switching sequence for each output stage.
7.2.2. Experimental results
Figure 26a (top) shows the DC link voltage while Figure 26a (bottom) shows the voltage across the machine phase
In Figure 26b, the effect of the zero voltage vectors in the PWM pattern shown in Figure 13 is also observed. The supply currents are shown in Figure 27 (top), again with good correspondence with the simulation study. Figure 27 (bottom) shows the input phase voltage and current.
Figure 28a shows the commonmode voltages
8. Conclusion
The openend winding induction machine has been presented in this chapter. Different power converter topologies for this type of machine connection have been shown and briefly discussed. Because of the advantages of indirect matrix converter, emphasis has been done in the application of this converter to control the machine. Therefore, an indirect matrix converter with two outputs stages has been proposed to supply energy to the openend winding induction motor. This topology has been thoroughly modeled and pulse width modulation strategies for the input and output stages of the proposed topology have been shown. Issues such as zero sequence voltage and commonmode voltage, presented in the dualinverter configuration, have been analyzed and strategies to eliminate and/or reduce such effects have been presented. The control and modulation strategies have been simulated and experimentally tested in a prototype rig. Results for open and closedloop operation of the openend winding topology based on IMC have been shown.
Acknowledgments
This work was funded by Fondecyt Chile under Grant 1151325. The financial support of CONICYT/FONDAP/15110019 is also acknowledged.
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