## Abstract

A fixed-pattern noise correction technique for time-domain CMOS imagers with high dynamic range is presented in this chapter. Analytical derivations are presented showing how the circuit variations affect the time measured. The error in the time measured can be reduced by using lower reference voltages achieving values smaller than 4%. The fixed-pattern noise correction technique proposed is based on a new readout method for time-domain imagers employing two reference voltages for the discharge time measurement. This new technique is non-sensitive to circuit parameter variations that contribute to fixed-pattern noise such as hold voltages of transistors. A simple electronic circuit is proposed to implement the technique. Circuit and simulation results are presented to demonstrate the feasibility of the proposed technique.

### Keywords

- CMOS image sensors
- Active Pixel Sensor
- fixed-pattern noise
- photodiode

## 1. Introduction

CMOS image sensors have been an important source of research and industrial development in the area of image sensors due to the present high level of integration and low power consumption compared to charge-coupled devices (CCDs). The technology advances of CMOS image sensor results in image sensors with high dynamic range (>=100dB). Higher dynamic range become other important advantage of CMOS image sensors over CCDs. However, most of CMOS imager architecture with high dynamic range neglect the fixed-pattern noise (FPN) and do not present any kind of cancelling circuit or impact on such architectures. Therefore, although conventional linear CMOS sensors incorporate FPN cancellation techniques as correlated-double sampling (CDS), in general, it is still missing in the literature of FPN cancellation techniques for high dynamic range CMOS imagers.

Several techniques were proposed to achieve high dynamic range using CMOS image sensors [1-6]. In [2], by integrating a comparator and a dynamic flip-flop in each pixel, a multi-sampling technique was proposed. In [3], a self-reset technique using one comparator per pixel was described. In general, these techniques are effective as they achieved a dynamic range >100dB, but, none of them show the impact of FPN or present FPN cancellation techniques.

Recently, high dynamic range CMOS imagers using analog-to-digital converters have been proposed and they can incorporate CDS techniques for FPN cancellation although they do not present any FPN impact analysis [7-12]. However, these approaches achieve dynamic ranges of only 70–80dB, which is too low for some applications that typically demand dynamic range higher than 100dB.

In this chapter we present a FPN impact analysis and a technique of FPN cancellation for time-domain CMOS imagers with high dynamic range.

## 2. Principle of operation of time-domain CMOS imagers

Figure 1a shows the typical time-domain CMOS pixel. It comprises a photodiode, a reset transistor and a comparator. The pixel operation has two stages. The first stage is the reset period. During the reset period the reset transistor operating as switch is closed and the photodiode voltage (_{pd}) is charged to an initial voltage _{reset}close to _{dd}. At the beginning of the second stage, the integration period, the reset transistor is turned off and the photodiode at high impedance starts to discharge. The discharge speed during discharge is according to the photocurrent intensity (see Figure 1b). The discharge time is smaller for higher photocurrent values.

The time-domain CMOS sensor operation consists of measuring the discharge time of the photodiode during the integration period by comparison of photodiode voltage with a reference voltage (see Figure 1b). This comparison is made by using a comparator as seen in Figure 1a. The discharge time is defined as the instant in which the photodiode voltage drops below (ou to) the reference voltage and the output comparator goes high. According to [2], the discharge time as function of the photocurrent for a reference voltage _{ref}is given by:

where _{pd}is the photodiode’s capacitance, _{dark}is the dark current, _{ph}is the photocurrent, _{reset}is the initial photodiode’s voltage and _{ref}is the reference voltage.

Figure 2 shows the discharge time for different values of reference voltage assuming _{pd}* =30fF*and

I

_{dark}=100fA. As one can see, the discharge time is smaller for higher reference voltages. For photocurrent smaller than 100fA, the curve saturates due to the presence of the dark current.

## 3. Fixed-pattern noise in time-domain CMOS imagers

The fixed-pattern noise is defined as the variation of pixel’s photoresponse in a matrix when a uniform light intensity focuses the matrix. Time-domain CMOS imagers have two main sources of variation that contributes to fixed pattern noise; (1) the variation of the reset voltage (_{reset}) due to threshold voltage variation of the reset transistor and (2) the offset voltage of voltage comparator (_{offset}). The threshold voltage variation causes a variation on the discharge time that can be written as

where _{d}is the error reflected in the discharge time measured, _{th}is the variation introduced by the threshold voltage variation of reset transistor and _{offset}is the voltage variation introduced by the offset voltage of the voltage comparator. It is possible to demonstrate from the previous equation that the error reflected in the discharge time (_{d}) can be written as

where, ∆V=∆V_{th}+∆V_{offset}.

According equation (3), the discharge time error is proportional to voltage error introduced (* ∆V*), and inversely proportional to photocurrent and. therefore the discharge time error varies according light intensities changes. Figure 3 shows the discharge time error as function of photocurrent assuming

C

_{pd}=30pF,

I

_{dark}=100fA for three different values of voltage errors.

Manipulating equation (3), it can be demonstrated that the percentage of relative error is given by

According to equation (4) the relative error of discharge time is independent of light intensity (photocurrent) and inversely proportional to reference voltage. Figure 4 shows the relative discharge time error for three different values of voltage error. As one can see, the relative discharge time error is smaller for small reference voltage values. It is smaller than 4% at _{ref}=0.5V.

## 4. New readout method for time-domain with FPN reduction

In order to cancel the voltage error introduced (see equation 2), we propose to measure the discharge time between the comparisons with two reference voltages as shown in Figure 5.

The instant of comparison are two, _{d1}and _{d2}. For _{ref1}the comparison time is given by

For _{ref2}the comparison time is given by

The discharge time is now given as the interval time between _{d1}and _{d2}. Subtrating equations (5) of (6), it is possible to demonstrate the discharge time given by

According to equation (7) the new discharge time is independent of the source of fixed-pattern noise because it is independent of reset voltage and the offset voltage of voltage comparator. However, the same comparator must be used in order to achieve the offset voltage cancelling.

Figure 6 shows the transfer function graph of _{d}for _{ref}_{ref2}=2V, _{pd}=30fF and _{dark}=100fA. The characteristic of time versus photocurrent is the same of conventional time-domain CMOS imager as can be seen in Figure 3.

## 5. Simulation results

### 5.1. FPN time-domain characteristic without FPN cancellation

Figure 7 shows the equivalent circuit of the CMOS sensor image used for simulations. The simulated pixel is comprised of a reset transistor and capacitance and a source current as equivalent circuit of photodiode. We assume that the photocurrent is constant and independent of voltage as usual in the literature. For simulations we used a design kit of a 0.35µm 3.3V CMOS technology.

In order to achieve the transfer characteristic time versus photocurrent simulated, we use a constant reference voltage of 1.5V, reset voltage of 3.3V and a typical capacitance of 30fF. By varying the photocurrent different comparison times for reference voltage of 1.5V were found and the obtained transfer characteristic is shown in Figure 8. Our analysis indicates that the simulation results are in agreement with equation (1).

For simulating the error voltage introduced by circuits, we choose to change the reset voltage (initial voltage) from 3.3V to 3.2V. Therefore, we simulate a error voltage of 100mV caused by the variation of the threshold voltage of the reset transistor and/or by the offset voltage of the comparator. Using a reference voltage of 1.5V and changing the initial voltage in the simulations we found a comparison time error from 6% to 10% as shown in Figure 9.

This result indicates that the FPN in time domain for an entirely pixel matrix is less than 10%. The error is calculated as

### 5.2. FPN time-domain characteristic with FPN cancellation

Two references voltages are used for FPN cancellation. We use V_{ref1}=2.5V and V_{ref2}=2.0V as reference voltages. For this case, the transfer characteristic discharge time versus photocurrent is shown in Figure 10. The discharge time _{d}was measured as the difference between the discharge time to V1 and the discharge time to V2

A simulation with 100mV of error introduced again was performed and the error was calculated as equation (8). For this case, the relative error found is shown in Figure 11. This simulation result indicates that the relative error is less than 2% percent. Therefore, the simulation result shows that this technique can reduce the FPN in time-domain imagers.

In order to confirm the results, we decide to simulate using reference voltages of V1=2.5V and V2=1.5V. As one can see in Figure 12, for this case the transfer characteristic is in agreement with equation (7) and the transfer characteristic in Figure 10.

For this case, an error of 100mV was introduced in the circuit simulated as stated before. The relative error found in this case is shown in Figure 13. Again the relative error is less than 2% showing that the technique can reduce the FPN.

## 6. Electronic circuit for time domain FPN cancellation

The challenge in this technique implementation is to develop a circuit that uses the same comparator (same offset voltage) to compare two reference voltages. For this purpose we propose the circuit shown in Figure 14.

The circuit is composed of a comparator, two selector transistors (switches), and a T Flip-Flop. The main waveforms of signal are shown in Figure 15. First, the reset signal used to reset the pixel is also used to reset the flip-flop and the counter. Initially at low, the output of flip-flop control the two switches selecting only one of the reference voltages (_{ref1}). After reset, and during the beginning of integration time, the _{ref1}reference voltage is selected for comparison. At instant of comparison, when the output pixel is _{ref1}, the output comparator triggers the flip-flop that changes to high. At this moment, the switches are biased disconnecting _{ref1}and connecting _{ref2}. The output of the comparator goes low again but the output of the flip-flop remains high. When the output pixel voltage reaches _{ref2}the comparator output pulses again trigger the flip-flop output to low. At this moment the counter stops and the reference voltage _{ref1}returns to be connected to the comparator input.

## 7. Conclusions

High dynamic range imager CMOS image sensors are one of the most important applications of CMOS image sensors. Most of the high dynamic range CMOS image sensors proposed in the literature neglect the fixed pattern noise, which is one of the major drawbacks of CMOS image sensors compared to CCDs. In this work, a fixed-patter noise reduction technique is presented for high dynamic range CMOS image sensors operating in time domain. According to simulation results, the new technique can reduce the fixed patter noise down to 2%.