Open access

Ultra Wideband RF Transceiver Design in CMOS Technology

Written By

Lingli Xia, Changhui Hu and Patrick Chiang

Submitted: 17 March 2011 Published: 27 July 2011

DOI: 10.5772/20213

From the Edited Volume

Ultra Wideband Communications: Novel Trends - System, Architecture and Implementation

Edited by Mohammad Matin

Chapter metrics overview

5,789 Chapter Downloads

View Full Metrics

1. Introduction

UWB (Ultra-Wideband) is one of the WPAN (Wireless Personal Area Network) Technologies; its main applications include imaging systems, vehicular radar systems and communications and measurement systems. Ever since the FCC released unlicensed spectrum of 3.1-10.6 GHz for UWB application in 2002, UWB has received significant interest from both industry and academia.

Comparing with traditional narrowband WPANs, (e.g. Bluetooth, Zigbee, etc.), the most significant characteristics of UWB are ultra-wide bandwidth (7.5 GHz) and low emitted spectrum density (-41.3 dBm/MHz). According to Shannon-Hartley theorem (Wikipedia, 2010), through an AWGN (Additive White Gaussian Noise) channel, the maximum rate of clean (or arbitrarily low bit error rate) data is limited to


where, C is the channel capacity, BW is the channel bandwidth, Ps is the average power of the received signal, N0 is the noise spectral density. As can be seen from (1), Channel capacity increases linearly with bandwidth but only logarithmically with SNR. With a wide bandwidth, high data rate can be achieved with a low transmitted power.

Mutli-Band OFDM (MB-OFDM) and Direct-Sequence UWB (DS-UWB) are two main proposals for UWB systems; each gained multiple supports from industry. Due to incompatible of these two proposals, UWB technology faces huge difficulties in commercialization. On the other hand, Impulse Radio UWB (IR-UWB) has been a hot research area in academia because of its low complexity and low power.

In the following, we first introduce previous works on different kinds of UWB RF transceiver architectures, including MB-OFDM UWB, DS-UWB and IR-UWB transceivers. Both advantages and disadvantages of these architectures are thoroughly discussed in section 2. Section 3 presents a monolithic 3-5 GHz carrier-less IR-UWB transceiver system. The transmitter integrates both amplitude and spectrum tunability, thereby providing adaptable spectral characteristics for different data rate transmission. The noncoherent receiver employs a simplified, low power merged-correlator, eliminating the need for a conventional sample-and-hold circuit. After self-correlation, the demodulated data is digitally synchronized with the baseband clock. Section 4 shows the measurement results and section 5 draws a conclusion.


2. Previous works on UWB RF transceivers

Both MB-OFDM (Ranjan & Larson, 2006; Zheng, H. et al., 2007; Bergervoet et al., 2007; Beek et al., 2008) and DS-UWB (Zheng, Y. et al., 2007, 2008) are carrier-modulated systems, where a mixer is used to up/down convert the baseband (BB)/radio frequency (RF) signal, therefore requiring local oscillator (LO) synthesis. The main difference between these two systems is that MB-OFDM systems are dealing with continuous ultra-wideband modulated signals while DS-UWB systems are transmitting discrete short pulses which also occupy ultra-wide bandwidth. On the other hand, IR-UWB is a carrier-less pulse-based system, therefore, the fast hopping LO synthesis can be eliminated, thus reducing the complexity and power consumption of the entire radio. Furthermore, since the signal of a pulse-based UWB system is duty-cycled, the circuits can be shut down between pulses intervals which would lead to an even lower power design.


The main architectures of MB-OFDM UWB transceivers can be categorized into superheterodyne transceivers (Ranjan & Larson, 2006; Zheng, H. et al., 2007) and direct-conversion transceivers (Bergervoet et al., 2007; Beek et al., 2008), which are quite similar as those traditional narrow-band RF transceivers.

2.1.1. Superheterodyne transceivers

In a superheterodyne transceiver, the frequency translation from BB to RF in the transmitter or from RF to BB in the receiver is performed twice. A superheterodyne receiver for MB-OFDM UWB is shown in Fig. 1, after being received by the antenna and filtered by an off-chip SAW (Surface Acoustic Wave) filter (which is not shown in this figure), the UWB RF signal is down-converted to intermediate frequency (IF) signal first, and then further down-converted to BB signal by a quadrature mixer. Superheterodyne transceiver is a very popular architecture used in communication systems because of its good performance.

Figure 1.

Superheterodyne Receiver

Because of the two-step frequency translation, LO leakage does not have a significant impact on the receiver. Furthermore, multiple filters are employed to get rid of unwanted image and interference signals, which increase the dynamic range, sensitivity and selectivity of the receiver. However, superheterodyne receivers also exhibit significant disadvantages. Firstly, those bandpass filters need high Q to effectively filter out unwanted image and interference signals, which makes these filters difficult to be integrated in CMOS technology and thus off-chip components are employed which increase the cost. Secondly, two-step frequency translation architecture makes superheterodyne receivers less attractive in power consumption and chip area.

2.1.2. Direct-conversion transceivers

Another more commonly used architecture for MB-OFDM UWB is direct-conversion, as shown in Fig. 2. The RF signal is directly down-converted to a BB signal or vice versa without any intermediate frequency (Gu, 2005), thus expensive IF passive filter can be eliminated, and then the cost and size of the overall transceiver are reduced. And because only one-step frequency translation is needed, the power consumption of a direct-conversion transceiver is much lower than a superheterodyn transceiver. The main problems that limit the application of a direct-conversion transceiver are flicker noise and DC offset. Flicker noise depends on the technology. A PMOS transistor exhibits less flicker noise than a NMOS transistor. DC offset is caused by LO or interference self-mixing, and mismatch in layout. DC offset can be solved by AC coupling or high-pass filtering with a SNR (Signal-to-Noise Ratio) loss. Fortunately, this SNR loss will not be a big issue in a MB-OFDM UWB system since the BB signal bandwidth is as high as 264 MHz.

Figure 2.

Direct-conversion Transceiver

2.2. Pulse-based UWB

Unlike MB-OFDM UWB systems, pulse-based UWB systems are dealing with discrete pulses. There are many types of pulse modulation, such as OOK (On Off Keying), BPSK (Binary Phase Shift Keying) and PPM (Pulse Position Modulation), etc. As shown in Fig. 3, OOK modulation is performed by generating transmitted pulses only while transmitting ‘1’ symbols. BPSK modulation generates 180 phase-shifted pulses while transmitting baseband symbols ‘1’ and ‘0’. PPM modulation is performed by generating pulses at different phase delays. Therefore, BPSK has an advantage over other modulation types due to an inherent 3 dB increase in separation between constellation points (Wentzloff & Chandrakasan, 2006); however, BPSK modulation is not suitable for some receiver architectures, e.g., noncoherent receivers.

Figure 3.

Three commonly used pulse modulation

Pulse width is the duty cycle of a pulse in time domain, which is inversely proportional to the pulse bandwidth in frequency domain. The pulse width of a Gaussian pulse is defined as the pulse’s temporal width at half of the maximum amplitude. As shown in Fig. 4, Gaussian pulse width is proportional to variance σ, the larger the σ is, the larger the pulse width and the smaller the signal bandwidth. For higher order Gaussian pulses, the pulse width is defined as the temporal width from the first to the last zero-crossing point.

Pulse repetition rate (PRR) is another important characteristic of the transmitted pulse,


Where fp is the pulse repetition rate, fd is the baseband data rate, and n represents how many pulses are generated for each bit of information. If the PRR is doubled by increasing n or fd, the transmitted power is elevated by 3 dB. Therefore, the IR-UWB transmitter needs gain control ability in order to satisfy the FCC spectral mask while transmitting at different pulse repetition rate. On the other hand, system throughput is limited by a high n. Therefore, high n is usually employed for low data rate systems where the goal is increased communication distance and improved BER.

Pulse UWB can be categorized into carrier-based DS-UWB (Zheng, Y. et al., 2007, 2008) and carrier-less IR-UWB (Lee, H. et al., 2005; Zheng, Y. et al., 2006; Xie et al., 2006; Phan et al., 2007; Stoica et al., 2005; Mercier et al., 2008). In a carrier-based pulse UWB system, the baseband pulse is up-converted to RF pulse by a mixer at the transmitter side, and vice verse at the receiver side, therefore a power consuming local oscillator is needed. In a carrier-less UWB system, no local oscillator is needed, the transmitted signal is up-converted to RF band by performing differentiation on a Gaussian pulse; at the receiver side, the received pulse can be demodulated by down-sampling (Lee, H. et al., 2005), coherent (Zheng, Y. et al., 2006; Xie et al., 2006) or noncoherent (Phan et al., 2007; Stoica et al., 2005; Mercier et al., 2008) architectures.

Figure 4.

Pulse width vs. bandwidth as σ12 (a) pulse width in time domain (b) signal bandwidth in frequency domain

2.2.1. Carrier-based pulse UWB transceivers

Both carrier-based pulse UWB and MB-OFDM UWB need local oscillators to perform frequency translation. As seen in Fig. 5, although these two systems are dealing with different kinds of signals, the receiver side consists of the same blocks as those in Fig. 2. The difference lies in the transmitter side, a pulse UWB transmitter needs no DAC, the digital baseband directly drives a pulse generator to generate a Gaussian pulse, and then the BB pulse is up-converted to RF band and transmitted through a UWB antenna after pulse shaping. Since the transmitted power spectral density is extremely low, power amplifier is optional in UWB systems. Although carrier-based pulse UWB still consumes significant power in LO signal generation, it has advantage in controlling the exact output spectrum.

Figure 5.

Carrier-based pulse UWB

2.2.2. Carrier-less pulse UWB transceivers

Gaussian pulse is the most commonly used pulse shape in IR-UWB systems because of its good performance in frequency domain. The expressions for Gaussian pulse and its first order and second order differentiation are:


In time domain, the zero-crossing number increases as the differentiation order increases; while in frequency domain, the higher the differentiation order, the higher the center frequency with no significant change on the signal bandwidth, as shown in Fig. 6. Therefore, in an IR-UWB transmitter, frequency conversion is performed by differentiation of a Gaussian pulse, as show in Fig. 7, the transmitter consists of only a high order pulse generator and an optional power amplifier. An IR-UWB transmitter has the advantage of low complexity and low power; however, it also exhibits a big disadvantage of difficulty in controlling the exact output spectrum. Therefore, how to design a transmitter with tunable output spectrum is the main concern in IR-UWB systems.

IR-UWB receivers can be categorized into coherent receivers, noncoherent receivers, and down-sampling receivers. A down-sampling receiver resembles a soft-defined radio receiver. After being amplified by a low noise amplifier, the received signal is directly sampled by an ADC. In a coherent receiver, the received pulse correlates with a local pulse first to down-convert the RF pulse to BB, and then sampled by an ADC while in a noncoherent receiver the received pulse correlates with itself. These three architectures have different field of applications, and they will be discussed in detail in the following.

Figure 6.

Gaussian pulse and its differentiation (a) time domain (b) frequency domain

Figure 7.

IR-UWB transmitter

  1. Down-sampling receiversFig. 8 is a down-sampling receiver (Lee, H. et al., 2005), although at first glance this architecture seems simple, it is seldom used in the 3-10.6 GHz frequency band for several reasons:

    • It is very difficult to implement a high gain, ultra-wide bandwidth RF amplifier (at least 60 dB for 10 m transmission range), as it may easily oscillate and also consumes significant power;

    • A high Q RF bandpass filter is not trivial. As mentioned earlier in 2.1.1, the requirement of a high Q off-chip BPF increases the cost. This problem also exists in a down-sampling IR-UWB receiver. As can be seen in Fig. 8, the ADC needs a high Q BPF to filter out the out of band interferences and noise to improve the dynamic range and linearity of the receiver and also to relax the stringent requirement on the ADC performance. Furthermore, the ultra-wideband impedance matching of the PGA output and the ADC input is also a big issue if an off-chip BPF is employed.

    • A multi-gigahertz sampling rate ADC is very power consuming. According to Shannon theorem, for a signal bandwidth of 2 GHz (3-5 GHz frequency band), at least 4 GHz sampling rate is needed for down-sampling. Although 1 bit resolution may be sufficient (Yang et al., 2005), this ADC consumes significant power in the clock distribution of the high data rate communications.

  2. Coherent and noncoherent receiversBoth coherent and noncoherent receivers correlate the received pulse first, such that the center frequency is down-converted to baseband. The difference is that in a coherent receiver, the received pulse correlates with a local template pulse; in a noncoherent receiver, the received pulse correlates with itself. Therefore, a noncoherent technique exhibits the disadvantage that the noise, as well as signal, is both amplified at the receiver (Stoica et al., 2005). Fig. 9 shows an ADS simulation comparison of the BER performance between a BPSK modulated coherent receiver and an OOK modulated noncoherent receiver within a non-multipath environment. As observed, a noncoherent receiver requires higher SNR than a coherent receiver for a fixed BER. However, the advantage of a noncoherent receiver is that it avoids the generation of a local pulse as well as the synchronization between the local and received pulses. As shown in Fig. 10, in order to obtain large enough down-converted signals for quantization, the local and received pulses must be synchronized within at least 100 ps in 3-5 GHz frequency band, which would be even tougher in 6-10 GHz frequency band. This precise timing synchronization can be achieved with a DLL or PLL which is very power consuming (Zheng, Y. et al., 2006; Sasaki et al., 2009). However, in a noncoherent receiver, only symbol level synchronization between the baseband clock and received data is needed with a resolution of ns.

Figure 8.

Down-sampling IR-UWB receiver

Figure 9.

Performance of a coherent receiver and a noncoherent receiver

Figure 10.

Correlated power vs. time offset (between the received and local pulses) in a 3-5 GHz coherent receiver (a) every 100 ps (b) every 10 ps


3. Proposed RF transceiver for IR-UWB systems

Considering those advantages and disadvantages discussed above, a 3-5 GHz fully integrated IR-UWB transceiver is presented as shown in Fig. 11 (Xia et al., 2011). The transmitter integrates both amplitude and spectrum tunability, thereby providing adaptable spectral characteristics for different data rate transmission. The receiver employs noncoherent architecture because of its low complexity and low power.

Figure 11.

The proposed IR-UWB transceiver system architecture with OOK modulation

3.1. Transmitter

Since a noncoherent receiver detects only the energy of the received pulses rather than the phase of the pulses, BPSK modulation is not suitable for the noncoherent receiver. Hence, the types of possible modulation are limited to OOK and PPM. In this design, OOK modulation is chosen, with BPSK modulation implemented for future coherent receiver design. The detailed transmitter implementation includes a pulse generator, output buffer, mode selection and power control blocks, as shown in Fig. 12.

Figure 12.

The proposed IR-UWB transmitter

3.1.1. Pulse generator

Basically, there are two categories of pulse generators, the analog pulse generator and the digital pulse generator. In (Zheng, Y. et al., 2006), an analog pulse generator is designed employing the square and exponential functions of transistors biased in saturation and weak inversion region, respectively. The main disadvantage of this method is that the amplitude of the output pulse is very small; an ultra-wideband amplifier is thus needed. The basic concept of a digital pulse generator is to combine the edges of a digital signal and its inverted signal to form a very short duration pulse, and then a differential circuit is used to up-convert the signal. Except using a differential circuit, (Kim & Joo, 2005) presents another way to up-convert the signal. Four pulses are combined successively to form a fifth derivative Gaussian pulse. This method eliminates the inductor used in the differential circuit which consumes the majority portion of chip area. Unfortunately, this method severely suffers from the process variations. All these previous pulse generators have difficulty in controlling the exact pulse shape and its spectrum. In this design, an amplitude and spectrum tunable pulse generator is introduced to solve this problem (Xia et al., 2008).

Figure 13.

The proposed pulse generator

As can be seen in Fig. 13, BBin is the baseband input signal and FreqCtrl is a square-wave signal that determines the PRR of the transmitted pulses. M1 and M2 realize the BPSK modulation as selecting the upper path when BBin is high and selecting the lower path when BBin is low. When OOK modulation is chosen, only those pulses generate by the upper path is sent to the antenna by the power-controlled output buffer. M3-M10 are employed to implement 3-step amplitude control of the pulses, thereby enabling adaptable output spectral density in order to meet the FCC spectral mask at different data rate. 4-step spectrum control is also realized by control signals fctrl1-3 showing a measured frequency tuning range of 3.2-4.1 GHz.

3.1.2. Power-controlled output buffer

Since the transmitted power spectral density of UWB is extremely low, the power amplifier is optional in the transmitter. In this design, an output buffer is implemented to drive the antenna. As shown in Fig. 14(a), the cascode structure is employed to improve the input-output isolation. R2 is the 50 ohms impedance of a UWB antenna. Since the signal of pulse UWB is inherently duty-cycled, the output buffer can be disabled during the pulses intervals to save power. M16 is a large scale PMOS switch with a gate control signal rst generated by the power control block. C6 is a large capacitor to suppress the unwanted pulse generated by switching on/off. The power control block is shown in Fig. 14(b). M5 and M8 are used to control the charging and discharging current, thus controlling the delay time of the inverter. The biasing circuit is also shown in the figure. When BPSK is slected, the power control block turns the output buffer on before the rising edge of the signal FreqCtrl and lasts for about 2 ns, regardless of whether BBin is high or low, as observed in Fig. 14(c); otherwise, when OOK is selected, the output buffer is enabled only when BBin is high. Therefore, the introduction of the power control block means that the transmitter power consumption is proportional to the data rate.

Figure 14.

Power-controlled output buffer (a) output buffer (b) power control block (c) transient simulation results

3.2. Receiver

The proposed IR-UWB receiver employs the noncoherent receiver architecture as shown in Fig. 11. After first being amplified by the low noise amplifier (LNA), the received pulse is then self-correlated by a correlator, amplified by a programmable gain amplifier (PGA), and then sent to a comparator for digital quantization. Finally the received data is synchronized with the baseband clock.

3.2.1. Low noise amplifier

A UWB low noise amplifier needs to provide reasonable noise figure (NF) and impedance matching as well as a very large bandwidth. Hence, the design of a UWB LNA is more challenging than a traditional narrow-band LNA. Furthermore, wideband receivers typically incorporate single-ended inputs (Mastantuono & Manstretta, 2009) that remove the loss of the passive balun but also deteriorate the second-order distortion. In order to compromise these limitations, a single-ended LNA with a following active balun is implemented. As shown in Fig. 15(a), the single-ended LNA employs both current-reuse and staggered tuning techniques - using a common-source stage stacked on top of a common-gate input stage with different resonance frequencies (Weng & Lin, 2007). Inductor L1 resonates out the parasitic capacitances at the drain of transistor M1 at 3 GHz while also isolating the source of M2 from the drain of M1. Inductor load Ld of the common-source stage resonates at 5 GHz such that the output of the LNA covers the frequency range of 3-5 GHz. As shown in Fig. 15(b), the output load of M1 can be approximated to


where, Cc=C2Cgs2/(C2+Cgs2), and the resonance frequency of the common-gate and common-source stages are



Transistor M3, which is parallel with M2, provides gain control tunability. If M3 is switched on, the bias current for M1 increases, thereby increasing gm1. The measured gain variation of the high gain and low gain mode is 7.5 dB.

A two-cascode stage active balun is used to convert the single-ended output of the LNA to differential signals. The output of M4 connects to M6 and the input of the second cascode. Since vgs5=-vgs6, two balanced differential outputs can be achieved if gm5=gm6. The maximum gain and phase mismatch of the balanced outputs in 3-5 GHz are 0.3 dB and 2.8 , respectively, as observed from post-extracted layout simulation.

3.2.2. Correlator

The output of the LNA must be correlated - multiplied and then integrated in order to detect the energy of the received signal. Previous correlators used in both coherent receivers (Zheng, al., 2006, Liu et al., 2009) and noncoherent receivers (Lee, F.S. et al., 2007) needs

Figure 15.

Low noise amplifier and active balun (a) circuit implementation (b) small signal model of Z1

to synchronize the received pulse with local controlling signals first. This synchronization process is analogous to the RF front-end synchronization in a coherent receiver requiring a strict timing resolution. In this design, the duty-cycled characteristic of the IR-UWB system is used to remove the timing synchronization. Fig. 16(a) presents the proposed multiplier and integrator-merged correlator. The multiplier employs a Gilbert topology, while the integrator is realized by capacitors C1 and C2. As shown in Fig. 16(b), after the pulse is multiplied with itself, the integrator begins to integrate, and between the pulses intervals, the integrator starts to discharge and ready for the next integration. C1 and C2 should be large enough to hold the integrated voltage for the comparator and yet small enough to discharge between pulses intervals in order to be ready for the next integration. The main limitation of the proposed correlator is that in order to get quantized signal with enough duty cycle, the reference voltage level of the comparator must be set to a lower level than that for a conventional correlator, inevitably sacrificing SNR of the receiver. As shown in Fig. 17, Vref and Vmax represent the reference voltage of the comparator and the maximum output voltage of the correlator, respectively. The SNR reduces by 2.64 dB as Vref is set to half of the Vmax. However, implementation complexity and power consumption are greatly reduced with the proposed technique and the noise introduced by sampling can be eliminated. Furthermore, this SNR reduction can be relaxed by introducing a proceeding programmable gain amplifier.

Figure 16.

Correlator (a) circuit implementation (b) simulation result

Figure 17.

SNR reduction due to the proposed correlator

3.2.3. Programmable gain amplifier

The PGA is critical in the receiver in order to increase the dynamic range of the system and also complement the SNR reduction in the proposed correlator. The proposed PGA consists of a fixed gain stage, an 8-step gain stage and a DC-offset cancellation circuit. Fig. 18 shows the 8-step wideband source degeneration programmable gain stage. The transconductance of the first stage is 1/(Rs1+Rs), in which Rs1 is the resistance looking into the source of M1. By varying the value of Rs, a variable gain is realized. The linearity of this amplifier is determined by Rs1, where a smaller Rs1 results in better linearity performance. In Fig. 18, a negative feedback through M3 is employed (Helleputte et al. 2009), allowing Rs1 to be reduced to go1/(gm1gm3), greatly improving the linearity. The degeneration resistance Rs is controlled by 3-bit digital words to realize the 8-step gain control, with a minimum step size of 3 dB.

Figure 18.

step programmable gain amplifier

3.2.4. Comparison and synchronization

After the received signal is squared and integrated by the correlator, a comparator compares it with a reference voltage and performs digital quantization. However the comparator output is a return-to-zero (RZ) signal which needs to be converted to a non-return-to-zero (NRZ) signal that can synchronize with the baseband clock. In a coherent receiver, a DLL/PLL is usually introduced to perform synchronization between the received pulse and the local pulse, needing precision on the order of several tens of picoseconds. However, in a noncoherent receiver, the RZ signal quantized by the comparator exhibits a duty cycle on the order of ns. Therefore, a low jitter DLL/PLL is no longer necessary and a sliding correlator is employed. The digital synchronization circuit is shown in Fig. 19, where clkin, comp_out, RX clk and RX data are the baseband clock, the comparator output, the recovered baseband clock and the recovered data, respectively. With a reset signal, the delay line control signal dctrl is set to 0, such that there is no delay between the RX clk and clkin. Then the Sync block starts operation, and RX clk samples comp_out. If the RX clk is not synchronized with comp_out, the decision block enables the counter that increases the value of dctrl -- thus elongating the latency of the delay line until RX clk and comp_out are synchronized. The inevitable frequency offset between the baseband clock of the transmitter and receiver can be compensated by the digital baseband circuit, which is out of the discussion of this paper. During the measurement, the same clock source is used to get rid of the frequency offset.

Figure 19.

Clock and data synchronization


4. Measurement results

The proposed IR-UWB transceiver is implemented in a 0.13 µm 1P8M CMOS technology. The transceiver die microphotograph is shown in Fig. 20. The die area is 2 mm×2 mm. The chip is bonded to the 4-layer FR-4 PCB with chip-on-board (COB) assembly. With a supply voltage of 1.2 V, the power consumption of the transmitter is only 1.2 mW and 2.2 mW when transmitting 50 Mb/s and 100 Mb/s baseband signals, respectively; the power consumption of the receiver is 13.2 mW.

Figure 20.

Microphotograph of IR-UWB transceiver

Fig. 21 shows OOK and BPSK modulated pulses. Baseband data (BBin) and clock (FreqCtrl) are generated by FPGA, and the output of the transmitter is measured with high sampling rate oscilloscope. As can be seen, with OOK modulation, pulses are generated only when transmitting symbols ‘1’; and with BPSK modulation, pulses are generated every clock cycle with polarity shift depending on the transmitting symbols. The amplitude and spectrum tunable transmitter has output pulses with peak-to-peak voltage of 240 mV, 170 mV and 115 mV and the frequency center of the spectrum has a tuning range of 3.2-4.1 GHz. Fig. 22 shows the transmitted spectrum with pulse amplitude of 240 mV at data rate of 50 Mb/s and 100 Mb/s, respectively. As can be seen, the transmitted power increases by approximately 3 dB while the data rate is doubled. Hence, the amplitude of the transmitted pulses should be optimized in order to meet the FCC spectral density. The transmitted power at low frequency range is introduced by the switch in output buffer, and it can be filtered by off-chip filter and UWB antenna.

Figure 21.

OOK/BPSK transmitter (a) OOK modulation (b) BPSK modulation

Figure 22.

Transmitted Spectrum with maximum pulse amplitude at data rate of (a) 50 Mb/s (b) 100 Mb/s

The receiver provides a total gain ranging 43-70 dB, in which the LNA exhibits a gain variation of 7.5 dB in high/low gain mode; the PGA incorporates an 8-step, 3-dB gain control with an rms error of 0.7 dB. The receiver shows a minimum noise figure of 8.6/13.3 dB while operating in high/low gain mode, with a noise figure variation less than 2 dB in the 3-5GHz frequency band, as shown in Fig. 23. The 1-dB compression point of the receiver is -28/-22 dBm in high/low gain mode.

Figure 23.

Noise figure of the receiver

BER performance of the receiver with n of 1 is measured by transmitting 50 Mb/s random data from FPGA. The employed antennas are 3-5 GHz monopole omnidirectional antennas, manufactured by Fractus Corporation. As can be seen in Fig. 24, with transmitted amplitude of 115 mV, the received pulses are attenuated to only 20.4 mV (-50 dBm) and 6.4 mV (-61 dBm) when the distance between the antennas is 1 cm and 10 cm, respectively. The receiver achieves a BER of 10-3 when the distance between the antennas is set to 1 cm (-50 dBm). While the distance extends to 10 cm (-61 dBm), the BER performance is greatly deteriorated to over 10-2. As shown in Fig. 25, the TX pulse is OOK modulated, every pulse represents bit 1 at baseband. The received pulses are correlated and then amplified by the PGA, where PGA out is the buffered output of the PGA. A bit error occurred in the synchronized RX data as the received pulses are distorted by the antennas and the transmission channel.

Figure 24.

Received pulses (a) 1 cm (b) 10 cm

Figure 25.

BER performance of the receiver when the distance between the antennas is 10 cm

A summary of the measured results and a comparison with previously published papers is shown in Table 1.

PaperZheng, Y. et al.
Mercier et al. 2009
Lee, F.S. et al. 2007
Crepaldi, M. et al. 2010This work
Band3-5 GHz3-5 GHz3.6-4.3 GHz3-5 GHz
Data rate400 Mb/s16.7 Mb/s1 Mb/s100 Mb/s
TX pulse amp.195 mVpp370 mVpp610 mVpp240 mVpp
TX pulsewidth1.5 ns/2.0 ns1.0 ns
RX Arch.coherentnoncoherentnoncoherentnoncoherent
RX NF7.7-8.1 dB8.5-9.5 dB/8.6 dB
RX Gain83.5 dB40 dB/70 dB
IP1-dB-22 dBm-45 dBm/-28 dBm
Sensitivity-80~-72 dBm-99 dBm @10-3-60~-66 dBm@10-3-50 dBm @10-3
-61 dBm @10-2
Power Consumption0.19nJ/pulse(TX)
65pJ/pulse+184 µW(TX)
Chip Area2.6 mm×1.7 mm0.2mm×0.4mm(TX)
1 mm×2.2 mm(RX)
0.6 mm2 (TX)
1 mm2 (RX)
2 mm×2 mm
Process0.18 µm CMOS90 nm CMOS90 nm CMOS0.13 µm CMOS

Table 1.

Summary of the transceiver performance and comparison


5. Conclusion

A low power 3-5 GHz IR-UWB transceiver system with maximum data rate of 100 Mb/s is presented in this paper. The power consumption of the transmitter and receiver is 22 pJ/pulse and 0.13 nJ/pulse, respectively. The transmitter implementation is based on a former design and can realize OOK/BPSK modulation, where both the amplitude and spectrum of the output pulses are tunable. The introducing of a power control block in transmitter improves the power efficiency of the output buffer. In the receiver, a noncoherent technique is adopted for its low power and low complexity. A single to differential LNA with active balun is designed to eliminate off-chip balun. The correlator eliminates the sample-and-hold circuit to greatly simplify the circuit implementation. At baseband front-end, a synchronization circuit is implemented to have the data and clock synchronized at the output of the receiver. However, the duty-cycled characteristic of IR-UWB system is not utilized in the receiver to further reduce the power consumption. And lacking of low pass filter in the receiver could also deteriorate the performance. These should be improved in the future research.



This work was supported by 863 project of China under Grant SQ2008AA01Z4473469.


  1. 1. al. 2008 A 0.6-to-10GHz receiver front-end in 45nm CMOS, IEEE International Solid-State Circuits Conference, 2008, 128129
  2. 2. BergervoetJ. R.HarishK. al. 2007 A WiMedia-compliant UWB transceiver in 65nm CMOS, IEEE International Solid-State Circuits Conference, 2007, 112113
  3. 3. al. 2010 An Ultra-low-power interference-robust IR-UWB transceiver chipset using self-synchronizing OOK modulation”, IEEE International Solid-State Circuits Conference, 2010, 226227
  4. 4. GuQ. 2005 RF system design on transceivers for wireless communications, Springer, 0-38724-161-2 States of America
  5. 5. HelleputteN. V.GielenG. 2009 A 70 pJ/pulse analog front-end in 130 nm CMOS for UWB Impulse Radio Receivers, IEEE Journal of Solid-State Circuits, 44 7 July 2009, 18621871
  6. 6. KimH.JooY. 2005 Fifth-derivative Gaussian pulse generator for UWB system, IEEE Radio Frequency Integrated Circuits Symposium, 2005, 671674
  7. 7. LeeF. S.ChandrakasanA. P. 2007 A 2.5 nJ/b 0.653-to -5GHz subbanded UWB receiver in 90nm CMOS, IEEE Journal of Solid-State Circuits, 2007, 116117
  8. 8. al. 2005 A 15mW 69dB 2Gsample/s CMOS analog front-end for low-band UWB applications, IEEE International Symposium on Circuits and Systems, 2005, 368371
  9. 9. LiuL.SakuraiT.TakamiyaM. 2009 A 1.28mW 100Mb/s impulse UWB receiver with charge-domain correlator and emedded sliding scheme for data synchronization, Symposium on VLSI Circuits, 2009, 146147
  10. 10. MastantuonoD.ManstrettaD. 2009 A Low-noise active balun with IM2 cancellation for multiband portable DVB-H receivers, International Solid-State Circuits Conference, 2009, 216217
  11. 11. MercierP. P.DalyD. al. 2008 Ultra-low-power UWB for sensor network applications, IEEE International Symposium on Circuits and Systems, 2008, 25622565
  12. 12. PhanT.KrizhanovskiiV.LeeS. G. 2007 Low-power CMOS energy detection transceiver for UWB impulse radio system, IEEE Custom Integrated Circuits Conference, 2007, 675678
  13. 13. RanjanM.LarsonL. 2006 A sub-1mm2 dynamically tuned CMOS MB-OFDM 3-to-8GHz UWB receiver front-end, IEEE International Solid-State Circuits Conference, 2006, 128129
  14. 14. al. 2009 A single-chip ultra-wideband receiver with silicon integrated antennas for inter-chip wireless interconnection, IEEE Journal of Solid-State Circuits, 44 2 February 2009, 382392
  15. 15. StoicaL.RabbachinA.RepoH. al. 2005 An ultrawideband system architecture for tag based wireless sensor networks, IEEE Transactions on Vehicular Technology, 54 5 September 2005, 16321645
  16. 16. WengR.LinP. 2007 A 1.5-V low-power common-gate low noise amplifier for ultrawideband receivers, International Symposium on Circuits and Systems, 2007, 26182621
  17. 17. WentzloffD. D.ChandrakasanA. P. 2006 Gaussian pulse generators for subbanded ultra-wideband transmitters, IEEE Transactions on Microwave Theory and Techniques, 54 4 April 2006, 16471655
  18. 18. Wikipedia. 2010 Shannon-Hartley theorem,
  19. 19. XiaL.HuangY.HongZ. 2008 Low power amplitude and spectrum tunable IR-UWB transmitter, Electronics Letter, 44 20 September 2008, 12001201
  20. 20. al. 2010 0.15-nJ/b 3-5-GHz IR-UWB system with spectrum tunable transmitter and merged-correlator noncoherent receiver, IEEE Transactions on Microwave Theory and Techniques, 59 4 April 2011, 11471156
  21. 21. XieH. L.FanS. al. 2006 An ultra-low power pulse-based UWB transceiver SoC with on-chip ADC, IEEE International Midwest Symposium on Circuits and Systems, 2006, 669673
  22. 22. YangC.ChenK.ChiuehT. 2005 A 1.26 7mW impulse-radio UWB baseband transceiver, International Solid-State Circuits Conference, 2005, 442443
  23. 23. al. 2007 A 3.1-8.0GHz MB-OFDM UWB transceiver in 0.18µm CMOS, IEEE Custom Integrated Circuits Conference, 2007, 651654
  24. 24. ZhengY.TongY.AngC. al. 2006 A CMOS carrier-less UWB transceiver for WPAN applications, IEEE International Solid-State Circuits Conference, 2006, 116117
  25. 25. ZhengY.WongK. W.AsaruM. al. 2007 A 0.18µm CMOS dual-band UWB transceiver, IEEE International Solid-State Circuits Conference, 2007, 114115
  26. 26. ZhengY.ArasuM. A.WongK. al. 2008 A 0.18µm CMOS 802.15.4a UWB transceiver for communication and localization, IEEE International Solid-State Circuits Conference, 2008, 118119

Written By

Lingli Xia, Changhui Hu and Patrick Chiang

Submitted: 17 March 2011 Published: 27 July 2011