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Silicon Nanowire Waveguides and Their Applications in Planar Wavelength Division Multiplexers/Demultiplexers

Written By

Jun Song and Jinfei Ding

Submitted: October 8th, 2010 Published: July 19th, 2011

DOI: 10.5772/16290

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1. Introduction

In the middle of last century, with the development of the first semiconductor transistor, the age of micro-electronics has started. Since then, electronic circuits keep developing rapidly, according to Moore’s famed law. Nowadays, in a very large scale integration chip (VLSI), length is typically several tens of nanometers. Millions of such transistors can be integrated in a single square millimetre area. With the maturing of the fabrication technology, the idea of systems on chips has been brought up. People have successfully integrated the whole system consisting of different functional modules, e.g., analytical circuits, radio frequency modules, micro control units, digital signal processing modules, memories, micro electro-mechanical systems, etc., in a single chip.

Photonics is the technology associated with signal generation, processing, transmission, and detection where the signal is carried by photons (i.e., light). Photonics is a rapidly expanding technology with applications in a large number of areas. One hitherto dominating sector has been telecommunication, but photonics is much broader than that. Nowadays, besides telecommunication, applications of photonics include consumption equipment, medicine, industrial manufacturing, construction, aviation, military, entertainment, metrology, photonic computing, etc. However, as compared to electronics, photonics is about several tens of years behind in maturity. In order to compete with electronics in our modern life, photonics has to follow the same development dynamics as electronics. Recently, Moore’s law in photonics has been concluded by several researchers (Thylén et al., 2006). They showed us very promising perspectives that the development of photonics is actually faster than that of electronics, and the VLSI of photonics will be realized in the next twenty years.

As we have discussed above, the major issue in the development of photonics is to reduce the dimension of devices, i.e., to increase the integration density. In the present chapter, we will consider planar wavelength division multiplexers/demultiplexers as examples to show the effective application of silicon nanowire technology in the modern photonics.

Fibre-optic communication is growing extensively in recent years. Nowadays a great number of optical fibres are laid on all parts of the world, which dramatically increases the capacity and the quality of telecommunications. However, traditional optical fibres are still inadequate to carry the heavy traffic resulted from the exponential increase of the bandwidth demand. Fortunately, the wavelength division multiplexing (WDM) technique provides an effective and low-cost way to increase the capacity tens or hundreds of times in an optical transmission system.

WDM is a kind of frequency division multiplexing technique for fibre-optic cable in which multiple optical carrier signals on a single optical fibre by using different wavelengths (colours) of laser light to carry different signals. These channels are also called lambda circuits. Think of each wavelength as a different colour of light in the infrared range that can carry data.

Optical multiplexers and demultiplexers are the key components in the WDM fibre-optical communication system. Multiplexers splice the different signal wavelengths together at the input to the system and dernultiplexers split apart the different signal wavelengths at the output of the system. Currently, commercially available components are mainly based on thin film interference filters, fibre Bragg gratings or micro-optic techniques. A cost-effective scheme for carrying more information is implemented by inserting them on both sides of a fibre link. Arrayed waveguide gratings (AWGs) (Smit & Dam, 1996) and etched diffraction gratings (EDGs) (Cremer et al., 1991) are two typical multiplexers/demultiplexers based on planar integrated optical waveguides. They take the advantages of mature semiconductor manufacturing process and can offer more than 40 channels of dense wavelength division multiplexing (DWDM).

Different technologies based on different materials have been introduced to support planar optical devices. Silica-on-silicon technology has been widely adopted for fabrications of WDM devices in commercial systems, due to the material refractive index which matches that of optical fibres. A common drawback of the silica-based photonic integrated devices is the overall size of components, mostly limited by the large bending radius. This limitation is dictated by a low refractive index difference between the core and the cladding. The size of a typical device, e.g., a multi-channel EDG demultiplexer, is several cm2 and the integration of more complex structures is often difficult on a single wafer. To increase the integration density for future WDM systems a considerable size reduction is necessary. III-V semiconductor technology is another promising technology due to its ability to integrate some optoelectronic or active devices (Cremer et al., 1991), e.g., high-quality lasers, high-speed modulators, etc. It can also help to decrease the size of, e.g., an AWG to a few mm2 based on the common ridge waveguide, but this is at the expense of higher loss, higher material cost, and more complex fabrication technology. To stay with silicon, as it is the most popular material for modern micro-electronics, Si based nanowire waveguides were introduced (Bogaerts et al., 2005), formed as silicon strips on a silica layer. A very high contrast of refractive index in all directions and high light confinement allow for a very high integration grade.

Due to the compatibility of the fabrication technology with micro-electronics, silicon photonics has attracted a lot of interests. Both AWGs and EDGs based on Si have been studied in the recent years. However to maintain single mode propagation along such a silicon nanowire waveguide the cross section of the waveguide becomes very small. The performance of such sub-micrometer sized devices strongly depends on the fabrication accuracy. For a passive component, when the feature size shrinks down to sub-micron or nano scales, the most challenging issues are the scattering loss due to sidewall roughness and the coupling efficiency from fibre. By optimizing the technology or employing a roughness reduction procedure (Lee et al., 2001), the propagation loss of a typical Si nanowire waveguide has reached ~0.2dB/mm. The coupling efficiency can also be improved significantly with a spot size converter (~0.5dB loss per connection) (Fukuda et al., 2005). With these improvements, the high-index-contrast material structures for photonic devices have been intensively studied during these years, since their ability to achieve planar integration, and their compatible fabrication technology with micro-electronics.


2. Silicon nanowires in photonics: designs and fabrications

Due to the compatibility of the fabrication technology with micro-electronics, silicon photonics has attracted a lot of interests. A search for the high-index contrast waveguide led us to the Si-channel waveguides that consist of a Si core with an extremely small cross section and have a surrounding cladding of SiO2 materials or air. Their basic characteristics have been investigated, and many functional devices have been demonstrated by using these waveguide structures. Various compact components based on Si nanowires, e.g., filters (Yamada et al., 2003), multiplexers (Chu et al., 2006), photonics crystals (Rue et al., 2006), as well as a number of active devices like lasers (Rong et al., 2005), modulators (Hattori et al., 2010), and switches (Belotti et al., 2010), were studied in the recent years.

2.1. Designs of silicon nanowire waveguide

First, the properties of the Si nanowire waveguide were studied. The typical structure of a Si nanowire waveguide based on a Si substrate is shown in Figure 1 (a). The silica buffer layer should be thick enough (~5 μm) to ensure a low leaky loss. For a typical photonics application, the thickness h=250nm is fixed here, and the width w=500 nm is chosen, which lies in the single mode region. The intensity profile of the propagating electric field is simulated for the channel wire waveguides (see Figure 1(b)).

Figure 1.

Sketch of α-Si nanowire waveguide (a) and the simulated intensity profile of the light in the silicon waveguide

Since the structure is asymmetric along the y direction (see Figure 1 (a)), there exists a cut-off width for each of the modes. Figure 2 shows the propagation constants of some waveguide modes with different structural parameters. The single mode condition can be easily drawn from this figure. It is worthwhile to note that at w=275nm the propagation constants of TE00 mode and TM00 mode are equal. At this point, the birefringence in this Si nanowire waveguide disappears. This might be used for building polarization independent devices. Another interesting phenomenon here is the mode mixing between TM00 mode and TE10 mode around w=700nm, which results in a gap between the corresponding curves. This is because of the fact that these two modes have the same symmetry along the x direction (Pavesi & Lockwood, 2004).

Figure 2.

Propagation constants of different modes in Si nanowire waveguides. Here, λ 0=1550 nm, h=250 nm, n Si=3.63, and n SiO2=1.455. The solid lines are for TE modes, and the dashed lines are for TM modes. The dash-doted line denotes n SiO2. Below this line, modes become leaky.

Propagation losses in straight silicon nanowires arise from different sources, these includes bulk and nonlinear absorptions, substrate leakage, and Rayleigh and sidewall roughness scattering. The Bulk Si has a negligibly low absorption around 1650 nm. The nonlinear absorption arises from high power interaction. If the power used is small, nonlinear effect is not considered, equally for the Rayleigh scattering.

Figure 3.

Fibre butt coupling to Si nanowire waveguide (a); Schematic vertical coupler used to couple light from the fibre into the Si nanowire and vice versa (Taillaert, 2004) (b)

The coupling efficiency from fibre to silicon nanowire waveguide is also very crucial for photonics applications. One wants to couple the biggest amount of light into the waveguide. Some research has shown an efficient way to couple light from the fibre into the nanowire and vice versa, by using grating couplers (see Figure 3), no lenses or focusing gratings are needed, and indeed 38% of coupling efficiency can be achieved (Taillaert, 2004).

2.2. Fabrications of silicon nanowire waveguide

High-index contrast and highly integrated photonics requires a suitable fabrication technology. The silicon nanowire waveguide fabricated and discussed in this chapter consists of a 220 nm thick Si waveguide layer on top of 5μm thick buried oxide layer on a Silicon substrate. By etching completely through the silicon waveguide layer, we obtain a very high refractive index contrast leading to a strong confinement of the light. For silicon nanowires of photonics applications, main fabrication processes are as follows.

2.2.1. Film deposition

To create thin films of the desired materials on a substrate is the beginning step of the device of silicon nanowires fabrication. As shown in Figure 1, ~5 μm silica buffer layer and 250 nm α-Si:H core layer will be successively deposited on a silicon wafer. A uniform, smooth, and defect-free film is always expected. Usually, the plasma enhanced chemical vapour deposition (PECVD) technology is employed for hydrogenated amorphous silicon (α-Si:H) and silica depositions.

Parameters SiO2 α-Si:H
SiH4 flow rate 20 sccm 60 sccm
N2O flow rate 2000 sccm 0 sccm
pressure 300 mTorr 270 mTorr
RF power 800 W 5 W
RF frequency 380 kHz 13.56 MHz
temperature of showerhead 300 °C 300 °C
temperature of platen 250 °C 250 °C
deposition rate ~160 nm/min ~8 nm/min

Table 1.

Process parameters for depositing some films with PECVD

A full description of this deposition process is extremely complex; please refer to the book (Schul & Pearton, 2004) for detailed discussions. Generally speaking, the chamber is first evacuated, then gases with the required species are filled in the chamber through the showerhead. RF energy at a desired frequency (380 kHz or 13.56MHz) is capacitively coupled in through a matching unit. Plasma is started between the showerhead and the bottom electrodes, which are both usually heated around 250 C. The highly energized electrons in this plasma cause the dissociation of the gas precursors into free radicals. These radicals arrive at the substrate by diffusion, and react with each other to establish chemical bonds, then to form the film. The most critical parameters for this deposition process include the gas composition, the process pressure, the RF power and frequency, the temperature of the platen and showerhead. All of there parameters have been optimized for 5 μm silica buffer layer and 250 nm α-Si:H core layer (see Table 1).

2.2.2. Pattern generation

After thin film deposited, the wafer was then cleaved into small samples. Then a process of pattern generation will be carried out. Lithography technology with high resolution and accuracy is required for patterning the photonic components on the desired material. When pushing the lateral dimension of a silicon nanowire waveguide down below half micron, the resolution of conventional I-Line (365nm) steppers is not sufficient. Deep ultra-violet (248nm) lithography has been adopted for fabrication of silicon nanowire waveguides (Bogaerts et al., 2005). The electron beam lithography (EBL) can also be employed, since its low running cost and ability to push the resolution further down to ~50nm. We ever use the Raith 150 EBL system for creating the patterns of Si nanowires. To increase the coupling efficiency, the width of each input waveguide can be tapered from 500 nm to 2 μm through a 25 μm long linear taper. Another write-field with size of 100μm is employed for these 2 μm wide access waveguides.

E-beam resists are the recording and transfer media for EBL [8]. We can categorize them into two types, positive resists and negative resists. Now, a negative resist (ma-N 2405) is chosen and spined onto samples. The process for a resist is as follows:

Spinning at 3000 rpm-6000 rpm to obtain 500 nm-300 nm thin films;

Soft-bake on 90 C for 3 minutes to drive out the solvent, and consolidate the film;

Exposure at 25kV with 120μC/cm2;

Developing with ma-D 532 for 3.5 minutes to form the pattern;

Stripping under O2 plasma or acetone.

Figure 4.

Sketch of a ICP-RIE system

2.2.3. Pattern transfer

We always need to transfer the pattern from the resist onto the target silicon films. This can be achieved usually by etching technique. Reactive ion etching (RIE) technology has been widely adopted for etching semiconductors, dielectrics, and metals, due to its ability to achieve anisotropic, high-selectivity, and high-aspect-ratio etching. However, for the capacitively coupled systems of conventional RIE, the plasma density and energy of ions bombarding the substrate are correlated. By employing an inductively coupled plasma (ICP)-RIE system (see Figure 4), they can be adjusted separately. In this system, the RF power on the coil is mainly responsible for the plasma density, while that on the platen controls the ion energy. In this thesis work, the samples were etched using ICP-RIE technology with the SF6 and C4F8 gas mixture, where C4F8 is responsible for the carbon-fluorine polymer deposition to protect the sidewalls, and SF6 is the main etching gas providing reactive F radicals. The corresponding process parameters are as follows: coil power is 500 W, platen power is 20 W, platen temperature is 20 C, pressure is 20 mTorr, and the flow rates of SF6 and C4F8 gas are 10 and 15 sccm, respectively. Then, a Si etching rate of ~220nm/min is obtained. After the etching process, the samples were baked at 110 C for 30min in an oven just before etching. This helped to reduce the sidewall roughness.

Figure 5.

Flow of the the lift-off process (a) and Fabricated structure of an Al hard mask on Si (b)

Depending on the material and some other aspects, several transfer steps might be needed (e.g., first transfer to a metal layer with lift-off, and then perform silicon etching). Figure 5 shows the typical flow of a lift-off process. A material is deposited onto the substrate usually with evaporation because of the high directivity of the incoming molecules. With the benefit of the undercut profile of the bi-layer resist structure, the material which is deposited on the substrate and on the resist is well separated. Then, the resist is washed away in a solvent, e.g., acetone or Remover 1165, usually with the aid of ultrasonic agitation. The material deposited on the resist is “lifted-off” from the substrate, while that deposited directly on the substrate remains. Note that the polarity of a pattern is also reversed (e.g., from a positive image to a negative image) in this case. Figure 5 (b) shows a fabricated structure with the lift-off process, where the pattern has been transfer to an Al layer, which will be used as a hard mask for the subsequent Si etching.

2.2.4. Measurements

Fabricated silicon-nanowire devices have to be carefully detected using a end-fire coupling setup. A typical end-fire coupling setup is mainly employed to test silicon photonic components as shown in Figure 6. An amplified spontaneous emission (ASE) source gives a broadband unpolarized light with spectral range 1530nm–1610nm. This unpolarized light is butt-coupled to the input waveguide of a component through a focusing gradient index (GRIN) lens. The output light is collected with a microscope objective and split into two beams, one to an infrared (IR) camera, and the other to an optical spectrum analyzer (OSA) through a multi-mode fibre. Polarizers are inserted in front of the IR camera and the multi-mode fibre in order to separate the two polarizations.

Figure 6.

Sketch of the end-fire characterization setup


3. Planar wavelength division multiplexers/demultiplexers based on silicon nanowires

As one of typical applications of silicon nanowire platforms, the chapter will review the recent progress of planar waveguide multiplexers/demultiplexers using Si-nanowire waveguides, including different improved designs and their effective applications in optical networks.

3.1. Filter-type multiplexers/demultiplexers using silicon nanowire platforms

Several different approaches have been reported for wavelength multiplexer and demultiplexer on silicon platform. For a 1: N multiplexer or demultiplexer, if the channel number is not large (e.g., N equals to 2, 4 and 8), planar filter including Mach–Zehnder interferometer (MZI) based interleaver and cascaded ring add/drop filters using high index contrast Si waveguide have the potential to make very compact multiplexer/demultiplexers with desirable optical performance. On the other hand, multiplexers based on AWG and EDG devices are typically large in size but low insertion loss, more desirable for multiple channel applications (e.g., N equals to 16, 64 and 128). MZI filters with flat-top filter responses can contribute to large tolerances to fabricated waveguide width, operated laser wavelength and temperature deviations. Ultra-compact ring resonators based add/drop filters have the small pass band and large channel isolation.

3.1.1. Multiplexers based on MZI filters

A typical MZI is shown in Figure 7(a). Two waveguides with a length difference of L connects L/8-long directional couplers, where L is the total length of the directional coupler in the MZI. The longer unbalanced interferometer arm consists of four curved and two straight sections. The shorter interferometer arm consists of four curved sections and one straight section. The same radius of curvature R and the same directional angle change Θ are used for all curved waveguides. The length difference L is generated in the straight waveguide sections.

Four MZIs are connected to form four-stage MZI as shown in Figure 7(b). Flat-top filter responses are attained for both the cross- and bar-state wavelength bands using the four-stage MZI (Okayama et al., 2010). For a conventional planar waveguide demultiplexer, the shape of the spectral response is of Gaussian type. Therefore, the transmission efficiency is sensitive to a slight wavelength shift and the device is not suitable for high-speed modulation. These drawbacks limit the applications of planar waveguide demultiplexers of Gaussian type in WDM systems. A planar waveguide demultiplexer with a flattened spectral response is thus desirable. The calculated MZI filter response at -40 and 80 ℃ is shown in Figure 8. The real and dash lines mean two different beam polarizations respectively. A properly designed device can minimize the polarization sensitivity (Okayama et al., 2010).

Figure 7.

Four-stage MZI filter: MZI unit (a) and four-stage filter structure constructed by cascaded MZI units (b)

Figure 8.

Simulated spectrum response of four-stage MZI filter at different temperatures (Okayama et al., 2010)

Reconfigurable optical add–drop multiplexers (OADMs) are fundamental devices in WDM optical networks, since they can be used for dynamically wavelength routing and for replacing any failed OADM unit. MZI typed OADMs using silicon nanowires have also been proposed with Bragg-grating reflectors to tune the dropping wavelength through thermo-optic effect (Chu et al., 2006).

Figure 9.

Structure schematic of wavelength-tunable OADM (Chu et al., 2006)

The structure schematics of the fabricated tunable OADM are shown in Figure 9. It is composed using a MZI and two straight waveguides with Bragg-gratings-reflectors based on silicon nanowire platform. The Bragg gratings are formed by periodically making small fins (~30 nm size) on the side wall of the straight silicon photonic wire waveguides. Metal thin-film heaters are arranged on the Bragg grating waveguides for thermo-optic control. By changing the heating current on the heaters, different wavelength channel can be dropped in the DROP port (see Figure 9).

3.1.2. Multiplexers based on ring-resonator filters

The ring resonator is one of the most suitable applications of Si nanowire waveguides with small bending radii (i.e., less than 10 μm). Ring resonator coupled with two bus waveguides forms a 4-port add/drop filter device, as shown in Figure 10. For unit optical input at port 1, its through output is usually at port 2. However, the drop output can be at port 3 when the radius R of the ring waveguide has a strong resonance with the corresponding incident wavelength.

Figure 10.

Add/drop filter using ring resonator coupling with two bus waveguides

To make multi-channel multiplexers, multiple add/drop filters can be cascaded using rings slightly different in size. Figure 11 shows a four-channel wavelength add–drop filter using four ring resonators with different bend radii (6, 6.02, 6.04, and 6.08 μm). However with this approach not only the resonance wavelength but also the free spectral range will vary (i.e., there is no linear relationship between the resonance wavelength and the change in radius). Therefore, the kind of multiplexers has the variable spectral band width for different channels (Bogaerts et al., 2006).

Figure 11.

Four-channel demultiplexer using ring resonators with different bend radius (Bogaerts et al., 2006)

Another fabricated 1x4 WDM multiplexer/demultiplexer with integrated thermal tuning is shown in Figure 12 (Zheng et al., 2010). Instead of using rings slightly different in size to achieve filters with different central wavelengths, identical rings with integrated thermal tuning are used. For better efficiency, the heater is directly integrated to the ring waveguide by doping part of the ring slab as doped resistor, as inset Scanning electron micrograph (SEM) picture shown in Figure 12. Injecting current to the doped resistors though the tuning pads, the ring waveguide can be heat up, and in turn the index of the waveguides are changed to shift the filter central wavelength until it’s aligned with the target wavelength channel. Compared with the device shown in Figure 11, the 4-channel demultiplexer has a uniform 3dB pass band larger than 0.4 nm across all four channels.

Figure 12.

Fabricated 1x4 multiplexer/demultiplexer by cascading 4 ring add/drop filters with integrated doped resistor thermal tuner (shown in the inset SEM picture) using FreeScale 130 nm CMOS process (Zheng et al., 2010)

3.2. Multiple-channel multiplexers/demultiplexers using silicon nanowire platform

Although planar filters are enough simple and effective for the applications of wavelength multiplexing and demulitplexing, they have to be cascaded to support multiple operated wavelength channels, which increase the insertion loss and the noise. AWGs and EDGs are two typical multiplexers/demultiplexers based on planar integrated optical waveguides, which can offer more than 40 channels of dense WDM.

3.2.1. AWGs

Figure 13 shows a schematic representation of the AWG demultiplexer. The device consists of two star couplers, connected by a dispersive waveguide array. The operation principle is as follows. Light propagating in the input waveguide will be coupled into the array via the first star coupler, which is also known as free propagation region. The arrayed waveguides have different lengths. Specifically, the path length difference between adjacent waveguides is constant. The different wavelengths of the light experience different phase changes within the arrayed waveguides. As a consequence, the field distribution at the input aperture will be reproduced at the output aperture. Therefore, at this wavelength, the light will focus in the center of the image plane (provided that the input waveguide is centered in the input plane).

Figure 13.

Schematic configuration for an AWG demultiplexer

Figure 14.

AWG layout based on Si nanowire waveguides (a); light propagation in the microbends (b); the calculated spectral response (c) (Dai & He, 2006a)

As a design example, a design layout is shown in Figure 14 (a) based on Si nanowire waveguides, where the two free propagation regions are overlapped and a series of microbends are inserted at the middle of arrayed waveguides (Dai & He, 2006a). With such a microbend design the device size is minimized to only about 0.165mm2. Figure 14 (b) shows the light propagation in the microbends of the arrayed waveguides. From this figure, one sees that the coupling between arrayed waveguides is negligible even when the adjacent arrayed waveguides are placed very closely. This is due to the decoupling separation of Si nanowires is at the order of 2 μm. Figure 14 (c) shows the calculated spectral response (which does not include the coupling loss between the input/output waveguides and the fibres). From Figure 14(c), one sees that the calculated crosstalk is smaller than –30dB. The excess loss due to the inserted microbends in the arrayed waveguides is very small when the bending radius is large enough.

Figure 15.

SEM picture of a fabricated AWG based on Si nanowire platform (Sasaki et al., 2005)

Figure 15 shows a SEM picture of a fabricated AWG chip with only 70X60 μm2 size (Sasaki et al., 2005). The clear Gaussian spectrum is obtained with a channel spacing of 11 nm, a loss of less than 1 dB, adjacent channel crosstalk of ~13 dB, and an oscillation by the Fabry-Perot resonance of 0.9 dB. In addition, the free spectral range is measured to be 92 nm, which is close to the theoretical value. The dimension of the Si nanowire AWG is 2–3 orders of magnitude smaller than conventional silica based AWG devices. However, the channel crosstalk is too large to satisfy a practical WDM application for the present silicon nanowire AWGs.

An improved design to reduce the channel crosstalk has been proposed by inserting a parabolic taper to expand the guided light beam without exciting higher-order modes (Ohno et al., 2006). Figure 16 shows the modal profile in the slab waveguide, provided that the taper length is 3 μm and the taper width is taken as a parameter. Here, the profile is observed on an arc showing the best fit to the wavefront of the expanded beam. The best Gaussian-like beam is observed for taper width equals to 1.48μm, as shown in Figure 16. With the optimal design, the channel crosstalk can be reduced to -22 dB in the best spectrum.

For Si nanowire devices, owing to the difference in the propagation constants of the transverse electric (TE) and transverse magnetic (TM) modes in planar waveguides, the polarization sensitivity occurs in the spectral responses, which results in a shift in the spectral response peak of each wavelength channel. This wavelength shift is sensitive to the design of the planar waveguide, and can range from a few tenths of nanometers to a few nanometers. As WDM systems move toward closer and closer channel spacing, even a small polarization dependent wavelength shift becomes a severe problem.

Figure 16.

Improved input waveguide to reduce the channel crosstalk of Si nanowire AWGs (Ohno et al., 2006)

Figure 17.

Design of a polarization insensitive AWG demultiplexer based on silicon photonic wires: Schematic configuration for an AWG demultiplexer (a) and simulated spectral responses (TE and TM polarizations) of the designed low AWG for the central and edge channels (top figure), and enlarged view (bottom figure) (b) (Dai & He, 2006b)

A polarization insensitive design of AWG demultiplexers based on Si photonic wires has been presented (Dai & He, 2006b). By optimizing the height and width of the arrayed waveguides, the channel spacing becomes polarization insensitive. To reduce polarization dependent wavelength shift, different diffraction orders for the TE and TM polarizations are chosen. A non-central input has been used to eliminate the shift. The Si photonic wire with an air cladding is considered as an example, and the cross section is shown in the inset of Figure 17(a). When one chooses w co =297 nm and h co =362 nm, a maximal fabrication tolerance for the core width is obtained. By selecting different diffraction order for both polarizations (m TE =61 and m TM =72), one can obtain a low polarization shift. The simulated spectral responses are shown in Figure 17 (b), from which one sees that the peaks of the spectral responses for the TE and TM polarizations are almost the same. This indicates that both the channel spacing and channel wavelengths are polarization insensitive, as predicted.

3.2.2. EDGs

EDG demultiplexers, which integrate the function of a flat grating and a focal lens, can image the input field while dispersing the wavelengths. The Rowland circle structure for a concave grating is one of the most popular configurations for a spectrometer, and has been adopted in an EDG demultiplexer for DWDM applications. Although an EDG demultiplexer is more difficult to fabricate (mainly in the deep etching of the grating facets), it is more compact than an AWG and potentially has a higher spectral finesse (since the total number of the grating facets of an EDG can be much greater than the total number of the arrayed waveguides in an AWG with the modern semiconductor fabrication technology). Unlike in a conventional AWG, the input and output waveguides in an EDG can be arranged at the same side facing the grating, and this allows a low-cost single-side packaging of the chip.

Figure 18.

Schematic diagram of an EDG demultiplexer

An EDG based on a Rowland mounting is illustrated in Figure 18. The field propagating from an input waveguide to the free propagation region is diffracted by each grating facet. It is then refocused onto an imaging curve and guided into the corresponding output waveguides according to the wavelengths. The grating of an EDG demultiplexer is usually coated with a metal (e.g., Au) at the backside in order to enhance the reflection efficiency. In order to reduce reflection loss without the additional processing steps required to coat the back of the grating facets with a reflecting metal coating, a retro-reflecting V-shaped facet was used at each grating tooth. A SEM photograph of the etched grating based on silicon nanowire platforms is shown in Figure 19. In this design light hits each grating facet at about 45 incidences producing total internal reflection (Song & Ding, 2009).

Figure 19.

SEM photograph of a section of the etched grating showing the retro-reflecting V-shaped facets (Song & Ding, 2009)

An EDG demultiplexer based on commercially available silicon-on-insulator (SOI) wafer was recently studied with good performances (Brouckaert et al., 2010). Figure 20 shows the fabricated demultiplexer on a nanophotonic SOI platform using standard wafer scale CMOS processes including deep-UV lithography. The device has four wavelength channels with a channel spacing of 20 nm and a record-small footprint of 280 × 150 μm2.

Figure 20.

SEM picture of 1 × 4 EDG demultiplexer using nanophotonic SOI platform (Brouckaert et al., 2010)

Except the commercial SOI platform, the amorphous-Si (α-Si) is the other important material for nanowire waveguide devices. Although the loss is larger due to the large scattering loss of α-Si waveguides than commercial a SOI wafer, this technology is more versatile since thickness and refractive indices can be adjusted in some range to fit some special requirements and designs. The fabrication process can also be optimized to obtain high quality and high precision. Figure 21 shows a fabricated EDG picture based on α-Si-on-SiO2 instead of commercial SOI wafers (Song & Ding, 2010a).

Figure 21.

SEM picture of an EDG demultiplexer using nanophotonic amorphous-Si platform (Song & Ding, 2010a)

Figure 22.

A schematic show of an EDG, the polarization compensation region is Q1P1Pn, where n is the total number of the grating facets, I is the incident point (Zhu et al., 2008).

The performances of multiplexers based on both silicon nanowire materials are influenced by the large polarization dependent wavelength shift. The method shown in Figure 22 has effectively been used for the polarization compensation of AWGs. However, the same method can not be used for the case of EDGs. For an EDG demultiplexer, there exists a simple free propagation region (a 2D-slab). No other design freedom can be used to compensate the birefringence in the only free propagation region. Recently, by integrating a prism-like polarization compensator in the slab waveguide region adjacent to the grating, one can also obtain a low polarization sensitivity of the design for EDG demultiplexers (Zhu et al., 2008). The same method is also effective for an AWG case. A schematic of the polarization compensated waveguide demultiplexer based on an etched diffraction grating is presented in Figure 22. The polarization compensator consists of a prism-shaped region, which has different effective indexes (for both TE and TM modes) from those of the slab waveguide surrounding it. It can be realized by shallow etching in the same process step as that used to define the single mode ridge waveguides. Thus, no additional processing steps are required. The shape of this area can be optimized to compensate the birefringence in the large free propagation region.

EDG demultiplexers based on conventional waveguide platforms have usually large grating facets, which are advantageous to lowering the manufacturing difficulty. Therefore, we can easily obtain a lower than 30 dB sidelobe level for conventional fabricated EDGs. However, all fabricated EDG demultiplexers using silicon nanowire technology have the sidelobe level from 10 dB to 15 dB due to their sub-wavelength facet size, which leads too high noise floors to satisfy practical WDM requirements. A low sidelobe design has been proposed using Fourier analysis to lightly modulate the size and structure of each retro-reflecting V-shaped facet (Song & Ding, 2010b).

Figure 23.

Spectral responses at the central channel using the conventional and improved design (Song & Ding, 2010b)

Figure 23 shows the spectral responses of the central channel using both the conventional and improved design. Final reflection coefficient for each facet is also shown in the upper-right corner in Figure 23. Due to the effect of the concave grating using the conventional design, the image field distribution near each output waveguide will expend larger sidelobes into the two adjacent waveguides, which results in a large noise floor for the spectral response (see Figure 23). Suppressing crosstalk as small as 30 dB is usually considered inside specifications for telecommunication. In the fabrication process, some technical factors (e.g., writing resolution of photomasks) will also deteriorate the crosstalk performance for an EDG demultiplexer. Therefore, it is of necessity that suppressing crosstalk to less than 50 dB in theory to give an enough space for some fabrication errors. From Figure 23, one can see that the sidelobes using the design by modulating the transfer function into a Gaussian distribution can keep to less than -50 dB. However, the present design also results in an extra loss for the operational spectrum. For the central channel, the additional loss using the low noise floor design is about 2.6 dB. As shown in the upper-right corner in Figure 23, the additional loss results from the process of Gaussian apodization. Therefore, it is possible to reduce significantly the loss with a slightly more generous sidelobe suppression requirement.


4. Conclusion

This chapter has reviewed the recent progress of silicon nanowire waveguide devices and its applications in planar waveguide multiplexers/demultiplexers, including main structures and their different improved designs. The characteristics of Si photonic wire waveguides and ultrasmall optical devices fabricated with this waveguide structure have been described. As application examples, very compact wavelength-selective functions in silicon nanowire platforms have been demonstrated. These include MZI filters, ring resonators, AWGs and EDGs. A few MZI filters are cascaded to attain a flat-top filter response. Micro-ring resonators are easily used to design reconfigurable optical add-drop multiplexer with low-power-consumption, highly flexible and ultra-compact size. AWGs and EDGs are two types of the key components for constructing flexible and large capacity optical networks. We have described their operation principle. Some design examples for Si-nanowire-base AWGs have also been introduced to meet the urgent demand of the size-reduction and increase the scale of planar devices. Some designs for achieving low crosstalk and polarization independence have been reviewed in detail in this chapter.



Parts of works in the chapter are supported by National Natural Science Foundation of China (No. 61007032); Natural Science Foundation of Guangdong Province, China (No. 10451806001005352) and Special Foundation for Young Scientists of Guangdong Province, China (No. LYM10115).The section of the fabrication of silicon nanowires is carried out at the Department of Microelectronics and Applied Physics, Royal Institute of Technology (Sweden).


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Written By

Jun Song and Jinfei Ding

Submitted: October 8th, 2010 Published: July 19th, 2011