Zhongfeng Wang

Dr. Zhongfeng Wang received B.S. and M.S. degrees, both from the Department of Automation at Tsinghua University, Beijing, China. He obtained the Ph.D. degree from the Department of Electrical and Computer Engineering at the University of Minnesota, Minneapolis in 2000. In the past, he has worked for Beijing Hua-hai New Technology Development Co. (1990-95), Beijing, CHINA, Morphics Technology Inc. (now a part of Infineon Technology) (2000-02), Campbell, CA, USA, National Semiconductor Co. (2002-03), Longmont, CO. From 2003 to 2007, he worked in the School of EECS at Oregon State University (OSU), Corvallis, OR. Since June 2007, he has been working for Broadcom Corporation, Irvine, CA, as Senior Principle Scientist. Dr. Wang was the recipient of the Best Student Paper award (1st prize) at the 1999 IEEE Workshop on Signal Processing Systems (SiPS '99) and the co-recipient of the IEEE Circuits and Systems (CAS) Society VLSI Transactions Best Paper Award in 2007. He is also a coauthor (and supervisor) of three (3) Best Student Paper Candidates on IEEE (ICASSP’07, APCCAS’08) and ACM (Asiloma Signal Processing and Systems Conference 2009). He has edited a book “VLSI”, published about 100 technical papers and has filed numerous U.S. patent applications. He served as Associate Editor (AE) for the IEEE Trans. on Circuits and Systems: I (TCAS-I) from 2003 to 2005. He is serving as AE for TCAS-II (2008-2009, 2010-2011) and AE for IEEE Transactions on VLSI Systems (2009-10). He has also served as technical program committee member for many IEEE and ACM conferences. He is currently in the technical committee of VLSI Systems and Applications (VTA-TC) and Circuits and Systems for Communications (CAS-COM) in the IEEE CAS Society. His research interests include the areas of Digital Signal Processing, Digital Communications & Networking, and Low Power/High Speed VLSI Implementation. He is a member of Sigma Xi society and has been a senior member of IEEE CAS society since 2005.

1books edited

Latest work with IntechOpen by Zhongfeng Wang

The process of Integrated Circuits (IC) started its era of VLSI (Very Large Scale Integration) in 1970’s when thousands of transistors were integrated into one single chip. Nowadays we are able to integrate more than a billion transistors on a single chip. However, the term “VLSI” is still being used, though there was some effort to coin a new term ULSI (Ultra-Large Scale Integration) for fine distinctions many years ago. VLSI technology has brought tremendous benefits to our everyday life since its occurrence. VLSI circuits are used everywhere, real applications include microprocessors in a personal computer or workstation, chips in a graphic card, digital camera or camcorder, chips in a cell phone or a portable computing device, and embedded processors in an automobile, et al. VLSI covers many phases of design and fabrication of integrated circuits. For a commercial chip design, it involves system definition, VLSI architecture design and optimization, RTL (register transfer language) coding, (pre- and post-synthesis) simulation and verification, synthesis, place and route, timing analyses and timing closure, and multi-step semiconductor device fabrication including wafer processing, die preparation, IC packaging and testing, et al. As the process technology scales down, hundreds or even thousands of millions of transistors are integrated into one single chip. Hence, more and more complicated systems can be integrated into a single chip, the so-called System-on-chip (SoC), which brings to VLSI engineers ever increasingly challenges to master techniques in various phases of VLSI design. For modern SoC design, practical applications are usually speed hungry. For instance, Ethernet standard has evolved from 10Mbps to 10Gbps. Now the specification for 100Mbps Ethernet is on the way. On the other hand, with the popularity of wireless and portable computing devices, low power consumption has become extremely critical. To meet these contradicting requirements, VLSI designers have to perform optimizations at all levels of design. This book is intended to cover a wide range of VLSI design topics. The book can be roughly partitioned into four parts. Part I is mainly focused on algorithmic level and architectural level VLSI design and optimization for image and video signal processing systems. Part II addresses VLSI design optimizations for cryptography and error correction coding. Part III discusses general SoC design techniques as well as other application-specific VLSI design optimizations. The last part will cover generic nano-scale circuit-level design techniques.

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