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Wen-Jyi Hwang

National Taiwan Normal University Taiwan

Wen-Jyi Hwang received the MSECE and PhD degrees from the University of Massachusetts Amherst, Amherst, MA, USA, in 1990 and 1993, respectively. From September 1993 to January 2003, he was with the Department of Electrical Engineering, Chung Yuan Christian University, Taiwan. In February 2003, he joined the Department of Computer Science and Information Engineering, National Taiwan Normal University, Taipei, Taiwan, where he is currently a full professor. From 2006 to 2010, he also served as the chairman of the same department. His research interests include parallel computing systems, Internet of things, reconfigurable computing, field-programmable gate array fast prototyping, and system on chip. Dr. Hwang is the recipient of the 2002 Outstanding Young Researcher Award from the Asia-Pacific Board of the IEEE Communication Society and 2002 Outstanding Young Electrical Engineer Award from the Chinese Institute of the Electrical Engineering.

1books edited

2chapters authored

Latest work with IntechOpen by Wen-Jyi Hwang

Parallel and distributed computing has been one of the most active areas of research in recent years. The techniques involved have found significant applications in areas as diverse as engineering, management, natural sciences, and social sciences. This book reports state-of-the-art topics and advances in this emerging field. Completely up-to-date, aspects it examines include the following: 1) Social networks; 2) Smart grids; 3) Graphic processing unit computation; 4) Distributed software development tools; 5) Analytic hierarchy process and the analytic network process

Recent Progress in Parallel and Distributed Computing

Recent Progress in Parallel and Distributed Computing

Edited by Wen-Jyi Hwang

Chapters authored

Efficient Hardware Architecture for Correlation-Based Spike Detection and Unsupervised Clustering

By Chien-Min Ou and Wen-Jyi Hwang

This chapter presents a novel hardware architecture for correlation-based spike detection and unsupervised clustering. The architecture is able to utilize the information extracted from the results of spike clustering for efficient spike detection. The architecture supports the fast computation for the normalized correlation and OSORT operations. The normalized correlation is used for template matching for accurate spike detection. The OSORT algorithm is adopted for unsupervised classification of the detected spikes. The mean of spikes of each cluster produced by the OSORT algorithm is used as the templates for subsequent detection. The architecture adopts postnormalization technique for reducing the area costs. Modified OSORT operations are also proposed for facilitating unsupervised clustering by hardware. The proposed architecture is implemented by field programmable gate array (FPGA) for performance evaluation. In addition to attaining high detection and classification accuracy for spike sorting, experimental results reveal that the proposed architecture is an efficient design providing low area cost and high throughput for real-time offline spike sorting applications.

Part of the book: Field

Introductory Chapter: The Newest Research in Parallel and Distributed Computing

By Wen-Jyi Hwang

Part of the book: Recent Progress in Parallel and Distributed Computing

Related collaborators

Oana Boncalo

Polytechnic University of Timişoara , Romania

Johann Reger

Ilmenau University of Technology , Germany

Alexandru Amaricai

Polytechnic University of Timişoara , Romania

Nikhil Marriwala

Kurukshetra University , India

Francesco Grancagnolo

University of Salento , Italy

Steffen Mauch

Furtwangen University , Germany

Gabriel Torrens

University of the Balearic Islands , Spain

Chien-Min Ou

Chien Hsin University of Science and Technology , Taiwan

O.P Sahu

Kurukshetra University , India

Anil Vohra

Kurukshetra University , India