In order to maintain technological superiority over other systems, modern equipment for aerospace, defence and security (ADS) applications require advanced integrated circuits operating at microwave and millimetre wave frequencies. High integration is necessary to obtain low SWaP-C features thus enabling the installation of this category of equipment in unfriendly environments: compact spaces, and subject to heavy mechanical loads and temperature stress. This chapter reviews the topology, technology and trends of microwave circuits in UWB systems for ADS applications. Amplification at high frequency is a crucial function: high power amplifiers in the transmit (Tx) chain and low-noise amplifiers in the receive (Rx) chain will be revised, in addition to medium-power (gain) amps. Signal conditioning and routing is also essential: MIMO architecture are becoming the standard and therefore switching and signal phasing and attenuation is increasingly needed, to obtain the desired beam steering and shaping. Each type of circuits leverages the benefits of either gallium nitride (GaN) or gallium arsenide (GaAs), and the role of the semiconductor will be explained. Finally, an outline on multi-functional circuits (single-chip front-ends and core-chips) will be presented: the trend is to realize the whole microwave section of a Tx/Rx module with only to MMICs that perform all the functionalities requested at microwave frequencies.
- microwave front-ends
- microwave measurement circuits
- microwave transmit/receive modules
- multi-functional MMICs
- III–V semiconductors
High-frequency circuits are necessary to process the microwave signal between the radiating element and the digital signal processing (DSP) unit. Although, analogue-to-digital converters (ADC) are constantly increasing their frequency and power handling capability, they are still away from being able to detect very low power RF signal or capable to generate high RF power. Microwave circuits, therefore, are inserted to perform high-frequency processing so the ADC, and consequently the DSP unit, can more easily handle the RF signal. Such high-frequency processing functions are: amplification (low-noise, gain or high-power), signal combining or splitting, signal routing, phase and amplitude modulation, signal measurement, finally frequency generation and conversion.
A possible way to cluster these functions is divide them in front-end or back-end functionalities. The prior are typically connected to the radiating element, implementing low-noise or high-power amplification and some form of signal routing and phase and amplitude modulation. Instead, microwave back-ends are connected to the ADC and therefore provide all the functionalities so the RF signal can be profitably delivered to the digital section. Such functions are typically more complex functions such as extraction of signal characteristics, frequency generation and conversion.
The two sub-system and the relevant circuits will be discussed in the following.
In this chapter, we will not describe signal filtering, being this an extremely extensive topic, excellently covered by Matthaei et al. work  and other chapters in this book.
2. Front-end systems and their circuits
As briefly described in Section 1, a microwave front-end system is directly connected to the radiating element. In most cases, these subsystems provide dual mode operation: receive and transmit mode. In receive mode, the incoming RF signal is very weak and its power needs to be amplified to an adequate level, without adding excessive noise content or distorting the RF signal.
In transmit mode, the outgoing RF signal has to be raised to the highest possible value in order to guarantee an adequate transmission level. In this case too, distortion must be limited in order to preserve the information carried by the RF signal.
Signal routing is often necessary to implement the desired RF path between the digital section and the selected antenna.
2.1 Antenna front end
Antenna front ends (AFE) are employed to condition the received signal coming from the antenna port to make it usable for the following sub-systems, an example of which is described in Section 3.
The main functions of an AFE circuit are: low-noise amplification, protection against strong interference, signal routing when multiple I/O ports are present, and partitioning into sub-bands if needed. Figure 1 depicts a simplified schematic.
The first, leftmost, section of the AFE contains the protection and signal routing function. The protection against strong interfering signals is accomplished using a limiting circuit commonly realized through a shunt diode. The limiter has to be the first circuit in order to protect the following components from strong interference signals that might damage sensitive circuitry. Next, there is a signal routing section (switch), which is necessary when multiple inputs are present. Switching circuits are described in Section 2.1.2.
Once the signal has been routed, and strong interference has been eliminated then the signal is fed to a frequency diplexer (if necessary) and subsequently to a low-noise amplifying (LNA) stage. The frequency diplexer is inserted when the following stages operate at sub-bands that are less than the total RF input band-width (BW). In Figure 1, the bands are indicated as low-band (LB) and high-band (LB).
The single sub-bands can cover a decade BW, so that the overall BW of the module is more than a decade. Finally, the LNA is the key-component of AFE circuit and its role and properties are described in Section 2.1.1.
Figure 2 reports the AFE circuit’s noise figure and gain in the two LB and NB sub-bands. This is a typical performance that can be accomplished by using COTS (commercial off-the-shelf) available components.
The gain (dashed lines) are plotted on the left axis while the NF (solid line) on the right. Some observations in the following: first, the effect of the input diplexer is quite evident around 2.5 GHz were the two gains cross. This is a side-effect of applying the RF at one input and then di-plexing into two sub-bands. The relatively high NF in LB and HB is mainly due to all the passive and protection circuits before the LNAs-Reasonably, all there passive structure will account for 4/5 dB losses. Additionally summing the NF of the LNA will lead to 5 dB in LB and typical 8/10 dB in HB. The gain ripple, more evident in the HB sub-band is due to the electrically long interconnects at microwave frequencies. Superior performance in terms of NF can be obtained by designing by oneself the critical circuits (i.e. LNA).
2.1.1 Low-noise amplifiers (LNA)
Low-noise amplifiers are an omnipresent component in any microwave receiving system. The LNA’s role is to increase the power of the input signal, usually very low especially in long-distance communications, without adding an excessive noise contribution that would make the signal unmanageable by the following stages. The LNA’s key characteristics are its gain (G) and noise figure (NF). Secondary, but still important parameters are linearity, power consumption and port matching.
All these parameters are influenced by on the maximum operating frequency, bandwidth and semiconductor technology. Understandably, performance tends to degrade as the frequency and bandwidth increase. Ideally, G should be high while NF should be the lowest possible. Below 10 GHz, 30 dB gain and less than 1.0 dB NF are suitable numbers, reachable when the circuits are realized in III–V compound semiconductors. Above 10 GHz, some degradation has to be accepted in terms of greater NF and smaller gain.
The impact of the LNA’s NF and G on system performance can be estimated using Friis’ well-known formula that computes the system’s cascade noise figure as a function of each stages’ NF and G. An important consequence of this formula is that the overall NF of a radio receiver is primarily established by the NF of its first amplifying stage.
Subsequent stages have a weaker effect on signal-to-noise ratio. For this reason, the first stage amplifier in a receiver should be the LNA. Otherwise, as in Figure 1, the trade-off between NF and robustness (protection against strong interference) must be accepted.
Regarding the semiconductor, GaAs represents an interesting trade-off between performance and technology readiness level. GaN is slightly less performing, in terms of NF, but has the benefit of handling much more power, making it suitable in receivers where the presence of strong signals is foreseen.
An LNA must satisfy linear, noise, power and intermodulation requirements. Often linear and noise performance require opposite design choices, i.e. matching for noise or matching for gain. Simultaneously satisfying requirements often in contrast between them is not simple at all.
Luckily enough, many design strategies have been described, s dome of which dating back to the 1970s  up to more recent ones . In the latter, a comprehensive design strategy that simultaneously accounts for linear and noise requirements is presented. Most of these strategies have a limited bandwidth since feedback is computed at the central design frequency. In  a survey of GaAs LNAs operating at very different frequencies (from 5 to more than 100 GHz) is presented. The most suitable design technique is indicated depending on the LNA’s operating frequency.
On the other hand, there are other deign topologies, mainly distributed, that are capable of obtaining UWB performance. Figure 3 depicts the circuit schematic and micro-photo of decade bandit LNA operating between 2 and 18 GHz .
The LNA depicted in Figure 3, demonstrates 23 dB typical gain and 4 dB typical NF over the entire 2–18 GHZ BW. Another interesting feature is its capability of withstanding high input power signals, demonstrated up to 10 W RF continuous wave. Gain and noise figure of the LNA reported in  is plotted in Figure 4, demonstrating the LNA’s capability to obtain more than 20 dB over a very wide operating BW. In the same condition, the NF averages at 3 dB.
2.1.2 Switching circuits
Switching circuits in microwave system are used to implement signal routing therefore performing path selection. Usually they have one common input port and N possible output ports, and only one can be selected at a certain instant.
The switching device can be either a diode or a Field Effect Transistor (FET). As usual, each possibility has its pros and cons, and will be discussed in the following. The diode switch has better loss performance; it can be fractions of dB even at tenths of GHz. On the contrary, FET switches are quite lossy and very easily reach 1–2 dB insertion loss even below 10 GHz. Apart from this very important parameter, all other aspects tend to be in favour of the FET.
Firstly, the FET is voltage controlled and does not dissipate any DC power thanks to the very high impedance of the gate terminal. On the contrary, diodes require a large current to achieve their low loss state, and therefore some DC power is dissipated across the diode. Secondly, the FET has faster switching time, i.e. the time required to select a different output once the appropriate external command has been received. The switching time in FET switches can be as low as a few nanoseconds. Diode switches may require tenths of nanoseconds to change their state since the direction of the bias current needs to be reversed, and this is not immediate considering the stray capacitances in the control section and the diode itself. Finally, FET switches are more robust and linear, especially if realized in wide band-gap semiconductors as GaN. They can tolerate up to tenths of Watts, while the switch diodes seldom survives incident powers above a few Watts.
Isolation, i.e. the unwanted leakage to an unselected path, is another important parameter in switches. However, this performance mainly depends on the selected switch topology, rather than the selected technology.
The frequency behaviour of the two technologies is comparable, especially when small gate length transistors are employed. In both cases, diodes and FETs, acceptable performance up to 50 GHz, and even beyond, are achievable.
Consequently, the choice between FET and diode switches, should be carried out considering losses, power handling and switching time requirements.
Several UWB switching topologies have been proposed and validated. Typically, an inductor is inserted in the switching circuit to resonate the diode’s or FET’s OFF-state parasitic capacitance . A resistor is also inserted, in this way a more uniform behaviour is obtained over a larger operating BW. The schematic applying this technique is depicted in Figure 5 (left) together with its physical implementation (right). The two compensating inductors and resistors are labelled with L1/ R1 and L2/R2, while the two compensated FETs are Q 1 and Q 2.
The UWB switch shows an insertion loss lower than 2.2 dB, an isolation higher than 25 dB, and a power handling capability better than 38.5 dBm at the 1 dB compression point in the entire bandwidth. The SPDT’s key performance is plotted in Figure 6.
GaN-HEMT technology therefore demonstrates a good level of maturity for microwave power switch applications and as such is becoming the reference technology for specific high-end applications.
2.2 Transmit/receive modules
Transmit/receive modules (TRM) are the key building block of most telecommunication apparatus, Radars and many other Electronic Systems. Their role is to process the RF signal in both operating modes: transmit and receive. Typically, a TRM operates in a half-duplex manner, i.e. in a certain instant it is either in receive mode or in transmit mode, therefore processing either a received signal or a signal to be transmitted. A possible schematic diagram of a T/R module is reported in Figure 7; a TRM is always connected in some way to a radiating element (Ant).
In order to keep the dimension of the TRM as small as possible, some circuits are involved in both transmit and receive mode and therefore need to process the signal independently form the port at which it arrives. Referring to Figure 7, such components are the switches (SWT), the attenuator (ATN) and the phase shifter (PHS). Incidentally, the latter is required in systems that perform beam steering and can be avoided elsewhere. The attenuator instead can be inserted for multiple purposes: it can be used to prevent strong RF signals leaking to the following circuits or to obtain beam amplitude tailoring, in phased arrays.
Critical components are the LNA, already described, and the high-power amplifier (HPA) described in the following section. Another critical component is the switch connected to the antenna port. The key feature of this element is to show very low losses. High losses would entail an unacceptable degradation of both received and transmitted signal. In the past, for high frequency applications, this element was often a bulky ferrite circulator. With the advent of GaN semiconductor, well-known for its superior power handling capabilities, MMIC technology has become the standard. Finally, the gain control section in the receive path is used to attenuate strong incoming signals. It is seldom used in transmit mode, since in most application the goal is to transmit as much RF power as possible.
In Electronic Warfare systems, which notoriously manage UWB signal to contrast different emitters, the maximum to minimum operating frequency of the TRM can be as high as 6-to-1. Higher ratios became unfeasible since the increase in the BW would be obtained to detriment of performance, and, in any case, it could be impractical since it is very challenging to design directional antennas having wider bandwidths anyway.
For other aerospace and avionics applications, the operating BW is typically 20–40% the value of the central operating frequency.
The typical output power is around 5 W (37 dBm) while the RX gain is on average 20 dB. Such performance was accomplished through Multifunction chips and ASIC component integration in new multi-layers technology (Roger 4003/Cu/FR4) were adopted in order to reduce cost, space, production life cycle and increase integration level. High output power in the transmit mode was achieved using a 4 W wideband amplifier and by minimizing circulator loss.
2.2.1 High-power amplifiers (HPA)
The HPA is the key component of any microwave transmission systems, and its performance may have a huge impact on the final system architecture.
Its role is to boost the transmitted signal’s power without adding undesirable signals generated by distortion. At the same time, the HPA should be efficient, in terms of its capability of transforming to the power provided by the DC supply RF power. From a technology point of view, they come in at least two variants: vacuum tubes and solid state circuits. With the advance of semiconductor technologies, vacuum tubes are becoming a legacy product. Nonetheless, they still provide a valuable solution when the power to be transmitted is in the order of tenths of kilowatts. Typically this requirement is related with a few avionic and spaceborne applications. The advantages of solid state device in terms of ruggedness, size, reliability, performance and cost are such that, whenever a solid state alternative becomes accessible, it quickly becomes adopted by the System Engineering team.
Since its first appearance in R&D labs at the beginning of the new millennium, GaN has travelled a long way, and has now become the standard semiconductor, even in ADS systems, where reliability and process repeatability is a main concern. The advantages of GaN, over other III–V semiconductor, for high-power and high-frequency systems, reside on its capability to deliver a high amount of RF power in a small footprint, with little or none thermal management issues. Especially the last feature, make GaN attractive for ADS applications, often operating in harsh thermos-mechanical environments.
MMIC GaN HPAs are capable of delivering hundreds of Watts at low microwave frequency (<5 GHz), tenths of watts at microwave frequencies (5–20 GHz), and some Watts even at millimetre-wave.
Scientific literature focusing on the design of HPAs is practically infinite, and here we will give an extremely short hint on some design topologies. Usually HPA are synthesized by combing, at the HPAs output, the power provided by some FETs (where some is usually a power of 2). Moreover, suitable techniques can be applied to increase the output power and efficiency . These techniques rely on synthesizing the output impedance to respect an optimum condition both at the operating frequency and also at its higher order harmonics. As you can imagine this can be complicated, especially in wideband applications.
If a very large BW is sought, then other circuit topologies become handy. For example, distributed amplification is well known for its UWB frequency response. Simultaneously, a cascode transistor topology can be applied , increasing even more the amplifier’s BW.
3. Back-end systems and their circuits
As briefly described in Section 1, a microwave back-end system is responsible for delivering the RF signal—or better its information content—to the ADC and consequently the DSP unit or to the low-frequency (often referred to as VIDEO) analogue stages.
Typically, this is accomplished through frequency conversion, when the DSP performs A/D sampling, or by performing some manipulation on the RF signal so its power and/or frequency component can be determined by the subsequent stages.
3.1 Frequency conversion
UWB downconverters and up-converters usually require multi-stage conversion plan since a single frequency conversion would not be able to eliminate all over spurs or leakage of the Local Oscillator (LO) signal. In fact, a very large sweep of LO frequency would be needed to down-convert the required portion of the large input RF BW into the smaller Intermediate Frequency (IF) BW. Therefore, at some point, there will be inevitably a strong intermodulation product or harmonic of LO that would fall in the IF BW. To overcome this issue a multi-stage frequency conversion topology, depicted in Figure 9, is advisable when the RF BW is large.
Here we will discuss in detail the down-converter architecture, but similar assumptions and design goals hold for the up-converter.
The first stage of the schematic depicted in Figure 9, is the filter bank, so the UWB signal RF IN signal is split into smaller adjacent sub-bands. Typically, each sub-band is less than an octave, and consequently the number of filters depends on the ratio of the maximum to minimum RF IN frequency. In this way, the input RF signal is preselected ensuring that only the required portion of the input RF BW is fed to the following stages.
The next section consists in a frequency translation, performed by a set of mixers. Even in a downconverter system, often this first section of mixing performs an up-conversion. This is to shift the spurs to a very high frequency, well above the IF1 range. The value of LO1 is inversely proportional to the selected RF frequency. In this way, the sum of incoming RF IN signal and LO is constant and equal to IF1. Keep in mind that, the first stage is typically an up-converter even if the overall sub-system performs down-conversion. Some variable gain is also inserted in the RF chain to level out the gain response. In fact, as the input RF frequency increases, the RF losses become more evident and need to be compensated by lowering the attenuation accordingly.
At this point, all the desired signal falls within IF1, whose BW is much smaller than the UWB signal. RF IN, and can now be more easily down-converted to IF2 which is the sub-system’s output frequency. A single LO2 frequency is sufficient in most cases, while in other UWB applications a variable LO2 could be required. In some extreme cases, for example when the RF BW is larger than a decade, a triple frequency conversion could be required .
This topology is definitively more complex than the single down-converter case, and requires a high frequency IF1 which often could be in the millimetre wavelength. Undoubtedly, such system complexity is the price to pay for having a UWB down-converter with high spurious free dynamic range (i.e. negligible spurs or LO harmonics falling in the IF OUT BW).
A key performance indicator of a frequency-converter is the Spurious-Free Dynamic-Range (SFDR). This parameter quantifies the ratio (expressed in dB) between the fundamental (desired tone) and the intermodulation product having the highest power inside the IF band. SFDR can be seen as an indicator of the down-converter’s capability to perform its characteristic function without injecting unwanted signals at the output IF. Such unwanted signals, referred to as intermodulation components (defined in the following Section 3.1.1) can be mistaken by the receiver as low power real signals, but in reality they are an unwanted by-product of the real signal’s down-conversion.
Intermodulation products are unavoidable, however the important matter is that they are below a given threshold therefore becoming undetectable and will not produce ‘false signals’ at system level. SFDR usually has a characteristic behaviour vs. frequency since, referring to Figure 9, LO1 and LO2 change in order to select different input RF bands, and therefore will produce different intermodulation orders when down-converting different RF input bands. Figure 10 depicts the SFDR of an UWB 2–18 GHz downconverter  where a three Local Oscillators architecture is employed.
3.1.1 UWB mixers
Mixer circuits are employed to translate the information applied to the RF carrier to a different frequency, namely IF, more easily processed by other circuits, typically of a digital nature. Given the incoming RF signal, and the LO signal, the frequency components at output of the mixer are:
where m and n are positive or negative or null integers. In a down-converter the desired Intermediate Frequency (IF) value is obtained when m = 1 and n = −1 or vice versa. In an up converter, IF appears instead of RF in the previous relation and m = n = 1 applies.
LO frequency is selected to trade-off between feasible LO values and harmful intermodulation products falling close to IF frequency. Undesirable intermodulation components are obtained when m ≠ 1 or n ≠ 1. The order of the intermodulation product is defined as: order = m + n. Usually the power level decreases as the order increases.
UWB mixers are typically realized through a double balanced, or double-double balanced (sometimes referred to as a triple) topology to eliminate the most annoying intermodulation and LO harmonics. Spurs and harmonic rejection is accomplished by appropriately combining the mixing signal through hybrid quadrature couplers (BALUNs or similar circuits). Ultimately, the UWB behaviour is limited by the coupling structures since the mixing device’s behaviour can be considered ideal. UWB mixers often came in a connectorized package as the example depicted in Figure 11. It is also possible to obtain UWB Mixers in MMIC technology, however it is more difficult to realize UWB combiner/splitters in the confined dimensions required by MMICs.
An extensive description on the of mixers and their property can be found in Dr. Maas’s comprehensive study: Microwave Mixers .
3.2 Microwave measurements
In some applications, the incoming RF signal is unknown and therefore the system requires to quickly determine some of its key features, for example, carrier frequency and envelope power. Performing these measurements on UWB RF signals using only Digital HW can be complicated, or in some cases even impossible considering the power and frequency limitations of Silicon based technology. For this reason, microwave circuits have to be inserted in the receiving system to perform preliminary yet fast signal characterization.
3.2.1 RF power measurement
The power measurement of an RF signal is commonly performed by appropriately feeding the RF signal to a diode—or to an array of diodes.
The diode has a well-known input-to-output square law characteristic, around the origin, when the diode is slightly forward biased. The signal coming out from the diode is composed by the even order harmonics of the incident RF signal and, most of all, its zero order term that is a DC voltage. The latter is captured by the following stages to perform the power measurement. There are several circuits that are capable of performing such functions, and their topology depends on the overall BW of the RF signal and also its dynamic range, i.e. the maximum to minimum power ratio to be analysed. A simplified block diagram of the diode detector is shown in Figure 12, together with the waveforms at each section of the circuit.
A detector logarithmic video amplifier (DLVA) consists of a diode detector followed by a logarithmic video amplifier (LVA), and its simplified schematic is given in Figure 13.
As explained before, the diode (detector circuit) converts RF signal into a DC voltage which is then fed to an amplifier with a logarithmic transfer function. Let us analyse the role of the two circuits.
The diode’s quadratic law provides the DC voltage component of the incoming RF signal. The level of such DC voltage can vary significantly: from tenths of μV to some Volts. The ratio between the maximum and minimum voltage could be unacceptable for the subsequent processing stages. A LVA is therefore inserted to compress the dynamic and make it more usable for the following stages. In fact, the log amplifier will greatly amplify the weak signals leaving the strong signal practically unaffected. It is worthwhile noting LVA’s operating BW is a few tenths of MHz as opposed to the incoming signal which may be a few tenths of GHz. The dotted line in Figure 14 depicts the linear relationship between input power in dBm and output power in Volts when using a LVA after the diode. The same Figure 14 reports also the I/O characteristic without LVA, solid line.
It appears that the log relationship is very useful for performing power measurements, since its gradient is constant (approximately 25 mV/dB in Figure 14). The response without LVA is practically null up to −5 dBm and then rises instantaneously to +1.0 V after −5 dBm, making it unpractical. When dynamic range is not critical, a DLVA with a 30- or 40-dB dynamic range may provide sufficient performance to help capture and process all signals present.
When the dynamic range of the incoming RF signal is greater than the one accepted by the diode, then the schematic depicted in Figure 15 can be used to increase the system’s dynamic range.
Basically, the input signal is split in two paths: one path having high RF gain and one path having low RF gain hence an RF attenuated path. Then, the VIDEO signal coming out from both DLVAs is summed at the output.
The principle of operation is the following: when the signal is low, only the amplified DLVA detects thanks to the RF gain (G) before the DLVA. When the signal power level becomes high, the gain path is practically saturated, delivering a constant voltage value, while the attenuated (Att) path performs the additional power measurement whose voltage is increased by the constant term coming from the saturated gain path.
Finally, it is worthwhile noting that the BW of these circuits is practically limited by the BW of the RF circuits preceding the diode. In fact, the latter is often capable of processing RF signals up to tenths of GHz. Diode operating at 50 GHz are not uncommon.
Another way to increase the system’s dynamic range is to use a SDLVA topology, schematically depicted in Figure 16.
An SDLVA (Successive Detection Logarithmic Amplifier) is similar to a DLVA however, the SDLVA circuit is designed in such a way that it does not need a detector before the logarithmic video amplifier. The SDLVA uses multiple compressive stages of RF gain to emulate the exponential transfer function. The output of each stage is coupled into a linear detector. The detector operates over a narrower dynamic range, which means that more detectors are needed to cover the same dynamic range.
The principle of operation is the following: when the RF signal power is low, all amplifiers operate in a linear condition (i.e. the output power is proportional to the input power) and consequently the DC voltage provided by the diode detector is proportional too. As the power increases, the final stages begin to saturate and their output is capped to a saturation value. Therefore, any additional output voltage will be delivered only from the first stages until they saturate too, saturating as a consequence the Video output at its maximum values.
The typical dynamic range of each detector is approximately 10 dB, which are then summed in a single video amplifier so as to provide a single detected output. The overall dynamic range is 10 × N dB where N is the number of amplifiers. N = 7–8 represents an acceptable trade-off between high dynamic range and circuit feasibility.
3.2.2 RF frequency measurement
Microwave circuits can be profitably employed to perform an estimation of the carrier frequency of the incoming RF signal. This is all but a simple task. Nowadays, the advance of digital components has made feasible digital frequency measurement up to 10 GHz and beyond. Even in this case, some form of microwave front-end is required to prepare the signal for digital sampling. Above tenths of GHz, and considering UWB signals, pure digital frequency estimation becomes unpractical and microwave circuits have to be inserted.
UWB microwave circuits that perform frequency estimation are referred to as Instantaneous Frequency Measurement (IFM), whose very simplified schematic diagram is reported in Figure 17.
The RF input vin(t) = A cos(ωt), where ω = 2f and f is the instantaneous frequency carrier, is hard-limit amplified and then split by a power divider in two equal amplitude signals, one of which is delayed with respect to the other through a delay line. Hard limitation consist in amplifying all incoming signal to a fixed power level—obviously within a feasible dynamic range. The role of the delay line is to out-phase the two signals coming from the power divider’s outputs by a quantity proportional to the frequency carrier.
The higher the frequency the more the two signals applied to the mixer will be out-phased.
Considering the relationship IF = |m*RF + n*LO| already introduced in Section 3.1.1, we have that the valuable mixer’s output will be a zero frequency product and therefore a DC voltage since RF and LO signals have, of course, the same carrier frequency. The amplitude of the DC voltage is proportional to cosine of the out-phase between the two signals and therefore to the carrier frequency, trough the relationship:
where ΔL is the difference between the physical distance of the delay line and the direct pat; f is the carrier frequency, while vp the speed of the EM wave in the medium. Higher order mixing terms are eliminated by the low-pass filter (LPF). The BW of such circuit is limited by the BW the power divider and the mixer. As a consequence, the delay is synthesized to implement π shift (maximum out-phase) at the components maximum operating frequency.
Very often Vout is digitized by means of a N-BIT analog-to-digital converter (ADC). This helps the subsequent stages since the information is provided digitally, but the information accuracy is limited by the number of BITs (typically not more than four) and quantization effects. To overcome this issue the scheme in Figure 18 is applied.
The input signal is split into N lines (three in the example depicted in Figure 18), the three signals are the delayed by appropriately dimensioned transmission liens. Each line has double the electrical length of the preceding section. Delay t1 is determined so that the signal measuring is unambiguous at the maximum operating frequency (worst case for ambiguity discrimination. In practice, the shortest time delay (t1) is used to resolve the frequency measurement ambiguities while the largest time delays (t2 = 2*t1 and t3 = 4*t1) provide a fine frequency measurement accuracy Δf3 = Δf1/8.
The three output voltages (Vout 1, 2 and 3) values vs. input frequency are depicted in Figure 19. Vout 1 (dashed line) is the only transfer function that is unambiguous vs. the input frequency. Therefore, this value is used to obtain a coarse yet unambiguous information of the input frequency. The other two voltages (Vout 2 and 3) suffer from ambiguity, but their resolution (in terms of ΔV/Δf) is better and therefore provides an ambiguous yet accurate information. The real frequency estimation is performed by correlating the three output voltages values.
If a larger BW is sought, then the topology depicted in Figure 20 becomes useful.
The RF input signal is split in two or more paths. The number of parallel output branches depends on the BW of RF IN; a larger BW requires a greater number of paths. Once the signal has been divided, it is filtered into sub-bands and then translated, through mixing, at the frequency of operation of the IFM. The sum of RFn + LOn must be constant for each branch and equal to the operating frequency of the IFM. In order to determine the actual RF IN frequency, a detector—not reported in Figure 20—must be inserted in each branch so the system can discriminate between the various possibilities. The branch in which the detector reads power corresponds to the sub-band of interest. In theory, the BW can be extended by increasing the number of adjacent sub-bands. There are practical limitations, and the number of sub-bands is seldom greater than four.
4. Multi-functional integrated circuits
The trend to integrate several function in one MMICs is unavoidable given the low SWaP-C constraints of modern electronic systems for high-end applications. At the moment it is possible to realize a full T/R module using only two MMICs, each one realized in the appropriate semiconductor therefore leveraging its benefits and peculiarities , and possibly in the near future there will be an all-on-one multi-functional RF MMIC. Figure 21 depicts a transmit/receive module diagram, very similar to the one described in Section 2.2, where the area delimited by dotted lines indicate the two multifunctional MMICs that fulfil all TRM functionalities. The two MMICs are the Single Chip Front End (SCFE) and the Core-Chip (CC). The prior is directly connected to the antenna, while the latter to the microwave back-end and the DSP sections. Red and blue arrows indicate the direction of Rx and Tx signal. In some cases, black lines, the signal travels in both direction according to transmit or receive mode.
4.1 Single-chip front-end (SCFE)
As described in Section 2.2, RF TRMs are usually realized by interconnecting several functionalities fabricated on separate MMICs. Such an approach is somehow the result of the inability of a single compound semiconductor technology to properly carry out the main features normally required by an RF TRM. In some applications, such as active electronically scanned array (AESA), this multichip approach could result in a suboptimal overall system. Indeed, the density of the radiating elements, and thus the performance of the array, is directly related to the physical size of the overall TRM that is adopted behind each elementary radiating element. Thus, the availability of highly integrated front ends with sensible smaller foot print and weight could be very useful for such systems, since it would allow the increase of radiating elements density, leading to the performance maximization.
Recently, with the advance of highly performing and reliable commercial GaN processes, the concept of single-chip front end (SCFE) was investigated as a possible alternative to multichip TRMs.
Essentially, an SCFE is a single MMIC that integrates the three functionalities that are required for a half-duplex TRM, i.e. the HPA, the LNA, and the single-pole double-throw (SPDT) switch. GaN offers remarkable advantages in terms of reliability, robustness, heat dissipation and power handling capability, as compared to GaAs counterparts for this specific application.
The limiter inserted before the LNA, in Figure 21, is optional, and depends on the maxim incident power and the LNA’s robustness.
4.2 Core chip (CC)
The same driver that pushes the advancement of SCFE circuits, generally referred to as low SWaP-C requirements, is behind the development of core-chips (CC) too.
As opposed to GaN used in SCFE, CCs are developed in GaAs thanks to its superior high frequency performance, and most of all the possibility to employ simultaneously enhancement and depletion mode transistor, which are the necessary for the digital logic on board CCs.
Essentially, a CC is a single MMIC that integrates the three functionalities that are required for signal conditioning and routing in modern TRMs, i.e. the phase shifter, the attenuator, and the single-pole double-throw (SPDT) switches used to select the transmit and receive mode operations. All these functionalities require a large number of control signals to set the state of the attenuator, the phase shifter and the TX or RX mode. Typically these states are set through a dozen or more separate controls and it is unfeasible to deliver them in parallel way (i.e. one interface pad for each control signal provided to the CC). A work-around for this problem consists in sending the control signal serially, and performing de-serialization on board. Such function requires circuits as Flip-Flop, latches, buffers and level shifters. Such circuits have a purely digital function, and are synthesized, as stated before, enhancement and depletion mode transistor, which are in Silicon based technology—having unfortunately a severe RF power and frequency limitation- and also GaAs that on the contrary is very suitable for high frequency RF signal conditioning.
Core chips come in, at least, two architectural variants. In the first, referred to separated architecture , the RF signal travels bi-directionally in the phase shifter and attenuator as depicted in Figure 23a. In the common-leg architecture, Figure 23b, the signal travels always in the same direction in both transmit and receive modes. More switches are required, at least three as opposed to the single T/R switch in separated architecture, to implements the correct routing of the single in Transmit and receive mode. Architecture (a) has the advantage of being more simple and compact, while architecture (b), although more complex, has the advantage of having amplifiers in the common leg (being mono-directional) therefore improving noise figure, gain and linearity performance.
Finally, let us focus on the role of the Serial-to-Parallel converter (S2PC). At least 13 lines (commands) are necessary to set the state of the 6-BIT phase shifter (ΔΦ), 6-BIT Attenuator (ΔA) and SPDT switch for T/R mode setting. If the S2PC were not on board then 13 lines would have to be fed to the CC. With the insertion of the S2PC only one serial data line is necessary together with a clock line and an Enable command. Therefore only three command lines, plus a digital voltage supply line, as opposed to 13 or more. The S2PC is the very dense area depicted in Figure 24.
UWB microwave circuits play a vital role in modern electronic systems for Aerospace, defence and Security applications. They are inserted to appropriately transfer the RF signal to/from the radiating element and perform some preliminary signal processing: phase and amplitude control, frequency conversion, and measurement of some fundamental signal characteristic.
Topologies and technologies need to be carefully leveraged in order to obtain the best possible performance. While in the past the trend was to design one circuit to implement one functionality applying the divide-et-impera (divide-and-conquer) paradigm nowadays we are looking at all-in-one highly integrated solutions. Of course this integration comes to the expanse of much higher circuit synthesis and analysis complexity.
Patrick E. Longhi would like to thank friends and colleagues at Elettronica Group in Rome (ITA) for the many fruitful and insightful technical discussions during his time spent in the company as a Microwave Engineer.