FPGA-Based Motion Control IC for Linear Motor Drive X-Y Table Using Adaptive Fuzzy Control

© 2012 Kung et al., licensee InTech. This is an open access chapter distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/3.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. FPGA-Based Motion Control IC for Linear Motor Drive X-Y Table Using Adaptive Fuzzy Control


Introduction
The development of a compact and high performance motion controller for the X-Y table of a CNC machine has been an important field in literatures (Groove, 1996;Goto et al., 1996;Hanafi et al., 2003).The typical architecture of the conventional motion control system for X-Y table is shown in Fig. 1, which consists of a central controller, two sets of servo drivers and an X-Y table.The central controller, which usually adopts a float-pointed processor, performs the function of motion trajectory and data communication with servo drivers and with external device.Each servo driver usually use a fixed-pointed processor, some specific ICs and an inverter to perform the functions of position/speed/current control at each single axis of X-Y table and to do the data communication with the central controller.Data communication between two devices uses an analog signal, a bus signal or a serial asynchronous signal.However, the motion control system in Fig. 1 has some drawbacks, such as large volume, easy effect by the noise, expensive cost, inflexible, etc.In addition, data communication and handshake protocol between the central controller and servo drivers slow down the system executing speed.
In recent years, the FPGA has been widely applied in implementing the digital control system (Cho, 2009;Monmasson et al. 2011;Sanchez-Solano et al. 2007).Besides, an embedded processor IP and an application IP can be developed and downloaded into FPGA to construct a SoPC environment (Altera, 2004;Hall and Hamblem, 2004), allowing the users to design a SoPC module by mixing hardware and software in one FPGA chip (Kung et al. 2004;Kung and Tsai, 2007;Kung and Chen, 2008).Therefore, based on the FPGA technology, we improve the aforementioned drawbacks and integrate the central controller and the controller part of two servo drivers in Fig. 1 into a motion control IC in this study, which is shown in Fig. 2. Our proposed motion control IC has two IPs (Intellectual Properties).One IP performs the functions of the motion trajectory by software.The other IP performs the functions of two axes' position/speed/current controllers by hardware.As the results, this two IP will parallel processing in FPGA, and the hardware/software co-design technology in FPGA can make the motion controller of X-Y more compact, flexible, better performance and less cost.Further, the X-Y table usually leads to the existence of unmodelled dynamics and disturbances which often significantly deteriorate the system performance during a machining process.Many studies attempt to improve the tracking performance in a machining process (Lin et al., 2006;Wang and Lee, 1999).Lin et al. (2006) adopts a recurrent-neural-network sliding-mode controller to improve the motion tracking performance of the X-Y table.Wang and Lee (1999) integrate the cross-coupled control and neural network techniques to achieve a high accuracy of the motion tracking in the linear motor X-Y table.However, due to the complicate computation of the neural-network, the algorithms of above two studies are realized in the PC-based control system.In this chapter, a motion control IC for linear motor drive X-Y table based on FPGA (Field programmable gate array) technology is presented and shown in Fig. 3. Firstly, the mathematical model of the X-Y table is defined.Secondly, an adaptive fuzzy controller (AFC) is introduced and adopted in position loop of X-Y table to improve the motion tracking performance under unmodelled uncertainty condition.Thirdly, in implementation, an FPGA embedded by a Nios II processor is used to design the overall circuits of the motion control IC which the scheme of position/speed/current control for two PMLSMs (permanent magnetic linear synchronous motors) is realized by hardware in FPGA and the motion trajectory algorithm for X-Y table is implemented by software using Nios II embedded processor.To reduce the FPGA resource usage, an FSM (Finite state machine) joined by a multiplier, an adder, a LUT (Look-up table), some comparators and registers is used to model the overall AFC algorithm.And VHDL (VHSIC hardware description language) is adopted to describe the FSM.Herein, Altera Stratix II EP2S60, which has 48,352 ALUTs (Adaptive Look-Up Tables), total 2,544,192 RAM bits, and a Nios II embedded processor which has a 32-bit configurable CPU core, 16 M byte Flash memory, 1 M byte SRAM and 16 M byte SDRAM, is used.Therefore, a fully digital motion controller can be implemented by an FPGA using hardware/software co-design technology which will make the motion controller of the X-Y table more compact, flexible and better performance.Finally, an experimental system is set up to verify the performance of the proposed motion control IC for linear motor drive X-Y table.

System description of X-Y table and motion controller design
The internal architecture of the proposed FPGA-based controller system for a linear motor drive X-Y table is shown in Fig. 3, in which the motion trajectory is implemented by software using Nios II embedded processor; the position, speed and current vector controller for two PMLSMs are implemented by hardware in FPGA chip.The mathematical modeling of PMLSM, AFC algorithm and motion trajectory planning are introduced as follows: Figure 3.The architecture of a motion controller system for linear motor drive X-Y table

Mathematical model of the PMLSM drive
The dynamic model of a typical PMLSM can be described in the synchronous rotating reference frame, as follows where vd, vq are the d and q axis voltages; id, iq, are the d and q axis currents, Rs is the phase winding resistance; Ld, Lq are the d and q axis inductance; p x  is the translator speed; f  is the permanent magnet flux linkage;  is the pole pitch.The developed electromagnetic thrust force is given by The current control of a PMLSM drive is based on a vector control approach.That is, if we control id to 0 in Fig. 3, the PMLSM will be decoupled, so that control a PMLSM will become easy as to control a DC linear motor.After simplification and considering the mechanical load, the model of a PMLSM can be written as the following equations, 3 2 and the mechanical dynamic equation of PMLSM in x-axis table is where e F , t K , m M , m B and L F represent the motor thrust force, the force constant, the total mass of the moving element, the viscous friction coefficient and the external force, respectively.In addition, the current loop of the PMLSM drive in Fig. 3 includes PI controller, coordinate transformations of Clark, Modified inverse Clark, Park, inverse Park, SVPWM (Space Vector Pulse Width Muldulation), pulse signal detection of the encoder etc.The coordination transformation of the PMLSM in Fig. 3 can be described in synchronous rotating reference frame.Figure 4 is the coordination system in rotating motor which includes stationary a-b-c frame, stationary - frame and synchronously rotating d-q frame.Further, the formulations among three coordination systems are presented as follows.
1. Clarke : stationary a-b-c frame to stationary - frame.
1 Park  : rotating d-q frame to stationary - frame.cos sin sin cos where e  is the electrical angle.
In Fig. 3, two digital PI controllers are presented in the current loop of PMLSM.For the example in d frame, the formulation is shown as follows.
* ( ) ( ) ( ) the d e is the error between current command and measured current.The _ k are P controller gain and I controller gain, respectively.The _ ( ) are the output of P controller only, I controller only and the PI controller, respectively.Similarity, the formulation of PI controller in q frame is the same.

Adaptive fuzzy controller (AFC) in position control loop
The green dash rectangular area in Fig. 3 presents the architecture of an AFC.It consists of a fuzzy controller, a reference model and a parameter adjusting mechanism.Detailed description of these is as follows.

Fuzzy controller (FC):
In Fig. 3, the tracking error and the change of the error, e, de are defined as the numbers for these linguistic values are selected as follows: : 6, 6, 4 , : 6, 4, 2 , : 4, 2,0 , : 2,0,2 , : 0,2,4 , : 2,4,6 , : 4,6,6 b. Compute the membership degree of the e and de. Figure 5 shows that the only two linguistic values are excited (resulting in a non-zero membership) in any input value, and the membership degree is obtained by : 3-axis stationary frame : 2-axis stationary frame : 2-axis rotating frame where 1 6 2*( 1) Similar results can be obtained in computing the membership degree ( ) j B de  .c. Select the initial fuzzy control rules, such as, where i and j = 0~6, Ai and Bj are fuzzy number, and cj,i is a real number.The graph of the fuzzy rule table and the fuzzification are shown in Fig. 5.
d. Construct the output of the fuzzy system uf(e,de) by using the singleton fuzzifier, product-inference rule, and central average defuzzifier method.Although there are total 49 fuzzy rules in Fig. 5 will be inferred, actually only 4 fuzzy rules can be effectively excited to generate a non-zero output.Therefore, if an error e is located between ei and ei+1, and an error change de is located between dej and dej+1, only four linguistic values Ai, Ai+1, Bj, Bj+1 and corresponding consequent values cj,i, cj+1,i, cj,i+1, cj+1,i+1 can be excited, and the output of the fuzzy system can be inferred by the following expression:

Reference model (RM):
Second order system is usually as the RM in the adaptive control system.Therefore, the transfer function of the RM in Fig. 3   for a step input response in ( 21) can be derived and shown as follows.
(1 ) 0.1 Once the tr is chosen, the natural frequency n  can be obtained.Furthermore, applying the bilinear transformation, ( 21) can be transformed to a discrete model by and the difference equation is written as.
Figure 5.The symmetrical triangular membership function of e and de, fuzzy rule table, fuzzy inference and fuzzification

Parameter adjusting mechanism:
The gradient descent method is used to derive the AFC control law in Fig. 3.The objective of the parameters adjustment in FC is to minimize the square error between the mover position and the output of the RM.The instantaneous cost function is defined by and the four defuzzifier parameters of cj,i, cj+1,i, cj,i+1, cj+1,i+1 are adjusted according to , , , is located between the and then with m = j, j+1 and n = i,i+1.

Motion trajectory planning of X-Y table
The circular, window and star motion trajectories are typical used as the performance evaluation of the motion controller for X-Y table.
a.In circular motion trajectory, it is computed by sin( ) os( ) with x , i y are angle increment, radius, X-axis trajectory command and Y-axis trajectory command, respectively.b.The window motion trajectory is shown in Fig. 6.The formulation is derived as follows: a-trajectory: b-trajectory: 1 6 ( : 2 , and ) 4 c-trajectory: d-trajectory: 1 6 ( : , and ) 4 cos( ), sin( ) e-trajectory: f-trajectory: 1 1 ( : , and g-trajectory: 1 1 , h-trajectory: 1 1 ( :0 , and cos( ), sin( ) i-trajectory: where S ,   , i x , i y are position increment, angle increment, X-axis trajectory command and Y-axis trajectory command, respectively.In addition, the 1 1 ( , ) ) x y O O , Where S , i x , i y are position increment, X-axis trajectory command and Y-axis trajectory command, respectively.The motion speed of the table is determined by S .

The design of a motion control IC for linear motor drive X-Y table
Figure 8 illustrates the internal architecture of the proposed FPGA-based motion control IC for linear motor drive X-Y table.The FPGA uses Altera Stratix II EP2S60, which has 48,352 ALUTs (Adaptive Look-Up Tables), 36 DSP blocks, 144 embedded multipliers, 718 maximum user I/O pins, total 2,544,192 RAM bits, and a Nios II embedded processor which has a 32-bit configurable CPU core, 16 M byte flash memory, 1 M byte SRAM and 16 M byte SDRAM.The Nios II processor can be downloaded into FPGA to construct a SoPC environment.The internal circuit in Fig. 8 comprises a Nios II embedded processor IP (Intellectual Properties) and an application IP.The Nios II processor is depicted to both generate the motion trajectory and collect the response data.The application IP includes the circuits of two position AFC and speed P controllers as well as two current vector controllers for X-axis and Y-axis table.The sampling frequency of position control loop is designed with 2kHz.The operating clock rate of the designed FPGA controller is 50MHz and the frequency divider generates 50 Mhz (Clk), 25 MHz (Clk-step), 2 kHz (Clk-sp) and 16 kHz (Clk-cur) clock to supply all module circuits of application IP in Fig. 8.
An FSM is also employed to model the AFC of the position loop and P controller of the speed loop in X-axis table and shown in Fig. 9, which uses one adder, one multiplier, a look-up table, comparators, registers, etc. and manipulates 35 steps machine to carry out the overall computation.With exception of the data type in reference model are 24-bits, others data type are designed with 12-bits length, 2's complement and Q11 format.Although the algorithm of AFC is highly complexity, the FSM can give a very adequate modeling and easily be described by VHDL.Furthermore, steps s0~s6 execute the computation of reference model output; steps s6~s9 are for the computation of mover velocity, position error and error change; steps s9~s12 execute the function of the fuzzification; s13 describe the look-up table and s14~s22 defuzzification; and steps s23~s34 execute the computation of velocity and current command output, and the tuning of fuzzy rule parameters.The SD is the section determination of e and de and the RS,1 represents the right shift function with one bit.The operation of each step in Fig. 9 can be completed within 40ns (25 MHz clock) in FPGA; therefore total 35 steps need a 1.4s operation time.It doesn't loss any control performance for the overall system because the operation time with 1.4s is much less than the sampling interval, 500 s (2 kHz), of the position control loop in Fig. 3.In Fig. 8, the QEP circuit and circuit for current vector control refer to (Kung & Tsai, 2007).Further, the Nios II embedded processor IP is depicted to perform the function of the motion trajectory and two-axis position/speed loop controller for X-Y table in software.Figure 10 illustrates the flow charts of the main program and the interrupt service routine (ISR), where the interrupt interval is designed with 2ms.All programs are coded in the C programming language.Then, through the complier and linker operation in the Nios II IDE (Integrated Development Environment), the execution code is produced and can be downloaded to the external Flash or SDRAM via JTAG interface.
Under the proposed design method, the overall resource usage of the proposed motion control IC is listed in s 20 s 21 s 23 s 24 s 28 s 19 s 22 s 25

Experimental results
The overall experimental system depicted in Fig. 3 includes an FPGA (Stratix II EP2S60F672C5) experimental board, two voltage source IGBT inverters and an X-Y table which is driven by two PMLSMs.The PMLSM was manufactured by the BALDOR electric company; and it is a single-axis stage with a cog-free linear motor and a stroke length with 600mm.The parameters of the motor are: Rs = 27  , Ld = Lq = 23.3mH, Kt = 79.9N/A.The input voltage, continuous current, peak current (10% duty) and continuous power of the PMLSM are 220V, 1.6A, 4.8A and 54W, respectively.The maximum speed and acceleration are 4m/s and 4 g but depend on external load.The moving mass is 2.5Kg, the maximum payload is 22.5Kg and the maximum thrust force is 73N under continuous operating conditions.A linear encoder with a resolution of 5m is mounted on the PMLSM as the position sensor, and the pole pitch is 30.5mm(about 6100 pulses).The inverter has three sets of IGBT power transistors.The collector-emitter voltage of the IGBT is rated 600V; the gateemitter voltage is rated 20V, and the DC collector current is rated 25A and in short time (1ms) is 50A.The photo-IC, Toshiba TLP250, is used in the gate driving circuit of IGBT.Input signals of the inverter are PWM signals from the FPGA device.
To confirm the effectiveness of the proposed AFC in linear drive X-Y table, a realization of position controller based on the FPGA in Fig. 3 is constructed and some experiments are evaluated.The control sampling frequency of the current, speed and position loops are designed as 16kHz, 2kHz and 2kHz, respectively.In the motion control IC, two position/speed/current controllers are all realized by hardware in FPGA, and the motion trajectory algorithm is implemented by software using the Nios II embedded processor.The speed controller adopts a P controller and the AFC is used in the position loop.The transfer function of the reference model is selected by a second order system with the natural frequency of 30 rad/s and damping ratio of 1.The step response is first tested to evaluate the performance of the proposed controller.Figures 11 and 12 respectively show the position step responses for X-axis and Y-axis table using the FC (learning rate=0) and AFC (learning rate=0.1).The position command is a 4/3Hz square wave signal with 10mm amplitude.In Figs. 11(a) and 12(a), when an 11 kg load is added upon the mover of the X-Y table and the fuzzy control by using a fixed rule table, the position dynamic response in X-axis and Y-axis table exhibits a 12.8% and 23.1% overshoot and severe oscillation, respectively.Accordingly, an AFC is adopted in Fig. 3.When the proposed AFC is used with learning rate being 0.1, the tracking results are highly improved and presented in Figs.11(c) and 12(c).Initially, the position response in X-axis or Y-axis table tracks the output of the reference model with oscillation.After one or two square wave commands, the ci,j parameters in fuzzy rule table are tuned to adequate values, and the position response in X-axis or Y-axis table can closely follow the output of the reference model.Further, the tracking motion about circular, window and star trajectory by using FC and AFC are experimented.To evaluate the tracking performance, the indices are firstly defined as follows.
Where T(k), m and  respectively represent instantaneous value, mean and variance of tracking error.In the circular tracking motion, the circle command is with center (25, 25) cm and radius 10cm and its experimental results are shown in Figs.13~14.In the window tracking motion, the trajectory is designed as Fig. 6 and its experimental results are shown in Figs.15~16.In the star tracking motion, the trajectory is designed as Fig. 7 and its experimental results are shown in Figs.17~18.Further, the tracking performance in Figs 13~18 by using FC and AFC control algorithm are evaluated according to the indices of (44)~( 46), and its results are listed in Table 2. Compared with FC, the mean of tracking errors

Conclusion
This study successfully presents a motion control IC for linear motor drive X-Y table based on FPGA technology.The works herein are summarized as follows.
1.The functionalities required to build a fully digital motion controller of linear motor drive X-Y table, such as the two current vector controllers, two speed P controllers, and two position AFCs and one motion trajectory planning, have been integrated in one FPGA chip.2.An FSM joined by one multiplier, one adder, one LUT, or some comparators and registers has been employed to model the overall AFC algorithm, such that it not only is easily implemented by VHDL but also the resources usage can be reduced in the FPGA.3. The software/hardware co-design technology under SoPC environment has been successfully applied to the motion controller of linear motor drive X-Y table.
However, the experimental results by step response as well as the circular, window and star motion trajectory tracking, has been revealed that the software/hardware co-design technology with the parallel processing well in the motion control system of linear motor drive X-Y table.

Figure 1 .
Figure 1.Conventional motion control system for X-Y table

Figure 2 .
Figure 2. Proposed FPGA-based motion control system for X-Y table

Figure 4 .
Figure 4. Transformation between stationary axes and rotating axes de and uf are input and output variables of FC, respectively.Besides m  represents m x or m y , and p  represents p x or p y .The design procedure of the FC is as follows: a.Take the e and de as the input variables of the FC, and define their linguist variables as E and dE.The linguist value of E and dE are {A0, A1, A2, A3, A4, A5, A6} and {B0, B1, B2, B3, B4, B5, B6}, respectively.Each linguist value of E and dE is based on the symmetrical triangular membership function which is shown in Fig.5.The symmetrical triangular membership function are determined uniquely by three real numbers 1 2 3 e)*B 1 (de) d41 =A 4 (e)*B 1 (de) =(1-A 3 (e))*B 1 (de) d32 =A 3 (e)*B 2 (de)=A 3 (e)*(1-B 1 (de)) d42 = A 4 (e)*B 2 (de)=(1-A 3 (e))*(1-B 1 (de)) j, j+1, n = i,i+1 and where  represents learning rate.However, following the similar derivation with(Kung & Tsai, 2007), the , of b-, d-, f-, and h-trajectory in the Fig. 6 and r is the radius.The motion speed of the table is determined by   .

Figure 6 .
Figure 6.Window motion trajectory c.Star motion trajectory is shown in Fig.7.The formulation is derived as follows: a-trajectory :

Figure 10 .
Figure 10.Flow chart of the main and ISR program in Nios II embedded processor 2

Figure 11 .Figure 12 .
Figure 11.(a) Position step response and (b) current response by using the FC as well as (c) position step response and (d) current response by using the AFC in X-axis table

Figure 17 .
Figure 17.Star trajectory response by using the FC (a) Star trajectory tracking (b) Position tracking in X-and Y-axis table (c) Control efforts in X-and Y-axis table (d) Tracking errors in X-and Y-axis table

Table 1 .
Table 1 which the two AFC circuits need 16,110 ALUTs, the Nios II embedded processor IP needs 8,275 ALUTs and 46,848 RAM bits and the application IP needs 22,928 ALUTs and 595,968 RAM bits in FPGA.Therefore, the motion control IC uses 64.5% ALUTs resource and 25.2% RAM resource of Stratix II EP2S60.The resource usage of a motion control IC in FPGA The internal architecture of a motion control IC for linear motor drive X-Y table Figure 9. State diagram of an FSM for describing the AFC in position loop and P controller in speed loop (for X-axis Table) in circular, winddow and star motion trajectory are significantly reduced about 41.6%, 14.6% and 12.8% and the variance of tracking errors reduced about 33.3%, 64.6% and 47.4% after using AFC.Therefore, it shows that the AFC has a better tracking performance than FC in motion control of linear motor drive X-Y table.Finally, from the experimental results of Figs.11~18, it demonstrates that the proposed AFC and the FPGA-based motion control IC used for the linear motor drive X-Y table is effective and correct.

Table 2 .
Evaluation of tracking performance using FC and AFC