Integration of Electrografted Layers for the Metallization of Deep Through Silicon Vias

After many years as a hypothetical possibility, 3D integrated circuits (3D IC) stacking has emerged as a potential key enabler for maintaining semiconductor performance trends. Implementing 3D, however, will almost certainly require development of through-silicon vias (TSVs), which in the past few years have been elevated by the semiconductor industry to the status of a crucial mainstream technology.


Electrografting (eG) and chemical grafting (cG) mechanisms
Electrografting is based on surface chemistry formulations and processes.It is applied to conductive and semiconductive surfaces, and enables self-oriented growth of thin coatings of various materials, initiated by in-situ chemical reactions between specific precursor molecules and the surface.Contrary to electrodeposition which requires a potential supply throughout deposition to fuel the redox processes, electrografting is an electro-initiated process which requires a charged electrode only for the grafting step, but not for the thickening.As eG is mainly (but not only) a cathodic process, it can generally be applied to various metallic and semiconducting surfaces without any concern over oxide formation.
Electrografting of vinylic polymers onto conducting surfaces has historically been achieved via a direct electron transfer from the cathode to the electro-active monomers in solution.In this approach, eG occurs when vinylic monomers such as acrylonitrile (AN), methacrylonitrile (MAN), vinylpyridine (VP), and methyl methacrylate (MMA), all members of the family of electron-deficient alkenes, are submitted to reductive electrolysis, with a classical three-electrode setup in an anhydrous organic medium (Deniau et al., 1992a).Strictly anhydrous conditions are required here because the resulting radical-anion, together with the anions that allow the propagation of the growing grafted polymer chains, are highly sensitive to proton sources.Radical polymerization does not suffer the same drawback and is easily performed in protic conditions (Deniau et al., 2006).Mechanisms of radical polymerization (Tessier et al., 2009) presented in fig. 1 show that polymer electrografting is an electro-induced grafting process followed by a purely chemical propagation step.The first electro-induced step is crucial to form the chemical bond between the polymer and the surface.A specific organic precursor (B) is used both to form a first primer grafted layer and to initiate the polymerization of the vinyl monomer (A) in solution.The termination step of the polymerization leads to the grafting of macromolecular chains (-[A-A-A] n -B) onto the first primer grafted layer.
Chemical grafting is based on the same fundamental mechanisms as electrografting, and is used on any surface (including non-conductive surfaces), electron being replaced by a reducing agent (Mevellec et al., 2007).

Benefits of electrografting (eG)
Electrodeposition has been known for years for coating conducting surfaces with metals.
Electroplating (Kanani, 2005;Schlesinger & Paunovic, 2010) is currently the most widely used method for coating surfaces in many industries (automotive, petrochemical, aerospace) including printed circuit boards, vias and copper interconnections for electronics.
Starting in the 80's with the electrochemical reduction of acrylonitrile on a metallic cathode (Lecayon et al., 1982), electrografting is a relatively new technique, with two major differences compared to electrodeposition: (I) eG being an electro-initiated process, i.e. a process in which Faradaïc electrochemical reactions are coupled to a range of non-Faradaïc chemical reactions, current densities applied for thickening are lower than the current densities required by electrodeposition techniques; and (II) the initial charge transfer to the first monomers leads to the formation of a direct covalent bond between some surface atoms and carbon atoms of the polymeric backbone.
Lower current densities applied are a benefit of electrografting technology when applied to resistive underlaying layers, coatings being more uniform and less sensitive to the ohmic drop involved by underlaying layer resistivity (Gonzalez et al., 2006;Mevellec, 2010).
Direct covalent bonds achieved between coatings and surfaces involve highly adherent electrografted films, via very strong substrate-molecules links, studied by quantum chemistry simulations (Bureau et al., 1996).Experimental evidence of those covalent bonds is not an easy task, and has been demonstrated by XPS analysis technique.As reported in (Deniau et al., 1992b), XPS measurements on very thin eG films exhibit a low-energy shoulder in the C1s signal.This peak cannot be observed for thicker films because it is buried under the strong C1s signals arising from the grafted polymer itself.The corresponding binding energy (283.6 eV) was later attributed to the carbon-nickel bond that links the polymer chain to the Ni electrode (Bureau et al., 1994).

Complete metallization of high aspect ratio (HAR) TSVs using electrografting
Aspect ratio is defined by the ratio between the diameter of the via and its depth, and a ratio greater than 10:1 defines the HAR TSVs category.Producing these vertical connections is achieved by: drill a blind hole through the silicon wafer, deposit a uniform liner layer of dielectric material to electrically isolate the via, deposit a barrier layer to prevent copper from diffusing into silicon, and then completely fill the via with electro-chemically deposited (ECD) copper.Chemical mechanical polishing (CMP) and wafer-thinning steps conclude the sequence.

Comparison between dry and wet TSVs metallization scheme
While the process flow to metallize TSVs is relatively simple, the industry's conventional approach to bringing it into volume production is, in essence, a patchwork of dry process equipment and consumables, such as plasma-enhanced CVD (PE-CVD), ionized PVD (iPVD), and ALD, which were originally designed for dual-damascene applications.One of the main benefits of electrografting is its large reduction in cost of ownership per wafer with respect to conventional dry approaches (Lerner, 2008;Truzzi & Lerner, 2009).
Comparison between dry and wet TSVs metallization scheme is presented in fig. 2. Two schemes are available for electrografting : (1) the deposition of the full stack "wet isolation/ NiB barrier/ Cu seed layer", followed by Cu filling using typical acidic Cu fill chemistry; (2) the deposition of "wet isolation / NiB barrier" followed by Cu filling using a new TSVgrade Cu fill chemistry.Path (2) is preferred because it requires only three steps (instead of four), which involves less cost and higher throughpout.

Description of electrografting path 1 for TSVs metallization
A polymer layer is directly grafted onto the silicon surface, yielding a highly conformal and adherent coating.This first grafted layer acts as an insulating layer (fig.3a) as well as an adhesion promoter for the subsequent barrier layer deposition, performed by chemical grafting (cG).
Chemical grafting is based on the same fundamental mechanisms as electrografting, and is used on non-conductive surfaces.Specific chemical groups have been chosen to strongly bond the barrier activator with the polymer.This improves adhesion between the barrier and the polymer through a chemical grafting step -it creates a chain of chemical bonds from the substrate to the barrier.The barrier film (fig.3b) consists of a NiB alloy.Activation of the electrografted insulating layer is carried out at ambient temperature using a metallic catalyst.Both NiB barrier and Cu seed layer can also be deposited on top of dry dielectrics, as for example SiO 2 , SiC, SiOC or SiN.SEM cross-sections of barrier and Cu seed deposited on top of SiO 2 are reported in fig. 4.
The electrografted copper seed is also directly applicable to various dry-deposited diffusion barriers, without any adhesion promoter in between (Ledain et al., 2008;Raynal et al., 2009).Electrografted and chemical grafted layers, activated from the surface, are not sensitive to its topography, and fit perfectly well with the highly scalloped TSVs sidewalls induced by Bosch etching process (fig.6).Wet TSVs metallization process is scalable up to 12inch wafers, as illustrated in fig.7 with three 12inch wafers stopped at different steps of the metallization process.

Description of electrografting path 2 for TSVs metallization
Wet insulator and NiB barrier deposition remains exatly the same as in path 1. step coverage of dry-process barriers and seed layers (< 10%), sheet resistance values at the bottom of the via are very high, making it difficult to initiate the filling process.
Via filling completion directly from the barrier requires barrier layers with low resistivity values, and copper plating chemistries with low sensitivity to ohmic drop.NiB barrier has been selected because of its barrier properties (see section 2.2.2.), and because Ni-based barrier films present much lower resistivity values than conventional dry barriers (fig.8).Indeed, NiB chemical grafting barrier formulations have been optimized to reduce the resistivity value below 25µΩ.cm; this value makes it possible to eliminate Cu seed layers, and sets the stage for direct fill of TSVs from the barrier layer, further simplifying the TSV process sequence.Today, a new mildly basic TSV plating chemistry is available to fill the vias (Truzzi, 2010) based on the same nanotechnology concept described in this paper.This TSV-grade chemistry is not sensitive to the sheet resistance of the underlying layer, and can be applied over R s values up to 50 Ω/sq.It is fully compatible with industry standard wet-process tools and, in contrast with ECD solutions, it does not attack or degrade the underlying layer.Some examples of copper filling in various TSV dimensions, achieved directly from the NiB barrier, are presented in fig.9.The new TSV-grade Cu fill chemistry has been used in all cases.Fig. 9a shows an example of copper filling achieved in different TSV dimensions at the same time, which demonstrates the wide process window of this new TSV-grade chemistry regarding vias size.

Properties of electrografted wet insulator layer, NiB barrier layer, Cu seed layer and new TSV-grade Cu fill chemistry
Film thickness can be controlled to any value from 40 to 400 nm with maximum nonuniformity of 5% within wafer (300mm).This provides a step coverage value (bottom/top thickness ratio) up to 90% for liner and metal layers.As a reference, typical dry-process barrier step coverage values are lower than 10% for 10:1 aspect ratio TSVs.Adhesion of all layers was measured using a 16-squares scribe tape test method: all layers successfully passed the test.Film properties of each layer, as well as reliability test results, are discussed in detail in (Truzzi et al., 2009;Raynal et al., 2010)

Properties of wet insulator
Electrical properties of wet insulator have been characterized using conventional mercury probe analysis tool.CTE (coefficient of thermal expansion) of the wet insulator is measured using an ellipsometer linked to a heater.As presented in fig.12, a CTE of 30ppm/°C is measured for wet insulator, 30ppm/°C being the mean value obtained on four different samples.On each sample, CTE was measured after one cycle of sample warm and cool.
Wet insulator being a polymer, T g value can be deducted from CTE curves (Fryer et al., 2001).Indeed, wet insulator thickness evolution vs. temperature being linear from 50°C to 200°C, this means that no microstructural reorganization is observed in this range of temperatures, and T g value of the wet insulator is higher than 200°C.
Reduced modulus has been measured using nanoindentation analysis technique, with a maximum force applied of 5000 nN and a maximum indenting depth of 35 nm.Typical curve of force vs. penetration depth is presented in fig.13a, Young modulus characterization being achieved during the loading of the indentor inside the wet insulator.Young modulus measurement of 4.05 GPa is the mean value of 15 measurements (fig.13b).Thermo-Gravimetry Analysis (TGA) has been performed to check the stability of the wet insulator under thermal stress.Experimental conditions are the following: anneal is achieved under nitrogen atmosphere, for a duration of one hour at each selected temperature.Range of analysis is 300°C -500°C, with a step of 50°C between each experiment.Fig. 14 shows that less than 1% of mass loss is measured after 350°C applied during one hour to the wet insulator, and less than 4% after 450°C applied during one hour.Porosity of the barrier has been checked using a method based on the chemical attack of SiO 2 by Hydrofluoridric Acid (HF) solutions.The stack PE-CVD SiO 2 / NiB barrier (200nm / 50nm) has been deposited on top of a Silicon substrate, the whole stack being dipped into HF 1% during 5 minutes.After this chemical treatment, if some porosity is present into the NiB barrier, than HF is going to diffuse in it, and attack the underlaying layer SiO 2 .Fig. 16 demonstrates that no attack of the underlaying layer SiO 2 is observed after dipping in HF, and therefore NiB barrier is not porous.

Properties of Cu seed layer
A bath containing specific organics and copper is employed to deposit a Cu seed layer on NiB barrier by means of the same electrografting technique.The electrografted copper seed is also directly applicable to various dry-deposited diffusion barriers, without any adhesion promoter in between.Table 2 summarizes the dry diffusion barriers that have been successfully tested with the eG Cu seed layer technology.No instance of incompatibility between a diffusion barrier and eG Cu seed has been reported so far.An example of electrografted copper seed deposited in 5µm x 50µm (AR 10:1) TSVs coated with CVD TiN is presented in fig.17.
Step coverage (step coverage is defined by the ratio between thickness deposited on top vs. bottom of the vias) of eG copper seed deposited inside those TSVs is close to 90%.
Copper grain size of eG copper seed deposited on top of dry barriers had been previously characterized in (Raynal et al., 2009).These measurements were re-visited in the case of eG copper seed deposited on top of cG barrier, with similar results obtained by XRD, EBSD and self anneal rate.One example of EBSD measurement is shown in fig.18.Several studies of PVD copper microstructure have been performed in the past, especially when PVD Cu is deposited on top of PVD Ta.In this case, a strong (111) texture of the copper is reported in the literature, linked to the heteroepitaxial growth of Cu on (002) orientation of Ta.This heteroepitaxial relationship is observed between Cu and Ta, but not with TiN barriers (Wong et al., 1998).
Copper microstructure has been compared between PVD copper deposited on top of TiN barrier and eG copper seed deposited on top of NiB barrier.In both cases, weak (111) orientation of the copper layer is measured.
A summary of eG copper resistivity evolution vs. layer thickness is presented in fig 19.The trend reported in fig.19 is similar to PVD copper layers (Barnat & Lu, 2001), copper resistivity below 100nm thick being impacted by grain boundary and surface scattering.

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Thermal treatments need to be done to decrease copper layer resistivity and to reach the value of 1.8µΩ.cmfor layers thicker than 100nm.This phenomenon is related to grain size growth during annealing, which can be observed by XRD or EBSD analysis techniques.
Successful Cu gap fillings have been demonstrated, starting from eG copper seed, in a wide range of TSV dimensions.Those results have been achieved with conventional acidic plating chemistries.SEM cross-sections presented in fig.20 show some examples of void-free gap fillings, starting from eG copper layers with a step coverage between 60% and 90%, in the case of both 20µm x 75µm and 50µm x 100µm TSVs.

Properties of the new TSV-grade Cu fill chemistry
This new TSV-grade chemistry is dedicated to the copper filling of TSV structures.It is less aggressive than conventional acidic chemistries, involving no degradation of the underlying layer, and less sensitive to the ohmic drop, which allows to fill directly on top of the NiB barrier.Its formulation is simpler, which involves a better process control, and a lower contamination of the copper deposited.
Contamination in the copper bulk has been compared by TOF-SIMS depth profiles, between this new TSV-grade chemistry (New fill) and a conventional acidic plating chemistry for TSV applications (Baseline).TOF-SIMS depth profiles are presented in fig.21, x axis being representative of sample depth and y axis being proportional to compound quantity.Fig. 21 shows an order-of-magnitude reduction in carbon contamination and a two orders-ofmagnitude reduction in chlorine contamination for the new TSV-grade copper fill compared to conventional plating chemistries.Those trends remain similar before and after copper anneal to 250°C under forming gas.
Copper grain size has been compared between new TSV-grade and conventional plating chemistries for copper 1µm thick (fig.22), using EBSD analysis technique.Grain size is higher in the case of new TSV-grade chemistry, and more uniform compared to conventional acidic plating.Stress observed by EBSD in grain boundary mode (fig.22e & 22f) is lower with the new TSV-grade Cu fill (stress being proportional to red lines density).
Cristalline orientation is also extracted from EBSD analysis.As observed in fig.23, copper deposited with the new fill chemistry is more (111) oriented than baseline chemistry.

Thermo-mechanical considerations of the stack
As reported in table 1, Young modulus (elasticity module) of the wet insulator is measured below 5GPa, which is much lower than the value obtained with SiO 2 (107 GPa, see table 1).This low value of Young modulus represents an obvious advantage in the use of electrografted layers, related to the mechanical properties of the metallized via.Indeed, thermally-induced stress in bulk silicon is proportional to the square of TSV radius and elasticity module (Lu et al., 2010).Silicon stress is reduced by 30x (97%) when used with the wet insulator.This comes on top of the via size reduction induced by smaller radius, as enabled by electrografting (see 2.4 section).

Reliability tests
Specific test vehicles, with typical TSV design rules, were used to assess the reliability of an integrated stack of electrografting and chemical grafting layers filled with the new TSVgrade Cu fill chemistry.Those tests included temperature cycling (1000 cycles from -55°C to 125°C), moisture sensitivity levels, high-temperature storage, thermal shock, and solder heat resistance (Truzzi, 2010).All samples passed the reliability tests.Fig. 24 shows a SEM crosssection and top view of filled structures after 1000 thermal cycles.Table 3 presents an overview of thermal cycles performed with various stacks.
Additionally, electrografting layers have been integrated into test vehicles and exposed to autoclave (AC) and high-temperature storage (HTS) reliability testing.The autoclave test was conducted for 96 hours at 121°C, 100% relative humidity and 2 bar absolute pressure.Hightemperature storage was performed for 20 hours at 205°C.Both tests showed positive results with no significant difference in film performance before and after the tests (Reed et al., 2010).

Design considerations
For a given TSV depth, this nanotechnology approach allows to manufacture smaller vias, thereby unlocking the possibility to design small, fine-pitch TSVs for demanding via-middle applications such as memory-on-logic for mobile computing.From the signal integrity a b  standpoint, as shown in (Truzzi & Lerner, 2009), HAR TSVs with a diameter ranging from 1 to 5µm and a depth ranging from 25 to 100 µm show smaller self-capacitance and less crosstalk than larger TSVs with similar depth (Weerasekera, 2008).Fig. 25 shows how one single large TSV exhibits a worse transmission behavior than nine small properly positioned TSVs, with ground vias correctly shielding signal lines.As for the impact of TSVs on Si real estate, the area needed for vias decreases exponentially with decreasing diameter (fig.26).In order to illustrate this point, we can consider the assumptions listed in table 4.

Bath analysis and manufacturing
The electrografting nanotechnology described in t h i s p a p e r i s r e a d y t o b e u s e d i n a production environment.The electrochemical baths are highly stable, shelf life of all the chemistries being more than 3 months.
After preparation of the chemical baths, monitoring and replenishment of the solutions can be easily carried out using conventional analytical methods, such as pH measurement or UVvisible spectrophotometry.Table 5 summarizes analytical methods available for each bath.Table 5. Analytical methods required for each wet process TSV bath.

Conclusion
Electrografting nanotechnology has been optimized for highly conformal growth of TSV films.Complete metallization of high aspect ratio vias is available with this technique, from insulation (by electrografted wet insulator) to copper gap filling using a new TSV-grade Cu fill chemistry.
This technology is fully compatible with standard semiconductor plating tools, enabling a large reduction in cost-of-ownership per wafer compared to dry process approaches (Lerner, 2008), while also providing stable and well-monitored chemical baths.
Film properties meet or exceed current TSV requirements, and chemical formulations are production-ready.TSVs manufactured using electrografting can be very narrow and have aspect ratios up to 20:1, thus broadening the 3D-IC design space and offering a process solution that can be extended for at least several generations into the future.

Acknowledgment
The author would like to thank Alchimer S.A. technical team.
eG and cG are trademarks of Alchimer S.A.

Fig. 3 .
Fig. 3. SEM cross sections of wet insulator (I), NiB barrier (II) and Cu seed layer (III) electrografted on top of silicon surface.A bath containing specific organics and copper is used to deposit a Cu seed layer (fig.3c) on the NiB barrier by means of the same electrografting technique.An electrochemical process is applied to provide a conformal and continuous Cu seed layer directly on the NiB barrier.
Fig. 4. SEM cross sections of NiB barrier (II) and Cu seed layer (III) electrografted on top of SiO 2 (I) surface.

Fig. 6 .
Fig. 6.SEM cross sections of wet insulator (I), NiB barrier (II) and Cu seed layer (III) on top of scalloped silicon surface.

Filling
narrow, deep vias without voids is not an easy task.Most commercialy available chemistries encounter problems due to the sheet resistance (R s ) of the underlying layer, and this is the reason why Cu-seed layers are required.However, because of the extremely poor
Fig.10presents a typical C(V) curve recorded with the stack wet insulator / Si p-doped.Dielectric constant calculed from this curve is 3. Breakdown voltage, leakage current and capacitance density have been measured from I(V) curves performed with the same mercury probe analysis method.Thickness of the wet insulator is measured by ellipsometry.Examples of typical n=f() and k=f() curves recorded with wet insulator are presented in fig.11.According to n=f() curve, refractory index is measured in the range 1.7-1.8nm.

Fig. 13 .
Fig. 13.(a)Typical curve of force vs. penetration depth recorded by nanoindentation analysis of wet insulator; (b) values obtained on 15 measurements.

Fig. 16 .
Fig. 16.Demonstration of the non porosity of NiB barrier by dipping the stack SiO 2 / NiB in HF 1%; (a) before HF dip and (b) after HF dip.

Fig. 24 .
Fig. 24.5µm x 25µm TSVs coated with wet insulator and NiB barrier, filled with the new TSV-grade Cu fill, and exposed to 1000 thermal cycles from -55°C to 125°C: (a) SEM crosssection and (b) SEM top view after copper polishing.

Fig. 26
Fig.26shows an exponential dependency of Si cost on via diameter for constant depth value: savings grow exponentially with increasing aspect ratio.In other words, a technology enabling a 3X improvement in aspect ratio allows a 8X increase in the number of TSVs per given area.

Fig. 26 .
Fig. 26.Si area penalty for TSVs as a function of aspect-ratio, keeping a constant depth value of 50µm.

Fig. 27
Fig.27presents the characterization of the eG copper seed solution during a marathon performed with 900 8inch wafers, using a replenishment of 1ml/h.Process performance (adhesion, copper resistivity, step coverage in TSVs, uniformity within wafer …) remained stable during the entire marathon.

Table 1 .
. Selected basic film properties are summarized in table 1. Selected film properties of electrografted wet isolation, NiB barrier, Cu seed layer and new TSV-grade Cu fill, compared with industry baseline.

Table 2 .
Compatibility of dry diffusion barriers with electrografting technology.

Table 3 .
Overview of thermal cycles performed with various stacks.

Table 4 .
Si area penalty model.