Development of Energy Efﬁciency Aware Applications Using Commercial Low Power Embedded Systems

for switch-on and switch-off voltage, further power efﬁciency can be obtained by ﬁrst switching


Introduction
In recent years, different devices that encapsulate different types of embedded system processors (ESPs) are becoming increasingly commonplace in everyday life. The number of machines built around embedded systems (ESs) that are now being used in households and industry is growing rapidly every year. Accordingly, the amount of energy required for their operation is also increasing. The United States (U.S.) Energy Information Administration (EIA) estimates that the share of residential electricity used by appliances and electronics in U.S. homes has nearly doubled over the last three decades. In 2005, this accounted for an increase of around 31% in the overall household energy consumption or 3.4 exajoule (EJ) of energy across the entire country(USEIA, 2011).
Portable devices built around different ESs are often supplied using different primary or secondary batteries. According to (FreedoniaGroup, 2011), the battery market in 2012 in the U.S. alone will exceed $16.4 billion and will be over $50 billion worldwide (Munsey, 2011). Based on the previous year's consumption data analysis (e.g., (Munsey, 2011)), a significant percentage of batteries will be used by different communication, computer, medical and other devices containing ES chips. Therefore, improvement in the energy efficiency of ESs, which would also result in reduction of energy consumption of the services provided, becomes one of the most critical problems today, both for the research community and the industry. The problem of energy efficiency of ESs has recently become the focus of governmental research programs such as the European FP7 and ARTEMIS and CISE/ENG in the U.S., etc. Resolution of this problem would have additional value due to recent CO 2 reduction initiatives, as the increase in energy efficiency for the upcoming systems would allow reduction of the energy consumption and corresponding CO 2 emissions arising during energy production (Earth, 2011).
The problem of ES energy efficiency can be divided into two major components: • the development of an ES chip that would consume the minimum amount of energy during its operation and during its manufacturing;

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www.intechopen.com • the development of applications based on existing ES chips, so that the minimum amount of energy would be consumed during fulfilment of the specified tasks.
The first part of the problem is currently under intensive investigation by the leading ESP manufacturers and research laboratories, which are bringing more energy efficient ESPs to the market every year. The development of a novel ESP is quite a complicated task and requires special skills and knowledge in various disciplines, special equipment and substantial resources.
Unlike the development of the energy efficient ESP itself, the development of energy efficient applications that use existing commercial ESPs is quite a common task faced by today's engineers and researchers. An efficient solution to this problem requires knowledge of ESP parameters and how they influence power consumption, as well as knowing how the power consumption affects the device's efficiency with different power supply options. This chapter will answer these questions and provide the readers with references that describe the most widespread ES power supply options and their features, the effect of the different ES parameters on the overall device power consumption and the existing methods for increasing energy efficiency. Although the main focus of this chapter will be on low-power ESs -and low-power microcontrollers in particular -we will also provide some hints concerning the energy efficient use of other ESs.
Most of the general-purpose ES-based devices in use today have a structure similar to that shown in Fig. 1. Therefore, all of the components of these devices can be attributed to three major groups: 1) the power supply system, which provides the required power for device operation, 2) the ES with the compulsory peripherals that execute the application program and 3) the application specific peripherals that are used by the ES. As the number of the possible application specific peripherals is extremely large at present, we will not consider these in this chapter and will focus mainly on the basic parameters of the ES, the ES compulsory peripherals and the power system parameters. To provide a comprehensive approach for the stated problem, the remainder of this chapter is organized as follows. Section 2 reviews the details of possible power supply options that can be used for the ESs. Section 3 describes the effect of the different ES parameters and features on its power consumption. Section 4 shows how the parameters and features discussed in Sections 2 and 3 could be used to increase the energy efficiency of a real ES-based device. Finally, Section 5 gives a short summary and discusses some of the existing research problems.

Embedded system power supply options
Three possible options are presently available for providing ESs with the required energy for operation: • mains; • primary or secondary batteries; • energy from environment harvesting system.
Each of these options has specific features that are described in more detail in Subsections 2.1-2.3.

Embedded systems power supply from mains
The power supply of the ESP from mains is the most universal method and is applicable for the devices that utilize low-power microcontrollers and high-end Application-Specific Instruction-Set Processors (ASIPs) or Field-Programmable Gate Arrays (FPGAs). The utilization of mains for ES power supply is usually capable of providing the attached ES with any required amount of energy, thereby reducing the importance of energy efficiency for these applications. Nevertheless, the energy efficiency increase for mains supplied devices allows reduction of their exploitation costs and can produce a positive environmental impact.
One of the major considerations while using mains for ES power supply is the necessity of converting the Alternating Current (AC) into the required Direct Current (DC) supply voltage for the given ESP (for examples, see Table 3). This conversion causes some energy losses that depend on the parameters of the AC/DC converter used and usually account for about 5-10% of the overall energy for high loads and high power, and increase dramatically for lower loads (Jang & Jovanovic, 2010). The typical curves for conversion efficiency dependance on the output current for the low power and high-power AC/DC converters available on the market are presented on Fig. 2. This Figure also shows the conversion efficiency curves for the low-power DC/DC converter with adjustable output voltage (V out ).
The data in Fig. 2 allow prediction that the use of extremely low-power modes for mains-supplied devices will not often result in any significant reduction in overall device energy consumption due to the low AC/DC conversion efficiency at low loads.

Embedded system power supply from primary and secondary batteries
The non-rechargeable (primary) and rechargeable (secondary) batteries are often used as power supply sources for various portable devices utilizing ESs. Unlike the mains, batteries are capable of providing the attached ESs only with a limited amount of energy, which depends as well on the battery characteristics and the attached ES operation mode. This fact makes the problem of energy efficiency for battery supplied ESs very real, as higher energy efficiency allows extension of the period of time during which the device is able to fulfil its function; i.e.,  Table 1.
As Table 1 reveals, the nominal DC voltages provided by the batteries depend on the battery chemistry and are in the range of 1.2 to 12 Volts. Therefore, as can be noted from Table 3, for the battery-supplied ESs, voltage conversion is often not required, although this can allow extension of the overall operation time in some cases (see Section 4).
As can be seen in Table 1 and Fig. 3, compared to primary batteries, secondary batteries usually (Crompton, 2000;Linden & Reddy, 2002): • have lower overall capacity; • have better performance on discharges at higher current drains; • have better performance on discharges at lower temperatures; • have flatter discharge profiles; • have much lower charge retention and shelf life.
Therefore, based on the presented data, the conclusion can be drawn that the use of the primary batteries is most convenient for those applications with low-power consumption, where a long service life is required, or in the applications with low duty cycles. Secondary batteries should be used in applications where they will operate as the energy storage buffer that is charged by the main energy source and will provide the energy when the main energy source is not available. Secondary batteries can also be convenient for applications where the battery can be recharged after use to provide higher overall cost efficiency.
According to recent battery market analyses (FreedoniaGroup, 2011;INOBAT, 2009;Munsey, 2011), the most widely used batteries today are alkaline, lithium and zinc-air primary batteries and lead-acid, rechargeable lithium-ion and nickel-metal hydride secondary batteries.
Alkaline primary batteries are currently the most widely used primary battery type (FreedoniaGroup, 2011;Linden & Reddy, 2002;Munsey, 2011). These batteries are capable of providing good performance at rather high current drains and low temperatures, have long shelf lives and are readily available at moderate cost per unit (Linden & Reddy, 2002). The average voltage supplied by an alkaline battery over its lifetime is usually around 1.3 V, which requires some ESPs to use two alkaline batteries as a power supply.
Lithium primary batteries have the advantage of a high specific energy (the amount of energy per unit mass), as well as the ability to operate over a very wide temperature range. They also have a long shelf life and are often manufactured in button or coin form. The voltage supplied by these batteries is usually around 3 Volts, which allows powering of the attached ES-based device with a single lithium battery. The cost is usually higher for lithium than for alkaline batteries.
Zinc-air primary batteries have very high specific energy, which determines their use in battery-sized critical applications with low current consumption, such as hearing aids. The main disadvantages of zinc-air batteries are their sensitivity to environmental factors and their short lifetime once exposed to air.
Although lead-acid batteries currently represent a significant part of the secondary battery market, most of these are used as the automobile Starting, Lighting and Ignition (SLI) batteries, industrial storage batteries or backup power supplies. Lead-acid batteries have very low cost but also have relatively low specific energy compared to other secondary batteries.
The rechargeable lithium-ion batteries have high specific energy as well as long cycle and shelf lifetimes, and unlike the other batteries, have high efficiency even at high loads (see Fig. 3). These features make lithium-ion batteries very popular for powering portable consumer electronic devices such as laptop computers, cell phones and camcorders. The disadvantage of the rechargeable lithium-ion batteries is their higher cost compared to lead-acid or nickel-metal hydride batteries.
Nickel-metal hydride secondary batteries are often used when common AA or AAA primary batteries are replaced with rechargeable ones. Although nickel-metal hydride batteries have a lower fully-charged voltage (1.4 V comparing to, e.g., 1.6-1.8 V for primary alkaline batteries), they have a flatter discharge curve (see Fig. 3), which allows them to generate around 1.2 V constant voltage for most of the discharge cycle. The nickel-metal hydride batteries have average specific energy, but also have lower charge retention compared to lithium and lead-acid batteries.
As revealed in Fig. 3, temperature is one parameter that influences the amount of energy obtainable from the battery. Two other critical parameters that define the amount of energy available from the battery are the battery load and duty cycle. The charts in Fig. 4 show the discharge curves for different loads and energy consumption profiles for the real-life common Commercially-available Off-The-Shelf (COTS) alkaline AAA batteries with nominal capacity of 1000 mAh. Note that the amount of the energy available from the battery decreases with the increase in load and that for a 680 Ohm load (2.2 mA @ 1.5 Volts), the alkaline AAA battery can provide over 1.95 Watt hours (Wh) of energy, whereas a 330 Ohm load (4.5 mA @ 1.5 Volts) from the same battery would get less than 1.75 Wh. At higher loads, as Fig. 3 reveals, the amount of available energy will decrease even at a higher rate. For batteries under intermittent discharge, the longer relaxation period between load connection (OFF time on Fig. 4), as noted in Fig. 4, also allows an increase in the amount of energy obtainable from the battery.
Regardless of the energy harvesting method used, the energy should be initially harvested from the environment, converted to electric energy and buffered within a special storage system, which will later supply it to the attached ES. Usually, the amount of the energy that can be collected from the environment at any period of time is rather small (see Table 2). Therefore, the accumulation of energy over relatively long period of time is often required before the attached ES would be able to start operating. In real-life implementations (see Fig. 5(a)), thin film capacitors or super-capacitors are usually used for collected energy storage. Although supporting multiple charge/discharge cycles, these capacitors have very limited capacity and self-discharge rapidly (Mikhaylov & Tervonen, 2010b;Valenzuela, 2008). Energy storage over a long period of time is not possible without harvested energy being available. The devices that are supplied with energy harvested from the environment can therefore suffer from frequent restarts due to energy unavailability and they must have very energy-efficient applications with low duty cycles and the appropriate mechanisms for recovery after energy exhaustion (Mikhaylov & Tervonen, 2011).
The parameters of the energy storage system used in energy scavenging devices have much in common with the secondary batteries discussed in Section 2.2. Thus, like the secondary batteries, the amount of energy obtainable from a harvested energy storage capacitor will decrease with increasing load (see Fig. 5(b)) (Mikhaylov & Tervonen, 2010b).

Contemporary embedded systems
The market today offers a broad choice of commercial ESs, each having different purposes and characteristics. Table 3 provides a brief summary of the main parameters and required power supplied for the four main types of commercial ESPs.
Microcontrollers are the most commonly used ESPs (Emitt, 2008). Contemporary microcontrollers usually have an architecture based on a lightweight Central Processing Unit (CPU) with sequential command execution. The existing microcontrollers often have on chip all of the peripherals required for operation, such as volatile (e.g., Random Access Memory RAM) and non-volatile (e.g., Read Only Memory -ROM) memories, controllers for the digital communication interfaces (e.g., I2C, SPI, UART), analogue-to-digital converters (ADC), timers and clock generators. The microcontrollers have rather low cost, size and power consumption, which defines their wide usage in the wide range of the simple single task applications. The latest microcontroller generations, such as Texas Instruments (TI) MSP430L092 low-voltage microcontrollers, are capable of working using as low as 0.9 V power supply. Some of the  Table 3. Typical parameters of the contemporary embedded system's processors 4 Contemporary microprocessors usually do not include any compulsory peripherals, thus implementing a standalone general purpose CPU. These microprocessors usually work at higher clock frequencies than the microcontrollers and are often used for different multi-task applications. The power consumption and the cost are usually higher for the processors than for the microcontrollers. The microprocessors nowadays can have multiple cores for implementing parallel data processing.
The Application-Specific Instruction-Set Processors (ASIPs) are the specially designed processors aimed for specific tasks such as Digital Signal Processors (DSPs), which are intended for efficient digital signal processing implementation, or Network Processors that can optimize packet processing during the communication within a network. Today, ASIPs are mostly used in applications that implement one specific task that requires significant processing capabilities, such as audio/video or communication processing.
The Field-Programmable Gate Arrays (FPGAs) contain reconfigurable logic elements (LEs) with interconnections that can be changed to implement the required functionality. This allows the use of FPGAs for implementing efficient high-speed parallel data processing, which is often required for high-speed video and signal processing. The contemporary FPGAs are often capable of using reconfigurable LEs to implement the software processors (e.g., MicroBlaze for Xilinx or NIOS II for Altera). The power consumption of FPGAs depends on the number of actually used LEs, the maximum number of which can vary from several thousands and up to 8 million.
In Section 3.2, the different parameters that influence the power consumption of ESs and the mechanisms underlying their effects are discussed.

Parameters influencing the power consumption for contemporary embedded system's processors
The energy consumed by a device at a given period of time (the power) is one of the parameters that defines the energy efficiency of every electrical device. In this subsection, we will focus the different parameters that influence the power consumption of ESs. For the sake of simplicity, we will assume that the ESs are supplied by an ideal source of power, which can be controlled by the ES.
The most widely used technology for implementing the different digital circuits today is the Complementary Metal-Oxide-Semiconductor (CMOS) technology Hwang, 2006). The power consumption for a device built according to CMOS can be approximated using Equation 1 SiLabs, 2003;Starzyk & He, 2007).
In this equation, the first term represents the switching or dynamic capacitive power consumption due to charging of the CMOS circuit capacitive load through P-type Metal-Oxide-Semiconductor (PMOS) transistors, to make a voltage transition from the low to the high voltage level. The switching power depends on the average number of power consuming transitions made by the device over one clock period α 0→1 , the CMOS device load capacitance C, the supply voltage level V and the clock frequency f . The second term represents the short circuit power consumed due to the appearance of the direct short current I peak from the supply voltage to the ground, while PMOS and N-type Metal-Oxide-Semiconductor (NMOS) transistors are switched on simultaneously for a very short period of time t sc during switching. The third term represents the static power consumed due to the leakage current I l and does not depend on the clock frequency.
Of the three components that influence the circuit power consumption, the dynamic capacitive power is usually the dominant one when the circuit is in operational mode (Starzyk & He, 2007). In practice, the power consumed by the short-circuit current is typically less than 10% of the total dynamic power and the leakage currents cause significant consumption only if the circuit spends most of the time in standby mode For a real-life ES-based device, apart from the power consumption of the ESP itself, which is described by Equation 1, the effect of other ESP compulsory peripherals (e.g., clock generator or used memory) need also to be considered.

Clock frequency
The clock frequency is one of the fundamental parameters for any synchronous circuit, including all of the CPU-based embedded systems (microcontrollers and microprocessors). The clock frequency is one of the parameters that -together with the processor architecture, command set and available peripherals used -would define the performance of the CPU.
Equation 1 reveals that the dynamic power consumed by the ESP for the particular supply voltage level should linearly increase with the increase of clock frequency. Note also that the most efficient strategy from the perspective of the consumed power per single operation, for the case when the third term in Equation 1 is above zero, would be to use, for any particular voltage, the maximum clock frequency supportable at that supply voltage level. The measurements for the real-life ESP presented in Fig. 6 confirm these statements (Dudacek & Vavricka, 2007;Mikhaylov & Tervonen, 2010b).   Cho & Chang, 2006). In Equation 2, V is the level of supply voltage, V th is the threshold voltage and k and a are constants for a given technology process, which should be determined experimentally.
As previously noted (e.g., (Mikhaylov & Tervonen, 2010b)), a hysteresis exists for real-life ESPs for switch-on and switch-off threshold voltages (e.g., the MSP430 microcontroller using nominal clock frequency of 1 MHz will start operating with a supply voltage above 1.5 V and will continue working until the supply voltage drops to below 1.38 V).
Other research (e.g., (Dighe et al., 2007)) show that, for CPU-based ESPs other than microcontrollers, the power-frequency dependencies are similar to those presented in Fig. 6.

Supply voltage
As already noted in Subsection 3.2.1, the maximum possible clock frequency for the CPUs depends on the available supply voltage level. A further analysis of Equation 1 reveals that the supply voltage has a strong effect on the power components of both the dynamic and static systems. The charts showing the effect of the supply voltage on the overall power consumed by the system and the required power per single clock instruction execution for a real-life device are presented in Fig. 7. Equation 1 allows prediction that the most power efficient of any particular clock frequency would be one obtained using the minimum possible supply voltage. Equation 1 also reveals that, from the point of view of power consumption per operation, the most efficient strategy would be to use the maximum clock frequency at the minimum possible supply voltage level. Taking into account the clock frequency hysteresis for switch-on and switch-off voltage, further power efficiency can be obtained by first switching the required clock frequency using a higher supply voltage level and later reducing the supply voltage up to a level slightly above the switch-off threshold (Mikhaylov & Tervonen, 2010b).
To summarize the effect of clock frequency and supply voltage for a real system, Fig. 8 presents the 3-D charts showing the overall consumed power and single-clock instruction power efficiency for the TI MSP430 microcontroller for different working modes. As expected, Fig. 8 reveals that the most efficient strategy from the perspective of power consumption per instruction would be to use the maximum supported clock frequency at a minimum possible supply voltage level. Similar results can be seen from other work (e.g., (Luo et al., 2003)) and multiple desktop processor tests could be also obtained for the other types of ESPs and even FPGAs (Thatte & Blaine, 2002). Nowadays, the dynamic tuning of the supply voltage level (dynamic voltage scaling) and clock frequency (dynamic frequency scaling) depending on the required system performance are the most widely used and the most effective techniques for improving ESP energy efficiency. Nonetheless, the practical implementation of voltage scaling has some pitfalls, the main one being that the efficiency of the DC/DC voltage converter, which will implement the voltage scaling, is usually on the order of 90-95% and will significantly decrease for the low load case, as also happens for the AC/DC converters discussed in 2.1.

CPU utilization
The CPU utilization, or time-loading factor, is the parameter that is often used for different general-purpose processors to measure their real time performance. The CPU utilization can be defined as the percentage of non-idle processing relative to the overall processing time (Laplante, 2004). Indeed, depending on the application, ESPs are required to fulfil a specified number of instructions at a specified period of time. After that, the ESP can switch to other tasks, execute no-ops, or move to a low-power mode (if it has the appropriate "waking-up" system).
Sections 3.2.1-3.2.2 have already shown that the most power efficient strategy for contemporary ESPs would be to use higher clock frequencies than to use lower clock frequencies at a particular supply voltage level and to use lower supply voltages, rather than higher ones. These statements indicate that, from the perspective of power efficiency, it would be optimal to have the CPU operating at a minimum possible supply voltage that would support the clock frequency, which would allow fulfilment of the required number of instructions within the specified period of time.
The problem of CPU utilization effects on processor power consumption has been described details e.g. in (Li et al., 2009;Uhrig & Ungerer, 2005), where appropriate real-life applications and measurements results are discussed.

Effect of the embedded system processor's compulsory peripherals on power consumption
The power consumption of a contemporary embedded system-based device is defined not only by the consumption of the actual ESP, but also by the cumulative power consumption of the all peripherals that are used by the application. Apart from the actual ESP, the end-device will typically include a clock generation system, RAM, ROM, different input/output interfaces and some other peripherals (see Fig.1). As shown in Section 3.1, certain ES types can have some of the peripherals already integrated with the CPU. The actual set of peripherals used will clearly be defined by each particular application requirement; therefore, the most critical ones will be discussed in a Sections 3.3.1-3.3.5. higher power consumption occurs with the generation of a high clock frequency than with lower clock frequencies. Further clock conversions in ESPs would cause additional power consumption. Therefore, as has been shown previously (e.g., (Schmid et al., 2010;SiLabs, 2003)), from the point of view of power consumption, using the external low-frequency clock crystal is often much more convenient than using a high-frequency internal crystal and later dividing the frequency.

Random access memory
RAM is the memory type that is usually used for storing temporary data with critical access latency. The advantage of the RAM is that the data stored in it can be accessed both for reading and writing as single bytes (or small data blocks for recent chips) having the fixed access time regardless of the accessed location (Chen, 2004). As previously noted (e.g., (Mikhaylov & Tervonen, 2010a;Ou et al., 2011)), the RAM is usually the most efficient memory type from the point of view of power consumption. The disadvantage of RAM is that it is usually a volatile type of memory, meaning that the stored information is lost once the power supply is removed. Nonetheless, as has been shown previously (e.g., (Halderman et al., 2008;Mikhaylov & Tervonen, 2011)), the information in RAM remains undamaged for some time (5-60 seconds, depending on the RAM type and its working mode). This can be used to reduce the overall system power consumption through periodic power on/off switching of RAM memory when it is not being used.
The power consumption of RAM, similarly to the power consumption of the other already discussed CMOS systems (see Section 3.2), is influenced by the level of the supply voltage and the clock frequency (Cho & Chang, 2004;Fan et al., 2003). Quite often, the levels of supply voltage and clock frequency that minimize the power consumption for the RAM differ from the ones minimizing the consumption of the CPU, which requires resolution of the joint optimization problem for combined system (Cho & Chang, 2004;Fan et al., 2003).

Read-only and electrically erasable programmable read-only memory
ROM memory is a type of memory that is used for permanent data storage. The data in ROM either cannot be modified at all (e.g., masked ROM), or requires significant effort and time for data changing (e.g., electrically erasable programmable read-only memory (EEPROM) or Flash ROM). The advantage of ROM is that it is a non-volatile type of memory and retains the stored data even if no power supplied. The common disadvantages of ROM compared to RAM are the higher data access time and power consumption (Chen, 2004;Mikhaylov & Tervonen, 2011;Ou et al., 2011). Another common feature of ROM and especially EEPROM, which is currently mostly often used in the ES, is that writing to the memory should be done by so-called pages; i.e., data blocks with the sizes in the range of 64 and 512 bytes depending on the memory chip architecture. Therefore, changing the data in EEPROM first requires erasing the entire page containing the data to be changed. After that, the new values for the bytes within the erased page can be written either byte-wise or in burst mode. Rather often, especially for the EEPROM integrated into microcontrollers, the cleaning and writing to EEPROM requires a higher supply voltage level than the one required for normal CPU operation. This complicated rewrite process causes the Flash memory to have very significant power consumption during data rewritings, which can be several orders of magnitude higher than while writing to RAM. The number of rewrite cycles for contemporary EEPROMs can reach 10.000 to 10.000.000, but it is by no means infinite. Although ROM is now often used for storing the executable application program codes for different ESPs, as shown previously (e.g., (Mikhaylov & Tervonen, 2010b)), the running of ESP programs stored in RAM allows a reduction of the overall power consumption by 5% to 10%.

Input/output interfaces
The input/output (I/O) interfaces are the essential ESP peripherals that allow ESPs to interact with the external world. Since the I/O interfaces are implemented using the same CMOS blocks as the rest of ESP, the conclusions made within Section 3.2 are also applicable for the I/O interfaces (Dake & Svensson, 1994). In addition to the actual power consumption of the I/O interfaces, the wire propagation effects, such as attenuation, distortion, noise and interferences, must also be considered. Therefore, the conclusion can be made that implementation of power efficient communication over a particular I/O interface should use the lowest possible level of the supply voltage together with highest data rate that allows provision of reliable communication with the required throughput.
Quite often, the developed ES-based application does not use all of the available ESP's digital pins. To reduce the overall system power consumption, these pins should be configured as outputs. Whether initialized as high or low, the output voltage will not subject the enabled digital input circuitry to a leakage-current-inducing voltage in the middle range (Peatman, 2008).

Other peripherals
Depending on the application, the ESPs can require a wide range of other peripherals. The two basic rules for power effective peripheral usage are: • the peripherals should be provided with the minimum level of supply voltage that allow their reliable operation; • the peripherals should be powered off when not in use.
As previously shown (e.g., (Curd, 2007)), the use of embedded blocks for special function implementing in FPGAs dramatically reduces the dynamic power consumption when compared to implementing these functions in general purpose FPGA logic. This is also valid for other types of ESPs.

Energy efficiency-aware low-power embedded systems utilization
The two previous sections discussed the different power supply options that can be used for existing ESs (Section 2) and the parameters influencing the power consumption for the standalone ES (Section 3). These discussions confirm that the real energy efficiency maximization for an ES-based application requires a joint consideration of the power supply system and the ES itself. The current section will show how ES parameters influence the power consumption of a real-life device supplied using different power supply sources. It will also discuss the efficiency of the methods that can be used to improve the system's overall power efficiency. Fig. 9 shows the power consumption for a low-power microcontroller-based device supplied from mains via an AC/DC converter, with ( Fig.9(a)) and without ( Fig. 9(b)) a voltage 422 Embedded Systems -Theory and Design Methodology www.intechopen.com scaling system. Comparing the results in Fig. 9 with the standalone microcontroller power consumption (see Fig. 8) shows that the situation changed dramatically. For the standalone microcontroller, the most efficient strategy from the point of system power consumption per instruction was to operate at the maximum clock frequency supported, using the minimum supply voltage level (see Section 3.2.2), while for the mains-supplied system, the most effective strategy is to use the minimum supply voltage level that supported the maximum possible clock frequency.A t first glance, these results seem contradictory, but they can be easily explained if the conversion efficiency curves for the real-life AC/DC and DC/DC converters, which are presented in Figs. 2 and 9(b), are also taken into account. As shown in Fig. 9(a), the use of voltage scaling for the low-power ES does not significantly increase the overall power efficiency due to the very low AC/DC conversion efficiency for the microcontroller low-power modes.

Energy efficiency for mains-supplied low-power embedded systems
Nonetheless, as Fig. 2 reveals, the efficiency of AC/DC and DC/DC converters under the higher loads increases to more than 90% and becomes consistent, which allows efficient use of the dynamic voltage and frequency scaling techniques for improving the power consumption of high-power ESPs supplied from mains (as shown previously by e.g., (Cho & Chang, 2006;Simunic et al., 2001)).

Energy efficiency for battery-supplied low power embedded systems
To illustrate the effect of the ESP parameters on a battery-supplied system, we investigated the operation of the same low-power microcontroller-based system discussed in Subsection 4.1, but now supplying power from two alkaline batteries. The charts summarizing the results are presented in Fig. 10 for AAA batteries and in Fig. 11 for AG3 button batteries. The presented charts has been built using the battery capacity models (Equation 3, with the parameters from Table 4), which are based on the real-life battery capacity measurements (see, e.g., Fig. 4). The presented charts illustrate the system efficiency (measured as the number of single clock instructions computed over the system lifetime) for the system built around a low-power ESP,

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Embedded System / Book 1 with (Figs. 10(a) and 11(a)) and without (Figs. 10(b) and 11(b)) the voltage scaling mechanism. For the sake of simplicity, in the used model, we assume that the ESP is working with 100% CPU utilization and that it switches off when the voltage acquired from the battery supply falls below the minimum supply voltage required to support the ESP operation at a defined clock frequency (see Section 3.2.1).
The charts for the battery-supplied ESP-and likewise for the standalone ESP-show that an optimal working mode exists that allows maximizing of the system efficiency within the used metrics. Figs. 10(b) and 11 (b) show that the number of operations executed by the battery-supplied ESP over its lifetime strongly depend on the clock frequency used; e.g., for AAA batteries for clock frequencies 2.5 times higher and lower than the optimal one, the number of possible operations decreases 2 times. Nonetheless, the optimal working mode for the system supplied from the battery is slightly different from the one for the standalone system. For the standalone system, as shown in Fig. 8, use of a 3 MHz clock frequency with 1.5 V supply voltage level was optimal, while for battery supplied system, use of a 4.4 MHz clock frequency with 1.8 V supply was optimal. The main reasons for this observation are: the lower efficiency of DC/DC conversion of the voltage controlling system for lower loads (see Fig. 2), and the different amounts of energy available from the battery for various loads (see Figs. 4, 10(b) and 11(b)).
As Figs. 10(a) and 11(a) reveal, the voltage scaling possibility allows an increase in the number of executable operations by the ESP by more than 2.5 times compared to the system without voltage control. The optimum working mode for the battery supplied ESP with the voltage control possibility appears to be the same as for the standalone system (3 MHz at 1.5 V supply) and differs from the battery supplied system without voltage conversion. Nonetheless, the use of voltage conversion circuits would have one significant drawback for the devices working at low duty cycle: the typical DC/DC voltage converter chips have a standby current on the order of dozens µA, while the standby current of contemporary microcontrollers in the low-power mode is below 1 µA. Therefore, the use of a voltage controlling system for a low duty cycle system can dramatically increase the sleep-mode power consumption, thereby reducing the overall system lifetime.
As can be noted comparing Figs. 10(b) and 11(b), the small sized AG3 alkaline batteries have a much lower capacity and lower performance while using higher load. These figures also reveal that the optimal clock frequency for both batteries is slightly different: the optimal clock frequency for an AAA battery appears to be slightly higher than for the button style.
Threshold,V AAA battery AG3 button battery  In the current section, we have focused on the Alkaline batteries, as they are most commonly used today. It has been shown, that for the batteries of the same chemistry but different form-factor the ESPs optimal parameters are slightly different. For the batteries that use other chemistries, as suggested by the data in Fig. 3, the optimal energy work mode parameters will differ significantly (see e.g., (Raskovic & Giessel, 2009)). The system lifetime for the other types of ESPs supplied from batteries would follow the same general trends. Fig. 12 illustrates the effects of the ESP parameters on the operation of the system supplied using an energy harvesting system. The charts show results of practical measurements for a real system utilizing the MSP430F2274 microcontroller board and a light-energy harvesting system using a thin-film rechargeable EnerChips energy storage system (Texas, 2010 Fig. 12. Energy efficiency for a MSP430-based system supplied from an energy harvesting system with a thin-film rechargeable EnerChips storage system presented charts illustrate the system operation for the cases when the storage system has been initially fully charged ( Fig. 12(a)) and when the storage system had only minimum amount of energy 7 (Fig. 12(b)). During the measurements, the system was located indoors under the light with intensity of around 275 Lux. For evaluating the energy efficiency for the system supplied using energy harvested from the environment, we have used the same metrics as described for the battery supplied system; namely, the number of single clock instructions which the ESP is able to execute until energy storage system is discharged.

Energy efficiency for low-power embedded systems supplied by energy harvesting
Figs. 12(a) and 12(b) reveal that the optimal work mode parameters for the ESP for an energy harvesting supplied system are different for various energy storage system initial states. Fig.  12(a) shows that a well-defined clock frequency exists for the fully charged storage system, which allows the execution of the maximum number of instructions to be achieved. For a system with minimum storage system initial charge, the optimum clock frequency that will maximize the number of ESP operations is shifted to higher clock frequencies.
Due to the already discussed high standby current for the DC/DC converters, the use of the voltage control circuits within the system supplied by energy harvesting appeared to be ineffective. Table 2 shows that the amount of energy that the small sized energy harvesting systems can collect from environment is rather small. This means that energy scavenging applications using high-power or high-duty cycle ESPs will need to have rather volumetric supply systems. Therefore, this power supply options is now mostly often used with low-power ESPs in Wireless Sensor Networks (WSN), toys and consumer electronics applications.

Conclusions and further research
In this chapter, we have discussed the different aspects of the energy efficient operation of the commercial low-power embedded systems. The possible supply sources that can be used in ES-based applications, the ES parameters that influence the energy consumption and the mechanisms underlying their effect have been discussed in detail. Finally, real-life examples were used to show that real energy efficiency for ES-based applications is possible only when the characteristics of the used supply system and the embedded system itself are considered as a whole. The results presented in the chapter have been obtained by the authors through multiple years of practical research and development experience within the field of low power embedded systems applications, and they could be valuable for both engineers and researchers working in this field.
The problem of energy efficiency is a versatile one, and many open questions still remain. For the energy efficiency optimization, one needs to have full information on the source of power characteristics, the characteristics of the embedded system itself and the user application requirements. This requires a standardized way to store this type of information and mechanisms that would allow identification of the source of power and peripherals attached to the embedded system and that would obtain the information required for operation optimization. Once all of the required information was available, this would advance the possibility of developing the algorithms needed to allow the embedded system to adapt its operation to the available resources and to the application requirements. The other open problem currently limiting the possibility of developing automated power optimization algorithms is that most of the currently existing embedded systems do not implement any mechanism for measuring their power consumption.