Implantable cardioverter defibrillators.

In recently years, Artificial Neural Networks have been studied extensively and applied in medical field, and have been demonstrated to have much better pattern recognition ability. In this chapter we present a VLSI chip to be implemented using 0.35 μm CMOS technology which is the implantable cardioverter defibrillator (ICDs). Implantable cardioverter defibrillator is a device which monitors the heart and delivers electrical shock therapy in the event of a life-threatening arrhythmia. At present most ICDs are often using time information from leads to classify rhythms. (Leong, P. H.W J The Sinus Tachycardia (ST) arrhythmia and the Ventricular Tachycardia (VT) arrhythmia. The ST is a safe arrhythmia occurs during vigorous exercises and is characterized with rate of 120beat/minute. The VT is a fatal arrhythmia with the same rate. They can be separated only by detecting the morphology changes in each one. (Acherya,U,R.,2004) Most morphology changes are appeared in the QRS-complex. The QRS-complex for both the ST and VT arrhythmia’s are shown in fig.1. (Dale Dublin, 2000) Since most morphology changes are appeared in the QRS-complex, for classifying the arrhythmias we must separate QRS complexes from ECG, consequently a new circuit for detecting QRS is designed. In this circuit the R-R distance between two QRS complexes and also the pulse width of QRS complex are used to improve the detection algorithm. By using fuzzy logic and some parameters of ECG (pulse width, R-R interval and peak) we can separate QRS complex from ECG and after that apply this part to a Neural Network for classification. The proposed analog VLSI chip can detect such morphology changes. It has the following advantages:  It is easily interfaced to the analog signals in an ICD (in contrast to the digital systems which require analog to digital conversion).  Analog circuits are generally small in area.  Low voltage circuits are used to decrease battery weight and size and to extend battery life time which required for portable and modern wireless equipment.  Hamming network did not need to have a training system and the reference vectors determine the weights.


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Although temperature variation is a major source of drift problems, no need for temperature compensation as the human body is considered a stable environment. This chapter deals with the design of Analog VLSI chip for implantable cardioverter defibrillator (ICDs). We first present the structure of system. Next, we describe each part separately and characteristic of each parts are described. Then, We show the circuits that are used for implementing of each part. Finally, we present the total block diagram of system with some simulations that verifies the functionality of system.

Architecture
The proposed chip consists of 3 main parts:  QRS detector circuit  Extracting QRS from an ECG circuit  Classifying QRS complex circuit First these parts will be explained separately and then the block diagram of the chip will be presented.

QRS detector circuit
The dominant component of the ECG is the QRS complex, which indicates the electrical depolarization of the muscles in the ventricle of the heart. Several clinical applications including implantable defibrillator require accurate QRS detection algorithms whiles The QRS is easily recognized by a human observer. Various types of automated algorithms were proposed in the literature for detecting QRS. (K. Akazawa and K.Motoda 2001;Pan.J & Tompkins W.J 1985;Y. Suzuki, 1995) These algorithms use multiple features of the EGG including RR internal, pulse duration and amplitude, to detect QRS complexes. By processing several features, it is less likely that large amplitude but short duration noise would be mistaken for a QRS. Similarly, it is more likely that a true QRS with low amplitude, but normal width and RR internal would be correctly detected.
Fuzzy inference systems are well-suited for this application ( fig.2), since detection in this system based on a few amounts of uncertainly which is very similar to the medical reasoning process.(O.Wieben, W.J Tompkins & V.X. Afonso 1999) Moreover the decision process is extremely easy to understand by human; consequently such easy interpretability allows external changes by experts on the decision process. In this work, we are using a fuzzy inference system to identify QRS complexes. In this system QRS complex will be detected provided that a square wave synchronizes with them, consequently we use a fuzzy controller to adjust this square wave with QRS complexes.R-R internal, pulse duration and amplitude are features that enter to a controller as inputs parameter. Fuzzy controller evaluates these features and adjusts the output pulse of VCO to be synchronized with QRS complexes. A feedback is used to correct the synchronization process. This feedback is produced by error between the output pulse of VCO and the pulse that show the width of QRS complex. This feedback is also enter to controller and processed by fuzzy controller. Finally, the output of fuzzy controller goes to VCO circuit and makes the output pulse of VCO to be synchronized with QRS complex ( fig.3).

Extracting QRS from an ECG circuit
To separate QRS complexes, we passed ECG signals and synchronize VCO trough an analog median filter. (fig.4). Median Filter passes the median part of the input signals which, in this case, is QRS complexes.

Classifying QRS complexes
The QRS complexes which were detected and separated from the rest of ECG signals are applied to an arrhythmia classifier. This classifier is used to distinguish between two types of arrhythmia: The Sinus Tachycardia (ST) arrhythmia and the Ventricular Tachycardia (VT) arrhythmia. The ST is a safe arrhythmia occurs during vigorous exercises and is characterized with rate of 120beat/minute. The VT is a fatal arrhythmia with the same rate. They can be separated only by detecting the morphology changes in each one. Since the most morphology changes are appeared in the QRS complex, we apply QRS complex to an arrhythmia classifier to classify it. This arrhythmia classifier consists of three building blocks: a sample and hold (S/H) circuit, a mapping circuit and a Hamming neural network classifier. Fig.5 represents a block diagram of the chip. First, the rhythm is inputted to a sample and hold circuit to obtain 10 samples of the input signal. These 10 samples are inputted to mapping circuits in parallel to map into unit length [-1 1]. The outputs of mapping circuits are input to Hamming Neural Network, which has two neurons in its output layer. Each neuron responds to a specified type of the input arrhythmia.

Hamming Neural Network
A Neural Network classifier is made of a Hamming network, which is a maximum likelihood classifier network that can be used to determine which of several exemplar vectors are the most similar to an input vector (Laurene Fausett,1994& M. B. Menhaj,2000. Fig.6 shows the simplest structure of a competitive layer.
i* is number of the cell that has the highest n i. for our application i=1, 2.
In the Hamming Network, reference vector determines the weights (w) of the network.The hamming distance between input vector (P) and reference vector is calculated by n vector (equation 3). (Laurene Fausett,1994& M. B. Menhaj, 2000 Winner cell is determined with multiplying input vector to weights. The largest value corresponds to the smallest angle between input and weights vector if they are both of unit length [-1 1] (Laurene Fausett,1994& M. B. Menhaj, 2000.

Circuit design
The designing method of blocks show in fig.5 is given below:

Sample and hold (S&H) circuit
The Sample and hold delay circuit is made of 10 cascaded stages to obtain 10 samples of the input pulse. Fig. 7 shows S/H circuit.  In Fig. 8, the input rhythm of ST is applied to the S/H circuit and output of 1 st stage is shown.

Mapping circuit
Before applying sampled data to Neural Network We have to map them into unit length [-1 1]. Figure 9 shows schematic of mapping circuit. www.intechopen.com

Cardiac Defibrillation -Prediction, Prevention and Management of Cardiovascular Arrhythmic Events
We use a simple differential pair in order to map input signal (sampled data) to unit length space [-1, 1]. By changing V ref and W/L ratio of input stage of differential pair, we can map any space to unit length space. (Wilamowski, B 1999)

Hamming Neural Network classifier
The Hamming Network consists of two groups of synapses and two layers of neurons. The first group with weight vector W 1 = (W 11 , W 12 , W 13 , …, W 115 ) is connected to first neuron layer. The second layer with weight vector W 2 = (W 21 , W 22 , W 23 , …, W 215 ) is connected to second neuron layer, each neuron in the output layer responds to a specified class of input arrhythmia. Figure 10 shows the structure of Network

Synapse
The computation of inner product between input signal and the local interconnection weight is called synapse and is mostly done by using an analog multiplier.(S. T. Lee;H. Shawkey 1999) We use a new low voltage low power four quadrant analog multiplier as a synapse. Since output of a synapse is current, output of 10 synapses can be summed at a single node of circuit. The circuit consists of four quadratic cells is shown in figure 11 where the relationship between the input current, I in , and the output current, I out , are quadratic. The quadratic cell is made of two transistors M n and M p which are biased to operate in triode region and M c which operates at saturation region.
respectively. Figure 12 shows the proposed four quadrant current multiplier circuit. The input currents of a multiplier are the sum of currents I X and I Y and the subtraction of the input currents I X and I Y . By using quadratic relationship between input and output currents which are derived from Equation (5) The output current of the four quadrant current multiplier I out is the difference between I O1 and I O2 and is given by  www.intechopen.com

Winner take all
The function of the WTA is to accept input signals, compare their values and produce a high digital output value (logic 'one') corresponding to the largest input, while all other digital outputs are set to low output value (

The current max selector
The 2-input current maximum selector is shown in Fig. 15. The proposed current max selector has 2 input branches and each branch consists of an FVF (R.G. Carvajal et al., 2005), which is formed by voltage follower M ai , and current sensing transistor M ci . Fig. 15. 2-input max circuit.

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Transistor M ai in an FVF performs as an improved voltage follower and the Gate-Source voltage drop of this transistor is constant (neglecting second-order effect) and independent of the load. Transistor M ci operates as a current sensing device. It can sink large current by keeping its Drain voltage approximately constant. Moreover, the existing impedance at the Source of transistor M ai is very low due to the feedback loop. The principle of operation of the circuit is as follow. The voltage at node "V S " follows the maximum of input currents I 1, I 2, with a DC level shift V GSn where n denotes the maximum current.
In this condition the transistor (M a1 or M a2 ) which carrying the minimum current, has the greater Gate-Source voltage than the value that should have to operate in saturation mode, at this condition this transistor operates in triode mode with Drain-Source voltage value close to zero, thus the current sensing transistor is turning off in this branch and minimum and maximum currents passed through current sensing transistor of winning branch due to properties of FVF cell.

The overall structure of WTA circuit
The circuit of the 2-input WTA is shown in Fig.16. The currents (I 1 , I2) are the inputs of the circuit. Each current is mirrored into current max Selector, as well as, into the feedback circuit due to PMOS current mirror M 12 , M 22 . Thus the input current of each voltage inverter is: Fig. 16. 2-input WTA circuit. www.intechopen.com We assume at the steady state, the current I 1 is the largest input current I 1 =max (I 1 , I 2 ) So From the Equation (13) This means that only one input current of the voltage inverter, which is correspond to minimum current, is positive and all the other currents are negative. Thus the digital voltage outputs of the circuit will be at logic o1 o2 'one'

The proposed arrhythmia classifier chip
The block diagram of proposed system is presented in fig.18. In this system, multiple features of ECG are measured by analog circuit. These features are applied to a fuzzy controller to be processed. The output of fuzzy controller goes to a VCO which is used to synchronize the output pulse of VCO with the specific part of ECG. Finally, the QRS complexes which are filtered by median filter are applied to arrhythmia classifier provided that the error of detection algorithm is below a normal value. Moreover, the arrhythmia classifier has 2 outputs that each one responds to a specific type of the input arrhythmia. Simulation result of the system in both cases is shown in figure 19 and 20. In fig.19 the inputting rhythm of ST is applied to system caused to digital outputs of OUT1 goes to "One" and OUT2 goes to" Zero". In fig.20 the inputting rhythm of VT is applied to system caused to digital outputs of OUT1 goes to "Zero" and OUT2 goes to "One".

Conclusion
In this chapter a VLSI Analog chip for arrhythmia classification is presented. The proposed Network has the following features:  No need for A/D converter between the ECG and the classification system.

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The system operates in the low frequency range, so that the parasitic of the layout likely have no effect on the operation of the chip.

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This system can be extended to distinguish m types of arrhythmias by using m number of neurons in the output layer of the Hamming Neural Network circuit. Millions of people throughout the world currently depend on appropriate, timely shocks from implantable cardioverter defibrillators (ICDs) to avoid sudden death due to cardiovascular malfunctions. Therefore, information regarding the use, applications, and clinical relevance of ICDs is imperative for expanding the body of knowledge used to prevent and manage fatal cardiovascular behavior. As such, the apt and timely research contained in this book will prove both relevant to current ICD usage and valuable in helping advance ICD technology. This book is divided into three comprehensive sections in order to cover several areas of ICD research. The first section introduces defibrillator technology, discusses determinants for successful defibrillation, and explores assessments of patients who receive defibrillation. The next section talks about predicting, preventing, and managing near catastrophic cardiovascular events, and research presented in the final section examine special cases in ICD patients and explore information that can be learned through clinical trial examinations of patients with defibrillators. Each chapter of this book will help answer critical questions about ICDs.