Integrating Micro-Photonic Systems and MOEMS into Standard Silicon CMOS Integrated Circuitry

Optoelectronics - Devices and Applications is the second part of an edited anthology on the multifaced areas of optoelectronics by a selected group of authors including promising novices to experts in the field. Photonics and optoelectronics are making an impact multiple times as the semiconductor revolution made on the quality of our life. In telecommunication, entertainment devices, computational techniques, clean energy harvesting, medical instrumentation, materials and device characterization and scores of other areas of R&D the science of optics and electronics get coupled by fine technology advances to make incredibly large strides. The technology of light has advanced to a stage where disciplines sans boundaries are finding it indispensable. New design concepts are fast emerging and being tested and applications developed in an unimaginable pace and speed. The wide spectrum of topics related to optoelectronics and photonics presented here is sure to make this collection of essays extremely useful to students and other stake holders in the field such as researchers and device designers.

chips. The optical communication bandwidth of these systems may not necessarily compete with that of Si-Ge technology, but it still could take a substantial market share when the benefits of an all silicon and CMOS compatible systems are considered. These benefits are, mainly, (1) lower complexity of the technology; (2) lower cost of fabrication; (3) ease of integration into the mainstream CMOS technology; and (4) higher system integration capabilities. The realization of micro-photonic systems on CMOS chips can lead to many new products and markets in the future. Achieving these goals can lead to low cost "all-silicon" optoelectronic based technologies and so-called "smarter" and more " intelligent" CMOS chips. Envisaged systems could range from CMOS based micro-systems, analyzing environmental or bio-logical substances to sensors on chips, which can detect vibration,, inertia and acceleration. Whole new products, aimed at the medical and biological market could be developed and sensor systems, which could measure colour, optical intensities, absorption, and distances (including metrology) . Such a new field could be appropriately nomenclated "Silicon CMOS Photonics".  Table 1 summarizes the current options for integrating photonic systems into CMOS technology with regard to optical source, waveguide, detector technology and complexity. The composition of the table is based on the presentation of results in the field at recent international conferences (SPIE Photonic West 2009. The analysis shows, that if efficiently enough waveguides could be developed in the wavelength regime of 750-850 nm, both optical sources and detectors could be completely compatible with CMOS technology. The waveguide technology at these wavelengths faces some major challenges, as very little research and development work has been done in this field. The operating wavelength would be about one half of that of 1550 nm, which is currently the wavelength for long haul communication systems. This wavelength could still very effectively link with the current wide bandwidth 850 nm local area network technology. In this chapter, research results are presented with regard to the following : (1) The optical compatibility of silicon CMOS structures.
(2) The current state of the art technology of optical sources at submicron wavelengths, that are compatible with mainstream CMOS technology.
(3) Development capabilities of waveguides in the 750 -850 nm wavelength regime utilising CMOS technology. (4) "Proof of concept" of optical communication systems that utilize "all silicon CMOS components ". (5) Finally, the development of CMOS based micro-photonic systems using CMOS technology in the 650 -850 nm wavelength regime.

Optical compatibility of CMOS technology
First, the capability of CMOS technology is evaluated to accommodate optical propagation in micro-photonic systems. An investigation of the CMOS structure, as in Fig. 1, (Fullin et al., 1993 ), shows that the field oxide, the inter-metallic oxide, and the silicon nitride (Si 3 N 4 ) passivation layer are all optical transparent and can serve as "optical propagation and/or optical coupling structures " in CMOS integrated circuitry. Fig. 1. Schematic diagram displaying a typical structure used in field oxide based CMOS integrated circuit technology. Layers that are optically transparent below 1 µm are shown in yellow, green and grey . Bright yellow: Native silicon dioxide; Yellow: intermetallic oxide; White: Passivation oxide ; Green: Silicon nitride.
Field oxide, used for electrical isolation between MOSFET transistors by older CMOS processes, is formed by oxidation of silicon. This results in a high quality "glassy" layer of superb optical transmission with a refractive index of 1.46. A drawback is that this layer is bonded at the bottom to a highly absorptive silicon substrate with a refractive index of 3.5 and a very high absorption coefficient for all optical radiation below 950 nm. It is anticipated to use this layer as medium to transport optical radiation vertically outward from Si Avalanche based Light Emitting Diodes (Si AvLEDs), which are situated at the siliconoverlayer interface . The specific structure associated with the field oxide, favours simple convex lensing for outward directed vertical optical radiation. Fig. 2 demonstrates the concept obtained by structural analysis and ray tracing. The inter-metallic oxide, positioned between metallic layers, are CVD plasma deposited and mainly used as electrical isolation between the metal layers. Literature surveys (Beals et al , 2008, Gorin et al, 2008 show that, even so, these layers are porous, they offer suitable propagation for the longer mid infra-red wavelengths, where structural defects, such as porosity, grain boundaries and side wall scattering due to roughness play a lesser role . The metallic layers bonding to the oxide inter-metallic oxide layers can be used as effective reflectors or optical confinement layers. The oxide which is deposited on top of the metal layers serves as a pre-passivation step prior to the final passivation by silicon nitride. This layer could be used for the propagation of mid infrared wavelengths. The silicon nitride layer possesses interesting optical properties. One main advantage is that the refractive index is higher than that of the surrounding plasma oxide layers. Depending on the composition and deposition technology, its refractive index can be varied between 1.9 Fig. 2. Optical propagation phenomenon at 750nm in CMOS over layers using simple ray tracing techniques. The layer color indexing is the same as in Fig.1. and 2.4. This layer, when surrounded by silicon oxide, is ideal for waveguiding optical radiation laterally in the CMOS structure. Since this layer, too, is created by the CVD process, is porous and has a rough surface. Therefore, it is anticipated to use this layer for the propagation of longer wavelengths. Fig. 3 demonstrates this concept. Optically transparent layers made of polymer or silicon oxi-nitride can be deposited on top of the CMOS layers with relative ease by means of suitable post processing procedures. Since these layers are deposited at low temperatures, they can be subjected to further procedures to generate sloped or lens like structures in the final outer layer CMOS structure. Recently, at the SPIE Photonic West Trade Show in San Francisco, it was reported that RF etching and other technologies exist to pattern such layers with up to 150 steps using appropriate software and process technology (Tessera, 2011). CMOS processes below 350 nm utilize a planarization process after the MOSFET transistor fabrication. They deposit up to six metal layers on top of these layers, where sloping of these layers is caused by the thicker outer metal layers (Foty, 2009, Sedra, 2004. However, this technology uses trench isolation for electrically isolating n-and p MOSFETS laterally in the CMOS structure. The trench-isolation technology opens up interesting optical properties. Trenches are spatially defined. This implies that light emitters can be fabricated in the CMOS structure at certain areas which are laterally bounded by isolation trenches or deep crevasses in the silicon. It hence follows that, if these trenches could be filled with an optical material of higher refractive index, optical radiation emitted from the silicon-overlayer interface, could then be coupled with high efficiency directly into adjacent optical channels. The current CMOS technology can create a thin oxidation layer that is used as isolation layer in the trench technology. If this layer can be enhanced and is followed by a layer of high refractive index material such as silicon nitride, interesting lateral optical conductors or waveguides can be constructed at the silicon-overlayer interface. Some of these concepts are illustrated in Fig. 4  Since certain optical sources can only be fabricated at the silicon-overlayer interface in the CMOS structure (such as Si-avalanche LED technology), coupling of optical radiation from the silicon-overlayer interface to the outer CMOS surface layers needs to be investigated. Analysis conducted has shown, that by applying special CMOS layer definition techniques and positioning these layers under 45 degree, structures can be generated which couple the optical radiation from the silicon substrate to the over layers. Fig. 3 illustrates this concept. Additional structures can be designed to ensure nearly 100 % coupling into the silicon nitride layer. Fig. 3. Optical propagation phenomenon at 750nm in CMOS over layers using simple ray tracing techniques. The layer color indexing is the same as in Fig.1. Waveguiding of radiation along the silicon nitride overlayer is demonstrated. Fig. 4. Components and structural layout of the latest CMOS processes utilising isolation trench based technology (Sedra, 2004).
This implies that photonic system structures can be generated in CMOS technology which incorporate so called " multi-planing", where optical radiation can be coupled from one plane to the next. Obviously, the concepts described here are still in its infancy, and further research is necessary. Both standard CMOS as well as Silicon-on-Insulator (SOI) technology are suitable to realise some of the concepts.

Viable optical sources for all-silicon CMOS technology
The availability of optical sources suitable for integration into CMOS technology is evaluated. A survey reveals that a number of light emitters have been developed since the nineties that can be integrated into mainstream silicon technology. They range from forward biased Si p-n LEDs which operate at 1100 nm (Green et al, 2001;Kramer et al 1993;Hirschman et al 1996); avalanche based Si LEDs which operate in the visible from 450 -650 nm (Brummer et al, 1993;Kramer et al 1993;Snyman et 1996Snyman et -2006; organic light emitting diodes (OLED) incorporated into CMOS structures which also emit in the visible (Vogel et al., 2007); to, strained layer Ge-on-ilicon structures radiating at 1560 nm (Lui, 2010). Fig. 6 illustrates the spectral radiance versus wavelength for a number of these light sources as found in various citations. Forward biased p-n junction LEDs and Ge-Si hetero-structure devices emit between 1100 and 1600 nm. This wavelength range lies beyond the band edge absorption of silicon, and all silicon detectors respond only weakly or not at all to this radiation. Hence, these technologies are not viable for the development of only silicon CMOS photonic systems. The Ge-Si heterostructure can be realized in Si-Ge CMOS processes, but increases complexity and costs. Organic based Light Emitting Diodes (OLED) utilize the sandwiching of organic layers between doped silicon semiconductor layers with high yields between 450 and 650 nm (Vogel et al , 2007). In spite, the incorporation of foreign organic materials through postprocesses this technology is a viable option. The photonic emission levels are quite high, up to 100 cd m -2 at 3.2 V and 100 mA cm -2 . The organic layers must be deposited and processed at low temperature. This technology is, therefore, particularly suited for post processing, and as optical sources in the outer layers of the CMOS structures. A major uncertainty with regard to this technology is the high speed modulation capability of these devices. Si avalanche light emitting devices in the 450 -650 nm regime have been known for a long time (Newman 1955;Ghynoweth et al, 1956)]. The fabrication of these devices is high temperature compatible and can be used in standard silicon designs. Viable CMOS compatible avalanche Si LEDs (Si CMOS Av LEDs) have emerged since the early 1990's. Kramer & Zeits (1993) were the first to propose the utilization of Si Av LEDs inside CMOS technology. They illustrated the potential of this technology. Snyman et al (1998 have realized a series of very practical light emitting devices in standard CMOS technology, such as micro displays and electro-optical interfaces, which displayed higher emission efficiencies as well as higher emission radiances (intensities). Particularly promising results have been obtained regarding efficiency and intensity, when a combination of current density confinement, surface layer engineering and injection of additional carriers of opposite charge density into the avalanching junction, were implemented (Snyman et al., 2006(Snyman et al., -2007. These devices showed three orders of increase in optical output as compared with previous similar work. However, increases in efficiency seemed to be compromised by higher total device currents; because of loss of injected carriers, which do not interact with avalanching carriers. Du Plessis and Aharoni have made valuable contributions by reducing the operating voltages associated with these devices (2000,2002).  , shows that, particularly, the longer wavelength emissions up to 750 nm can be achieved by focusing on the electron relaxation techniques in the purer n-side of the silicon p-n avalanching junctions. This development has a very important implication. The spectral radiance of this device compares extremely well with the spectral detectivity of the silicon reach through avalanche photo detector (RAPD) technology. A particular good match is obtained between the emission radiance spectrum of this device and the detectible spectrum of a RAPD (see Fig. 6).
( a ) ( b ) Fig. 7. Si avalanche-based light emitting device (Si Av LED) and electro-optical interfaces realized in 1.2 µm Si CMOS technology with standard CMOS design and processing procedures (Snyman, 1996).   8 represents some of the latest in house designs with regard to a so called "modified Efield and defect density controlled Si Av LED". Only a synopsis is presented here and more details can be found in recent publications (Snyman and Bellotti, 2010a ). The device consists of a p+-i-n-p+ structure with a very thin lowly doped layer between the p+ and the n layer. The purpose of this layer is to create a thin but elongated electric field region in the silicon that will ensure a number of diffusion multiplication lengths in the avalanche process. The excited electrons loose their energies mainly in the n-type material through various intraband and inter-band relaxation processes. If the p + n junction at the end of the structure is slightly forward biased and a large number of positive low energy holes is injected into the n-region, these holes can then interact with these high energy electrons . This enhances the recombination probability between high energetic electrons and low energy holes. The recombination process can be further enhanced by inserting a large number of surface states at the Si-SiO 2 interface in the n-region. This can cause a "momentum spread" in the nregion for both, the energetic electrons as well as the injected holes. Fig. 8 (c) presents the photonic transitions that are stimulated by this design. Excited energetic electrons from high u p i n t h e c o n d u c t i o n b a n d m a y r e l a x f r o m the second conduction band to the first conduction band. Energetic electrons excited by the ionization processes may interact and relax to defect states which are situated in the mid-bandgap level between the conduction band and the valence band. The maximum density distribution (electrons per energy levels) is around 1 to 1.8 eV (Snyman 2010a) , and relaxation to mid-bandgap defect states will c www.intechopen.com cause a spread of light emission energies from 0.1 eV to 2.3 eV , with maximum transition possibilities between 1.5 eV and 2.3 eV. By controlling the defect density in this device, one can favour either the 650 nm or 750 nm emissions. Total emission intensities of up to 1 µW per 5 µm 2 area at the Si-SiO 2 interface have recently been observed (Snyman and Bellotti, 2010a). Further improvement is currently underway in order to increase particularly the longer wavelength emissions associated with these structures. In summary, particularly promising about the application of Si Av LEDs into CMOS integrated systems, is the following :  Si Av LEDs can emit an estimated 1 µW inside silicon and at compatible CMOS operating voltages and currents (3-8 V, 0.1-1 mA) they can emit up to 10 nW / µm 2 at 450 -750 nm (Snyman and Bellotti, 2010a;Snyman 2010b;Snyman 2010c).  They can be realized with great ease by using standard CMOS design and processing procedures , vastly reducing the cost of such systems.  The emission levels of the Si CMOS Av LEDs are 10 +3 to 10 +4 times higher than the detectivity of silicon p-i-n detectors, and hence offer a good dynamic range in detection and analysis.  These types of devices can reach very high modulation speeds, greater than 10 GHz, because of the low capacitance reverse biased structures utilised (Chatterjee, 2004).  They can be incorporated in the silicon-CMOS overlayer interface, because they are high temperature processing compatible.  They can emit a substantial broadband in the mid infrared region (0.65 to 0.85 µm) . Particularly, p + n designs emit strongly around 0.75 µm (Kramer 1993, Snyman 2010a).

Development of CMOS optical waveguides at 750nm
The development of efficient waveguides at submicron wavelengths in CMOS technology faces major challenges, particularly due to alleged higher absorption and scattering effects at submicron wavelengths. A recent analysis shows that both, silicon nitride and Si oxi-nitride, transmitting radiation at low loss between 650 and 850 nm (Daldossa et al., 2004;Gorin et al., 2008). Both, Si O x N y and Si x N y possess high refractive indices of 1.6 -1.95 and 2.2 -2.4 respectively, against a background of available SiO 2 as cladding or background layers in CMOS silicon . Subsequently, a survey was conducted of the optical characteristics of current CVD plasma deposited silicon nitrides that can be easily integrated in CMOS circuitry. In Fig. 9, the absorption coefficients versus wavelength are given for three types of deposited silicon nitrides. The first curve corresponds to the normal high frequency deposition of silicon nitride used in CMOS fabrication. The results were published by Daldossa et al. , 2004. The second curve corresponds to a low frequency deposition process as recently developed by Gorin et al (2008). The third curve corresponds to a special low frequency process followed by a low temperature "defect curing" technique as developed by Gorin et al. This process offers superb low loss characteristics. These results are extremely promising , and calculations show that, with this technology , very low propagation losses of 0.5 dB cm -1 at around 750 nm can be achieved when combined with standard CMOS technology. This wavelength falls into the maximum detectivity range of state-of-the-art reach-through avalanche silicon photo detectors (Si-RAPDs). Optical simulations were performed with RSOFT (BeamPROP and FULL WAVE) to design and simulate specific CMOS based waveguide structures operating at 750 nm, using CMOS materials and processing parameters. First, simple lateral uniform structures were investigated with no vertical and lateral bends and with a core of refractive index ranging from n = 1.96 (oxi-nitride ) to n = 2.4 (nitride). The core was surrounded by silicon oxide (n = 1.46). The analysis showed that both, multimode as well as single mode waveguiding can be achieved in CMOS structures. Fig. 10 and Fig.11 illustrate some of the obtained results. Fig. 10 shows a three dimensional view of the electrical field along the 0.6 µm diameter silicon nitride waveguide. Multi-mode propagation with almost zero loss is demonstrated as a function of distance over a length of 20 µm. Multi-mode propagation in CMOS microsystems has the following advantages: (1) a large acceptance angle for coupling optical radiation into the waveguide; (2) exit of light at large solid angles at the end of the waveguide; (3) allowing narrow curvatures in the waveguides; and (4) more play in dimensioning of the waveguides. (1) and (2) are particularly favourable for coupling LED light into waveguides. Fig. 11 shows the simulation of a 1 µm diameter trench-based waveguide with an embedded core layer of 0.2 µm radius silicon nitride in a SiO 2 surrounding matrix. The two dimensional plot of the electrical field propagation along the waveguide as shown in Fig. 11 (a) reveals single mode propagation. The calculated loss curve in the adjacent figure (b), shows almost zero loss over a distance of 20 µm in Fig 11(b). Fig. 12(a) displays the transverse field in the waveguide perpendicular to the axis of propagation. Using the value of the real part of the propagation constant, as derived in the simulation, an accurate energy loss could be calculated using conventional optical propagation. With the imaginary part of the refractive index, as predicted by RSOFT, a low loss propagation of 0.65 dB cm -1 is found, taking the material properties into account, as used by the RSOFT simulation program. Single mode propagation, where the light is more difficult to couple into the waveguide, results in low modal dispersion loss along the waveguide, as well as in extreme high modulation bandwidths.
It is important to note that waveguide mode converters can be designed to convert multimode into single mode.
In Fig 12 (b) , the same simulation was performed as in Fig. 11, but with a silicon oxi-nitride core of 0.2 µm embedded in a silicon oxide cladding. The mode field plot shows a slight increase in the fundamental mode field diameter, and less loss of about 0.35 dB cm -1 . This suggests that a larger proportion of the optical radiation is propagating in the silicon oxide cladding. Subsequently, a modal dispersion analysis was conducted on these structures. The calculations reveal a maximum dispersion of 0.5 ps cm -1 and a bandwidth-length product of greater than 100 GHz-cm for a 0.2 µm silicon nitride based core. A maximum modal dispersion of 0.2 ps cm -1 and a bandwidth-length product of greater than 200 GHz-cm was found for a 0.2 µm silicon-oxi-nitride core which was embedded in a 1 µm diameter siliconoxide cladding. Due to the lower refractive index difference between the core and the cladding, a larger transverse electric field of about 0.5 µm radius, as well as lower modal dispersion, is achieved with a silicon oxi-nitride core. The material dispersion characteristic was estimated at approximately 10 -3 ps nm -1 cm -1 , which is much lower than the maximum predicted modal dispersion for the designed waveguides.

CMOS optical link -proof of concept
The photo-micrographs in Fig. 13 illustrate results which have been achieved with a CMOS opto-coupler arrangement, containing a CMOS Av-based light-emitting source, an 5 x 1 x 150 µm silicon over-layer waveguide and a lateral incident optimized CMOS based photodetector (Snyman &Canning 2002, Snyman et al, 2004. The waveguide was fabricated in CMOS similar to that as shown in Fig. 5 (b). Fig. 13 (a) shows an optical microscope picture of the structure under normal illumination conditions with the Si LED source, the waveguide and the elongated diode detector. Fig.13 (b) shows the structure as it appeared under subdued lighting conditions. At the end of the silicon oxide structure, some leakage of the transmitted light was observed (feature B). This observation is quite similar to light emission observed at the end of a standard optical fibre, and it confirms that good light transmission occurs along the waveguide.
www.intechopen.com Signals of 60 -100 nA could be observed for 0 to +20 V source pulses and +10 V bias at the elongated diode detector. When the detector was replaced with a n + pn photo-transistor detector (providing some internal gain at the detector at appropriate voltage biasing), signals of up to 1 µA could be detected. The arrangement showed good electrical isolation of larger than 100 MΩ between the Si LED and the detector for voltage variations between the source and the detector of 0 to +10V on either side when no optical coupling structures were present . This was mainly due to the p + n and n + p reversed biased opposing structures utilised in the silicon design. Once an avalanching light emitting mode was achieved at the source side, a clear corresponding current response was observed at the detector. Detailed test structures are currently investigated.

Proposed CMOS and SOI waveguide-based optical link technology
Building on the optical source and waveguide concepts, as outlined in the preceding sections, optical source based systems may be designed which optimally couple light into the core of an adjacently positioned optical waveguide. Similarly, the core of the waveguide can laterally couple light into an adjacent RAPD based photo diode. It follows that interesting high speed source-detector optical communication channels and systems can be implanted in CMOS technology as illustrated in Fig. 14 (Snyman , 2010d(Snyman , , 2011a. The proposed isolation trench waveguide technology as outlined in Section. 2 is particularly well suited in order to create such configurations in CMOS technology. However, OLED surface layer structures together with CMOS technology and Si Av LED and SOI technologies may also generate such structures.
Fig. 14. Conceptual optical link design using a optical source arrngement as in Fig . 8 , a CMOS trench based waveguide and a RAPD photo detector arrangement.Bi-directional optical communication may be realised with the structure.
Using a Si Av LED optical source, an optical p + npn source, as outlined in Fig. 8 can be designed, with its optical emission point aligned with a lateral propagating CMOS based waveguide. Similarly, lateral incident detectors can be designed that take advantage of the carrier multiplication and high drift concept of reach through avalanche based diodes (RAPD). This can be combined with the proposed CMOS trench-waveguide systems. This implies that a similar lateral n+pp-p+ structure could be designed, such that with suitable voltage biasing, a high carrier generation adjacent to a high carrier drift region is formed. By placing an appropriate contact probe in the high drift region, varying voltage signals could be detected as a function of drift current. Silicon detector technology has been quite well established during the last few decades. These devices enerate up to 0.6 A W -1 and reach up to 20 GHz (Senior, 2008

Optical coupling efficiencies and optical link power budgets
Obtaining good coupling efficiencies with Si Av LEDs and OLEDs when incorporated into CMOS structures presents a major challenge. It is estimated that the optical power emitted from the Si Av LEDs is in the order of 100 -1000 nW (for typical driving powers of 8 V and 10 µA). Since most of the emission occurs inside the silicon with a refractive index of 3.5, it implies that only about 1 % of this optical power can leave the silicon because of the small critical angle of only 17 degrees inside the silicon. After leaving the silicon the light spreads over an angle of 180 degrees ( Fig.15 (a)). When a standard multimode optical fibre with a numerical aperture of 0.3 is placed close to such an emission point, only 0.3 % of the forward emitted optical power enters the fibre. Our research has shown that remarkable increases in optical coupling efficiencies can be achieved by means of two techniques : (1) concentrating the current that generates the light as close as possible to the surface of the silicon ( for Si Av LEDs) ; and, (2), maximizing the solid angle of emission in the secondary waveguide. By displacing the metal contacts that provide current to the structure as shown in Fig 15 (b) , the current is enforced on the one side surface facing the core of the waveguide. Since mainly surface emission is generated, about 50 % of the generated optical power enters the waveguide (Snyman 2010d, Snyman 2011. A silicon nitride core with a silicon oxide cladding could then ensure an acceptance angle of up to 52.2 degrees within the waveguide. The total coupling efficiency that can be achieved with such an arrangement is of the order of 30%. This is an 100 fold increase in coupling efficiency from the point of generation to within the waveguide as achieved in Fig 15 (a) (Snyman, 2011c).
(a) (b) (c) Fig. 15. Demonstration of optical coupling between a Si Av LED optical source and the silcon nitride CMOS based optical waveguide. Fig. 15 ( c) shows a further optimized design. Here a thin protrusion of doped silicon material is placed inside the core of a silicon nitrate core CMOS based waveguide (Snyman 2011a). Such a design is quite feasible with standard layout techniques of CMOS silicon provided that the side trenches surrounding the silicon protrusion are effectively filled with silicon nitride through the plasma deposition process. The core is surrounded by trenches of silicon oxide. The optical power that is generated at the tip of the protrusion and radiates in a solid angle of close to a full sphere inside the waveguide. Simulation studies show that up to 80 % of the emitted light is now coupled into the silicon nitride core. Reflective metal surfaces at the sides and the back of this waveguide may further improve the forward propagation. The optical radiation produced inside these waveguides will be highly multimode. The diameters of these waveguides may be bigger than the ones suggested for single mode propagation in Section 4. However, in such cases, standard type waveguide mode converters can reduce the number of modes or even generate single mode propagation.
With an optical power source of 1 µW at the silicon surface, one can achieve a coupling efficiency between source and waveguide of 30 to 50 %, assuming a coupling loss of only 3 dB between source and waveguide. With a 0.6 dB cm -1 wave guide loss, the loss in the 100 µm waveguide itself is estimated to be 0. 01 dB. Since the whole radiation propagating in the waveguide can be delivered with almost 100 % coupling efficiency, one can expect about 500 nW of optical power reaching the detector. With an 0.3 A per Watt conversion efficiency of the detector, current levels of about 100 nA (0.1 µA) can be sensed with a 10 x 10 µm detector. Values for OLEDs together with surface CMOS waveguides could be much higher. The low frequency detection limit of silicon detectors of such dimensions is of the order of pico-Watt. For low frequencies and low optical level detection , a dynamic range of about 10 3 to 10 4 is achievable. At high modulation speeds, the achievable bit error rates will obviously increase. The optical powers quoted above are much lower when compared with current LASER, LED and optical fiber link "macro" technology. However, we are addressing a new field of "micro-photonics" with micrometer and nano-meter dimensions, and power levels as well as other parameters should be scaled down accordingly. Furthermore, our research showed that the optical intensities determine the achievable bit error rates rather than absolute intensities. As stated earlier, the calculated intensity levels with some of our Si Av LEDs are as high as 1 nW µm -2 .

Connecting with the environment
We present only two viable ways of communicating with the outside chip environment:, i.e optical communication vertically outward from the chip, and optical communication via lateral waveguide connections.
In the first case, silicon oxide and silicon nitride are used as well as trench technology as outlined in Section 2 in order to increase the vertical outward radial emission (Snyman, 2011c). Fig. 16 illustrates the concept. By placing a thin layer of silicon adjacent to two semicircular trenches, the solid angle of the optical outward emission is increased within the silicon from about 17 to almost 60 degrees. Filling up the trenches with silicon oxide and placing of thin layer of silicon oxide increases the critical emission angle from the silicon from 17 to 37 degrees. The thin layer of silicon nitride can be appropriately shaped with post processing RF etching techniques such that all emitted light can be directed vertically www.intechopen.com upward. It is estimated that a total optical coupling efficiency from silicon to fibre of up to 40 % can be achieved in this way. Fig. 16. Vertical outward coupling of optical radiation into optical fiber waveguides using trench based and overlayer post processing technology. In the second case, optical coupling is achieved via lateral wave guiding (Snyman, d, 2011(Snyman, c, 2011d. Fig. 17 illustrates this. (1) The lateral coupling from the optical source can be as high as 80 % as demonstrated in the previous section in Fig. 15 (c ). (2) The optical radiation can be converted from multi-mode propagation to single mode propagation by waveguide mode converters; (3) Single mode radiation at the side surface ensures high collimation. This assures a coupling efficiency of almost 100 % at the side surface. In total, an optical coupling efficiency of up to 80 % can be achieved. This is much higher than achievable with vertical coupling.
(4) Our analysis shows that the far field pattern of the optical radiation emitted from the waveguides can be manipulated by either adiabatic expansion or by tapering the core near the end of the waveguide. In this way the mode field diameter extends into the silicon oxide cladding, and the radiation couples more efficiently into the core from an externally positioned optical fibre.
In conclusion, the analysis shows that combining CMOS compatible sources effectively with on-chip lateral extending waveguide technology, offers major advantages , like increased coupling efficiencies, increased optical power link budgets, lower achievable bit error rates in data communication , and better coupling with the external environment.

Proposed first iteration CMOS micro-photonic systems
The on-chip optical and signal processing applications have been already highlighted in Section 6. A particular interesting design , made possible with the CMOS waveguide technology, is a so called H-configuration waveguide that can be used for optical clocks in very large CMOS micro-processor systems (Wada, 2004). The realization of diverse other CMOS and waveguide based micro-photonic systems as well as the incorporation of a whole range of micro-sensors into CMOS technology is possible. The advantages are, (1), high levels of miniaturization; (2), higher reliability levels; (3), a vast reduction in technology complexity and, (4), a drastic reduction in production costs. The proposed waveguide technologies, particularly in this chapter, offer high optical coupling between Si Av LEDs or OLEDS and CMOS based waveguides, with diverse applications in optical interconnect and future on chip micro-photonic systems. Fig. 18 to 20 illustrate some applications, as proposed here, for CMOS based micro-photonic systems (Snyman 2008a(Snyman , 2009a(Snyman , 2010c(Snyman , 2011b(Snyman , 2011c. In Fig. 18, a hybrid approach is demonstrated. A mechanical module is added to an existing CMOS package creating a CMOS-based micro-mechanical optical sensor (CMOS MOEMS), capable of detecting diverse physical parameters such as vibration , pressure, mechanical osscillation etc. Optical radiation is coupled from the CMOS platform to the mechanical platform. The mechanical platform returns optical signals which contain information about the deflection (Snyman, 2011 c). Fig. 19 shows a monolithic approach of creating CMOS MOEMS involving only postprocessing procedures. A cantilever is fabricated in part of the CMOS IC die, by post processing procedures. Si Av LED or OLEDs couple optical radiation into a slanted waveguide track, transmit the optical radiation laterally across the die, collimate the radiation through the crevasse onto the one side of the cantilever. Optical radiation is reflected from the cantilever and detected by a series of p-i-n photo-detectors arranged laterally along the crevasse side surface. The accumulated signals are processed by adjacent CMOS analogue and digital processing circuits. Such a structure can detect vibrations, rotations and accelerations (Snyman, 2011 c). Fig. 18. Schematic diagram of a hybrid CMOS-based micro-photonic system that can be realized by placing a mechanical-module on top of a optically radiative and detector active CMOS platform using standard packaging technology.  The immunity to electromagnetic induced noise of these systems is a major advantage. Key components of such the systems are an effective CMOS compatible optical source, CMOS compatible optical wave guiding, effective optical coupling into the waveguide, and optical collimation circuitry. The sensitivity and functionality of these systems are a function of the waveguide design. Fig. 20 explores a more complete and more advanced waveguide based micro-photonic system design including ring resonators, filters and an unbalanced Mach-Zehnder interferometer. By selectively opening up a portion of the waveguide in the one arm of the interferometer to the environment, molecules or gases can be absorbed and both, phase and intensity changes can be detected by the interferometer. Sensors can be designed which detect the absorption spectra of liquids (Snyman 2008a(Snyman , 2009a(Snyman , 2010c(Snyman , 2011b(Snyman , 2011c. Fig. 20. Schematic diagram of a CMOS-based micro-photonic system that can be realized using an on chip Si Av LED, a series of waveguides, ring resonators and an unbalanced Mach-Zehnder interferometer. A section of the waveguide is exposed to the environment and can detect phase and intensity contrast due to absorption of molecules and gases in the evanescent field of the waveguide.
Obviously, a great variety of diverse other types of CMOS based micro-photonic systems are possible, each incorporating specific optical micro-sensors and waveguides. It is anticipated to implement future CMOS based micro-photonic systems in micro-spectro-photometry, micro-metrology, and micro-chemical absorption analysis.

Conclusions
It is evident that the analyses as presented in this study with regard to Si Light Emitting Devices operating at 650 -850 nm and lateral optical waveguides can lead to the generation of diverse photonic micro-systems systems in standard CMOS integrated circuitry. The generation of lateral waveguides in CMOS technology operating in this wavelength regime poses particular challenges. However, enough evidence has been obtained from our analyses and first iteration experimental realisations that this technology is indeed feasible. The proposed sub-technologies has major advantageous for the generation of complete new families of photonic micro-systems on CMOS chip avoiding the more complex Si Ge or III-V hybrid technology. The following serves as brief summaries of results and statements made: 1. The potential of CMOS technology was analysed and evaluated for sustaining the generation of optical micro-photonic systems in CMOS integrated circuitry. Particularly, the silicon dioxide "field " oxide , inter-metallic oxides and passivation nitride and added polymer over-layer structures show good potential to be utilised as "building blocks" in new generation CMOS based micro-photonic systems. 2. It was shown that a variety of optical source technologies currently already exists that can be utilised for the generation of 650-850nm optical sources on chip. OLEDs offers high irradiance in this wavelength regime. There are however challenges with regard to incorporation of the hybrid organic based technologies into CMOS technology and with regard to achieving high modulation speeds. Silicon avalanche-based Si LEDs can be integrated into CMOS integrated circuitry with relative ease, they offer high modulation bandwidth , and can be integrated particularly at the silicon-overlayer interface, and offer both vertical and lateral optical coupling possibilities. Their power conversion efficiency is lower, but analysis show that the power levels is enough to offer adequate power link budgets , with high modulation bandwidth. Particularly, they can generated micron size optical emission points, with high irradiance levels, offering unique application possibilities with regard to generating of micro-structured photonic devices. 3. Analyses and simulation results as presented in this study, show that it is possible to design waveguides with CMOS technology at 650-850 nm. Particularly, the generation of waveguides with small dimension silicon nitride cores embedded in larger silicon dioxide surrounds seems particularly attractive. The utilisation of lateral CMOS waveguides increase coupling efficiencies, improve optical link power budgets, and supports numerous designs with regard to the generation of micro-photonic structures in CMOS integrated circuitry. These aspects are all beneficial for generating lateral layouts of micro-photonic systems on chip and offers viable options for interfacing optically with the environment.. 4. The technology as proposed, may not necessarily compete with the ultra high modulation speeds offered by Si-Ge based and SOI based technologies currently operating at above 1100nm. However, Si Av LEDs, waveguides detectors, demonstrated in this study, support the generation of micro-photonic systems in standard CMOS technology, offering modulation speeds of up to 10 GHz at the added advantage of ease of integration into standard integrated circuit technology. Direct driving of the sources in CMOS may reduce modulation speeds. Particularly, the use of waveguide-based modulators may produce higher modulation speeds (Snyman 2010e). Several advances in this area could still be made. 5. Lastly, a few designs are proposed for the realisation of first iteration micro-photonic sensor systems on chip. Both mechanically as well as adhesion and waveguide based sensors systems are proposed and the application possibilities of each were presented. Particularly, the proposed technologies offers the realisation of a complete new family of source-sensor based micro-photonic systems where bandwidth is not the essential parameter, but rather the capability to add to the integration level, intelligence level, and the interfacing level of the processing circuitry with the environment.

Acknowledgements
The hypotheses, analyses, first iteration results and research interpretations as presented in this study were generated by means of South African National Research Foundation grants FA200604110043 (2007) and NRF KISC grant 69798 (2009-2011 and SANRF travel block grants (2007,2008,2009  The purpose of these patents is to secure intellectual property protection on investments made already, and to secure licensing of certain key components of the technology as already developed. However, the opportunities in this field is so extensive, that numerous further investment opportunities with interested further investors exist.