Emerging Artificial Two-Dimensional van der Waals Heterostructures for Optoelectronics

Abstract

Two-dimensional (2D) materials are attracting explosive attention for their intriguing potential in versatile applications, covering optoelectronics, electronics, sensors, etc. An attractive merit of 2D materials is their viable van der Waals (VdW) stacking in artificial sequence, thus forming different atomic arrangements in vertical direction and enabling unprecedented tailoring of material properties and device application. In this chapter, we summarize the latest progress in assembling VdW heterostructures for optoelectronic applications by beginning with the basic pick-transfer method for assembling 2D materials and then discussing the different combination of 2D materials of semiconductor, conductor, and insulator properties for various optoelectronic devices, e.g., photodiode, phototransistors, optical memories, etc.

1. Introduction

Since the successful exfoliation of graphene [1], a group of materials with two-dimensional structures have revived and are attracting explosive interests from a variety of fields, including transistors [2], photodetectors [3], chemical sensors, memories, and artificial synapses [4, 5]. This is benefited from the versatile properties, of 2D materials defined not only by their crystal structure (1 T, 2H, etc.) but also by their layer number, i.e., the electrical conductivity and optical bandgaps [6]. The transition metal chalcogenides (TMDs) of 1 T or 1 T’ phase usually manifest metallic behavior, while in 2H phase, they are semiconductor and can be transformed into insulator by field-effect modulation [7]. Meanwhile, monolayer MoS₂, WSe₂, and MoTe₂ are transformed into direct band semiconductor with greatly improved photoluminescence yield compared to their indirect bulk form, rendering the further fabrication of light emitting diodes [8, 9]. The recent appearance of 2D ferroelectric materials from direct chemical synthesis or atom doping has further enriched the physical properties of 2D semiconductors [10, 11]. These rapid evolution of 2D materials with diverse physical and chemical properties motivates enduring efforts to explore various property tuning and integration strategies in functional devices, e.g., via chemical doping, alloying, or constructing heterostructures [12].

An indispensable feature of the 2D materials is their van der Waals interlayer coupling, which is weak enough compared to covalent or ionic bonding to enable mechanical or electrochemical exfoliation [13]. The exfoliated 2D materials in monolayer or few layer thicknesses can then be artificially stacked, either laterally or vertically, making heterostructures in various forms that are not possible in conventional semiconductors with 3D crystal lattice (Si, III-V, and oxides) due to the lattice mismatch. The great flexibility in assembling 2D materials thus renders unprecedented opportunity in discovering novel nanoscale transport phenomenon [14] and carrier dynamics and stimulates the exploration of 2D functional devices via deliberately designing the heterostructures. In optoelectronics, this enabled the tailoring of charge separation characteristics of photogenerated electron–hole pairs in semiconductors [15], thereby allowing innovated designs of heterostructured transistors [16, 17], tunneling diode for photodetection [18, 19], and further optoelectronic memories with float gate structures [20].

In this chapter, we first introduce the basic design of heterostructures for optoelectronics and the pick-transfer methods for their artificial assembly and then discuss the recent progress in fabricating novel 2D vdW heterostructures for functional devices. In view of the rapid progress in this field, the chapter is not intended to cover all aspects of the field but focus on optoelectronic-related application, typically photodiode and phototransistors for photodetection and optoelectronic memories that integrate both light sensing and memory function.

2. Type I, II, and III heterostructures for optoelectronics

The interfacial energy band alignment in heterostructures governs the carrier dynamics in devices and therefore determines directly their functional performances. Depending on the relative positions of conduction band and valance band of constituting materials, there are generally three types of band alignments, including type I (straddling gap), type II (staggered gap), type III (broken gap), as illustrated in Figure 1a [21]. The different band offsets make them perform differently in optoelectronic devices [22]. In type I alignment, the bandgap of a semiconductor is located within the bandgap of another one; thus both electrons and holes tend to relax in the first narrow bandgap semiconductor. It is therefore widely used in light emitting diodes for higher light illumination efficiency by confining electron and hole pairs within the narrow bandgap semiconductor [23]. In contrary, in type II alignment, both the conduction band minimum (CBM) and valance band maximum (VBM) are higher or lower than the other, which forces electrons and holes residing in different semiconductors. The separation of electron–hole pairs in type II aligned heterostructures allows the fabrication of rectifying diodes with photovoltaic effects and is usually adopted for photoelectric detectors that transform incident light into electrical signals [3]. In the case of type III band alignment, the bandgap of a semiconductor lies outside of the other one, with its CBM lower than the VBM of the other. There is no more forbidden gap at the interface compared to the bulk semiconductor. Such type III band alignment is useful in tunneling field-effect transistors with large current density [24].

Figure 1.

Band positions and alignments for 2D materials and heterostructures. (a) Heterostructures of type I, II and III interfacial band alignments, reproduced with permission from Ref. [21], Copyright 2016 American Physical Society. (b) Conduction and valance band positions of selected 2D materials collected from literatures.

Since the conduction band is usually related to the cations while valance band is related to the anions, designing the band offsets is traditionally mostly achieved in superlattices of semiconductor alloys with widely tuned bandgap and suppressed lattice mismatches, e.g., Al_xGa_1−xAs/GaAs [25]. However, by using 2D materials, the lattice mismatch between adjacent heterostructured materials is in principle eliminated due to the weak interlayer coupling via van der Waals force. Various 2D materials of different energy band structures and gaps, e.g., graphene, MXenes, black phosphorous (BP), TMDs, and hexagonal boron nitride (h-BN), can thus be artificially stacked to make multiple kinds of heterostructures [13, 26]. Figure 1b illustrates the energy bandgap position of several 2D semiconductors [21, 27, 28]. Due to the zero-bandgap characteristic of graphene, it could not be directly used for high on–off switching devices, e.g., transistors, diodes, but is often used as electrode contacts for its ultrahigh carrier mobility >10,000 cm² V⁻¹ s⁻¹ [29]. Recently, other 2D semiconductors have been found as alternatives, with widely distributed bandgaps from 0.2 eV to 2–3 eV [4, 6]. The electron affinity also varies largely from 3 to <5 eV, thus rendering the possibility to make all kinds of heterostructures (types I, II, III) with different band offsets, i.e., by choosing suitable 2D semiconductors. For example, WSe₂/SnS₂ constitutes a type III heterostructure, while MoS₂/WSe₂ forms a typical type II structure. Notably, the number of stacked layers is also not limited to two but can be facilely increased for multilayer heterostructures for tunneling diodes or device encapsulation [13]. The continuously increasing 2D material family thus incubates infinite possibilities in 2D heterostructures and extremely rich functions.

3. Dry transfer methods for artificial 2D stacking

The deterministic transfer of two-dimensional materials constitutes a crucial step toward the fabrication of heterostructures based on the artificial stacking of two-dimensional materials. To stack multiple 2D materials into heterostructure, one needs to transfer 2D materials into a specified position on substrate. This is usually done under an optical microscope, in which one could identify the ultrathin 2D materials through their slight color contrast with substrates. A 3D moving stage is usually equipped to fine adjust the stacking position of each layer, as indicated in Figure 2a [30]. So far, a lot of methods and processes have been developed to achieve high-quality assembly of 2D materials in devices and multilayer heterostructures. For 2D materials initially grown on substrates, e.g., graphene on copper, MoS₂ on sapphire, they are usually first etched free from the substrates via polymer (typically poly(methyl methacrylate), known as PMMA)-assisted handling and wet-chemical etching processes [31]. However, the residual of PMMA and wet etching chemicals often deteriorate material performance and also degrades the cleanness of stacked interface, which can be serious in multilayered heterostructures. All-dry transfer of 2D materials is thus desired for making high-performance devices.

Figure 2.

Setup and typical dry transfer processes for 2D vdW stacking. (a) Schematic of the experimental setup and (b) the processes employed for the all-dry transfer process, reproduced with permission from Ref. [30], Copyright 2014 IOP publishing Ltd. (c) Schematic of the van der Waals (vdW) technique for polymer-free assembly of layered materials, reproduced with permission from Ref. [33], Copyright 2013 Science.

To make a heterostructure based on vertical stacking, 2D materials can be typically exfoliated from single crystals by Scotch tape and then transferred to viscous elastomer stamp (poly dimethyl siloxane, PDMS), as illustrated in Figure 2b [30]. The transparent PDMS stamp is then used to handle the exfoliated 2D flakes. Under optical microscope, it is then aligned to a target position, e.g., the position of already transferred 2D layer. The position of the stamp is then fine-tuned in all three dimensions to approach the target substrate, until the full contact. It is then slowly peeled off from substrate leaving 2D material behind. Sometimes slight heating of the substrate is necessary to reduce the viscosity of PDMS stamp and promote the successful transfer of 2D material onto target substrate. Instead of the common used PDMS stamps, thermal release tapes can be also used as the handle [32]. Though no wet-chemical etching processes is adopted in the above procedures, the surface of PDMS is full of silane groups and may contaminate the 2D material during transfer and make the contacting substrate hydrophobic. It may therefore deteriorate the material and interface quality in device.

An improved polymer-free method was reported by Wang et al., which adopted the clean h-BN as the buffer layer to attach graphene (Figure 2c) [33]. This is based on the stronger interaction between graphene and h-BN compared to SiO₂, so that elastomer stamps with h-BN layer could pick up graphene layer from substrate. Note that the graphene layer is initially transferred onto SiO₂ substrate by tape exfoliation; both the top and bottom surface are free from polymer residuals due to the fresh exfoliation when peeling off the tape. Through this method, the graphene layer during all transfer processes is protected by h-BN and thus could form clean interfaces with both the top and bottom h-BN layers. The as-prepared h-BN-encapsulated graphene manifests unprecedented room temperature mobility up to 140,000 cm² V⁻¹ s⁻¹, with long ballistic transport distance over 15 μm at 40 K, demonstrating the ultrahigh interface quality formed in such polymer-free transfer methods.

Recently, the pick-transfer methods have been also modified to transfer metal electrodes onto 2D materials, avoiding the interdiffusion of elements within the contact interface with 2D materials from traditional physical deposition of metal electrodes (via magnetic sputtering, thermal evaporation, etc.) [34]. Importantly, the formed electrical contact with MoS₂ using different metal electrodes displayed ideal Schottky barriers defined by the work function difference between metal and MoS₂, which have not been achieved in conventional Si devices. It is therefore undoubted that the versatile usages of pick-transfer methods in assembling 2D devices hold vast potential in reforming existing technologies from many aspects.

4. Heterostructures for photodetection

There are several kinds of photodetectors that convert incident light signal to electrical signals, including detectors that rely on photoelectric effect, pyroelectric effect, and photothermal effects. Among the various detectors, the photoelectric detectors exhibit fast response dynamics based on simple separation of electron–hole pairs and are mostly used in commercial products. The photoelectric detectors can be further categorized into photodiode and phototransistors. In photodiodes, the photogenerated electron–hole pairs are separated by the built-in electric field in space charge region, while in phototransistors, an external electric field is applied to generate photodetection gain >100% for highly sensitive detection.

In 2D heterostructures, both photodiodes and phototransistors can be built up by vdW stacking of different materials. Because of the presence of band offset at the interface, heterostructured junctions tend to enable efficient charge separation compared to homojunctions, which requires deliberate control of their p and n doping states. In this section, we discuss several typical heterostructures in type I–III band alignments and their behavior in photodetection.

4.1 Heterostructured diodes

To fabricate heterostructured diode, one kind of 2D material is exfoliated and transferred onto the other one. For the charge separation in vertical direction, type II band alignment is desired. However, this is not naturally obtained, especially when one adopts a narrow bandgap semiconductor for infrared applications, e.g., BP. However, since the work function of ultrathin 2D materials can be dramatically modulated by electrostatic methods, the behavior of 2D diodes was demonstrated tunable by applying gate voltages [35, 36, 37]. As illustrated in Figure 3a, BP and WSe₂ form type I band alignments [38], with slight conduction band offset (~0.1 eV). When increasing the back-gate voltage from negative to positive, the WSe₂ layer is tuned sequentially from p to i and n states by the injection of gate-coupled electrons and then forming, respectively, p–p, pi, and p-n junctions with the p-typed BP. Further increasing gate bias also tunes BP to n type and results in n-n junction. Accordingly, these junctions manifest different rectification ratios under gate bias. Figure 3b displays the forward and reverse channel current (at V_ds = 1 V and −1 V); the different onset threshold gate voltage under forward and reverse bias results in a window of −30 V < Vg < 10 V, in which high rectification ratio is obtained by the formation of p-n junction. The widely tuned doping characteristic of 2D bipolar semiconductor thus renders feasible modification of the diode characteristics in the device via various kinds of field effects, including using ionic liquids and ion gels [39].

Figure 3.

2D Heterostructures of different interfacial band alignments and their characteristics. (a) The type I band alignment between BP and WSe₂ and (b) the appearance of various junction behaviors (p-p, p-n, n-n) under gate modulation, reproduced with permission from Ref. [38], Copyright 2017 Wiley-VCH. (c) Schematic of the type II heterostructure based on n-type MoS₂ and p-type GaTe, and (d) the photovoltaic characteristic under light irradiation, reproduced with permission from Ref. [37], Copyright 2015 American Chemical Society. (e) Schematic diagram of a type III WSe₂/SnS₂ heterostructure and (f) its IV characteristic under dark and light illumination (550 nm), reproduced with permission from Ref. [19], Copyright 2018 Wiley-VCH.

By choosing appropriate 2D semiconductors, p-n junctions can be formed directly without gate bias. Wang et al. reported such diode based on p-typed gate and n-type MoS₂ [37]. It displays apparent photovoltaic effect under light illumination, as indicated in Figure 3c. The extracted ideal factor of the junction is as low as 2 at room temperature, corresponding to Shockley-Read-Hall (SRH) recombination-dominated carrier loss during transport. So far, various kinds of p-n junctions have been made based on such type II band alignments, including BP/MoS₂ [38], MoS₂/MoTe₂ [40], MoS₂/WSe₂ [41], etc. The open circuit voltage by photovoltaic effect in such type II band heterostructures is limited by the interfacial bandgap determined by the lower conduction and higher valance band. It is therefore usually less than the maximum V_oc attainable in p-n junction of each component. However, an essential benefit of such heterostructure is the formation of photodiode without deliberate efforts in controlling the p and n-type doping. A strong evidence of the formation of type II band alignment is that the photoluminescence at the junction area is quenched due to the separation of electron–hole pairs at the interface. Another benefit of such type II heterostructure is based on the interlayer transition, which supports sub-bandgap photodetection [42]. For example, MoS₂/WS₂ heterojunction displays near-infrared response that is beyond both the bandgap limits of MoS₂ and WS₂ [43].

Tunneling diodes can be formed by heterostructures of type III band alignment [24]. In the case of WSe₂/SnS₂ heterostructure, due to the high electron affinity of SnS₂, type III heterostructure is formed with direct interband transition between valance band of WSe₂ and the conduction band of SnS₂ [19]. The diode initially displayed high rectification ratio >10⁴ for low dark current under reverse bias, whereas under illumination, the device exhibits dramatically increased light current by direct tunneling, resulting in high responsivity >200 AW⁻¹ and excellent detectivity >10¹³ Jones. Further exploration of the kind of heterostructure using other 2D materials with different bandgap may have the potential to make high-performance tunneling photodiodes for infrared. The heterostructure of narrow bandgap BP and larger bandgap MoS₂ has been used to realize multi-value inverters with high gains >150 based on gate-modulated tunneling current [44].

In addition to the two-layer stacking, multilayered heterostructures have been also developed as tunneling diodes. Figure 4a illustrates such a heterostructure based on vertically stacked graphene/MoS₂/graphene [35]. Because of the work function between top and bottom graphene (due to the unidentical substrate doping effect), the multilayer displayed photovoltaic separation of electron–hole pairs under illumination, reaching a V_oc~0.3 V under additional gate bias. The device also exhibits wavelength-dependent responsivity that is related to the absorption in MoS₂ (as indicated in Figure 4b), demonstrating the working principle of the multilayer junction. By using graphene at both the bottom and top of the junction made by MoS₂ and WSe₂, Lee et al. demonstrated an efficient p-n junction at the ultimate atomic thin thickness with improved collection of photoexcited carriers [36]. Figure 4c and d illustrate the structure and IV characteristic of the device. Under illumination, tunneling-assisted interlayer recombination of the majority carriers dominates the electronic and optoelectronic behavior of the junction. Alternatively, sandwiching graphene within WSe₂ and MoS₂ can make a broadband photodetector up to 2 μm based on the absorption of graphene [45]. Such interlayer tunneling can be suppressed by inserting an insulating h-BN layer. Vu et al. fabricated a tunneling heterostructure based on graphene/h-BN/MoS₂ in the configuration shown in Figure 4e [18]. The dark current in device is greatly suppressed by blocking direct tunneling. However, under illumination, photogenerated carriers may overcome the barrier and contribute significant photocurrent via Fowler-Nordheim (FN) tunneling. Notably, to balance the photodetection performance in terms of the responsivity and detectivity, the thickness of h-BN is optimal ~5–7 nm, as indicated in Figure 4f. The thicker the h-BN layer, the lower probability of FN tunneling and thus lesser photocurrent, while the thinner h-BN results in large dark current by direct tunneling, therefore less detectivity in photodetection.

Figure 4.

Various kinds of vertical heterostructures. (a) Schematic of Gr/MoS₂/Gr heterojunction, which displays photovoltaic separation of electron–hole pairs and (b) the extracted external quantum efficiency (EQE) under different light power and wavelengths, reproduced with permission from Ref. [35], Copyright 2013 Nature Publishing Group. (c) The schematic diagram of vertical p-n junction made by MoS₂/WSe₂ sandwiched within two graphene layers and (d) their IV characteristic in dark and illumination, reproduced with permission from Ref. [36], Copyright 2014 Nature Publishing Group. (e) Schematic of a tunneling diode based on graphene/h-BN/MoS₃ heterostructure and (f) its photodetection performance when using h-BN with thickness within 1–22 nm, reproduced with permission from Ref. [18], Copyright 2016 American Chemical Society.

4.2 Heterostructured phototransistors

In photodiodes, the photodetection gain is limited due to the maximum attainable quantum efficiency (photon-to-electron conversion efficiency) less than unity [46]. Hence, photodiodes are less sensitive and are usually operated under reverse bias or self-driven mode without external bias. In comparison, when integrating such heterostructure into a photoconductor configuration, phototransistors can be made with high sensitivity based on the photoconductive gain and vertical photovoltaic effects. The photodetection gain originates from the separation of electron–hole pairs at the heterostructure interface, with one kind of carrier accumulated in the 2D high mobility channel, therefore yielding amplified photoconductive gains by the ratio of injected charges compared to the inherent carrier concentration in 2D channel [47]. A representative example is PbS quantum dot (QD)-sensitized graphene, in which the QDs and 2D surface are coupled by vdW interaction (Figure 5a) [48]. Upon illumination, holes are injected into graphene and transport there with dramatically increased mobility compared to QDs that have large amount of grain boundaries and surface states. In this way, ultrahigh responsivity >10⁷ A/W has been demonstrated in such hybrid photodetectors. Notably, based on the gate-modulated Fermi level in graphene, the charge injection from PbS QDs to graphene can be extensively tailored. As indicated in Figure 5b, the attained responsivity is sensitive to the applied gate bias; under V_g = 4 V, the photoresponse gain is tuned even to zero by eliminating the interfacial charge transfer. Such widely tuned gain is potentially useful for intentionally selected sensitivity levels for a detector. However, due to the zero-bandgap nature of graphene, hybrid detectors with graphene as the channel exhibit large dark current and low detectivity. Alternatively, other 2D semiconductors, such as MoS₂ and WSe₂, have been also explored as the channel, yielding improved on–off ratio in detector [47, 49].

Figure 5.

Phototransistors based on various heterostructures. (a) The schematic of PbS quantum dots sensitized graphene for infrared photodetection; (b) the back-gate-modulated responsivity of the hybrid photodetector, reproduced with permission from Ref. [48], Copyright 2012 Nature Publishing Group. dependence of the responsivity on the different wavelength. (c) Configuration of a vertically stacked BP/WSe₂ heterostructure and (d) its wavelength-dependent gain and detectivity, reproduced with permission from Ref. [17], Copyright 2017 Elsevier Ltd. (d) Detectivity of various photodetector versus wavelength of the incident laser. (e) Illustration of the organic/inorganic vdW heterostructured phototransistor based on ZnPc-decorated MoS₂ and (f) its photoresponse behavior, which is greatly improved compared to photoconductors that suffer persistent photoconductance, reproduced with permission from Ref. [16], Copyright 2018 American Chemical Society.

In addition to colloidal quantum dots, 2D heterostructures based on vertically stacked 2D layers can also make up phototransistors. A narrow bandgap semiconductor can be stacked on another 2D material for extended photodetection spectra. As illustrated in Figure 5c, BP is stacked on a WSe₂ channel [17]. The photoexcited carriers in BP by near-infrared photons are separated by the type II interface, with electrons injected to WSe₂. The amount of injected charge is related to the junction capacitance and the photovoltage built across the junction. In Figure 5d, the photodetection gain in such device reaches 10² at 1500 nm, which is considerably larger than the photodiodes (<1) by the amplification mechanism in phototransistor. Therefore, the specific detectivity of the device reaches 10¹⁰–101⁴ Jones at the measured wavelength (400–1500 nm) range. Longer wavelength results in low gain and detectivity due to the decrease of light absorption. Instead of BP, a lot of other 2D materials has been also explored to construct such heterostructured phototransistor, in which the photovoltaic separation of photocarriers can be used to gate the semiconductor channel and amplify the photoconductive gain.

Without complicated stacking processes, 2D vdW heterostructures can be also made by combining organic small molecules with 2D material. As illustrated in Figure 5e, Huang et al. recently reported such a vdW phototransistor based on Zinc phthalocyanine (ZnPc, a π-conjugated planar molecule)-decorated monolayer MoS₂, which is achieved by simple solution treatment [16]. The formed junction displayed apparent rectification characteristic at the out-plane direction by forming type II band alignment and p-n junction. As a result, the detector displayed remarkably improved response speed and optimal responsivity (Figure 5f) with proper Al₂O₃ passivation. Other molecules, such as pentacene, have been also used to modify the performance of 2D semiconductors (MoS₂, ReS₂, etc.) in addition to response dynamics but also the response spectra [50, 51]. Considering the huge library of 2D materials and organic molecules, it is believed such hybrid heterostructure holds special promise in achieving scalable high-performance photodetections, in which using existing pick-transfer procedures is apparently challenging.

5. Optoelectronic memories

Optoelectronic memory can transform incident optical signals into stored electric charges [52]. Considering the light program signals can be free from interferences, the optoelectronic memories are particularly attractive for realizing high-throughput data storage, e.g., in parallel computing [53]. A typical optoelectronic memory is consisted of light sensing part and charge storage component, which could be feasibly realized using multilayered 2D stacking. Compared to the conventional 3D counterparts, the 2D devices have the advantages in having high on–off ratio by the ultrathin channel, the conductance of which can be feasibly modulated via slight amount of trapped charges. According to the charge trapping mechanism, in the following we describe two kinds of optoelectronic memories, based on, respectively, the charge trapping in (i) defect energy states or (ii) float gates.

5.1 Charge trapping in defect levels

The ultrathin nature makes 2D semiconductors highly suitable as the readout channel in memory, as their conductance can be modulated greatly by slight charge trapping, including by the inherent trap states in devices. In literatures, the prepared MoS₂ often exhibits midgap trap states [54], and the device also suffers from interface defect states, e.g., at the interface with SiO₂ [55], which may capture some charges under gate modulation by the shifted Fermi level E_F (the trap states below E_F are prone to be filled with electrons, while those states above E_F tend to be empty). This usually results in large hysteresis in field-effect devices and different conduction states after positive and negative gate stress. However, the limited density of trap states restricted the on–off switch in memory. Lee et al. reported an improved device by introducing localized electronic states in MoS₂ using tailored SiO₂ substrate with functional silanol groups (Si-OH)(Figure 6a) [56], which exhibit strong polar interaction and causes local potential fluctuation in energy band. The device is composed of thin MoS₂ layer on SiO₂ substrate, using the back-Si as the gate. The conduction state is reset by using positive gate bias (80 V) and then programmed using light exposure under gate bias (20 V). Applying V_G = 80 V fills the traps with electrons, resulting in OFFstates of channel when removing V_G, while light exposure releases the trapped electrons by generating electron–hole pairs that promote the charge release. The device manifested highly linear readout charges programmed by light exposure time. However, since the trapped charges can be thermally activated to conduction/valanced band for trapped electrons/holes, the programmed states exhibit transient change of conduction states after initial program (Figure 6b), and the charge readout is slow ~seconds.

Figure 6.

2D optoelectronic memories. (a) Schematic of a 2D memory based on MoS₂ on tailored SiO₂ surface and (b) the light exposure time programmed memory states in the device, reproduced with permission from Ref. [56], Copyright 2017 Nature Publishing Group. (c) An infrared memory based on vdW heterostructure of PbS/MoS₂ and (d) the schematic of its band alignment, reproduced with permission from Ref. [57], Copyright 2018 Science. (e) The schematic and optical image (inset) of an optoelectronic memory based on WSe₂ on h-BN, (f) shows the device conductance change during electrical erase and optical program, reproduced with permission from Ref. [58], Copyright 2018 Nature Publishing Group.

The above optoelectronic memory works under visible light excitation due to the bandgap limit of MoS₂. Wang et al. reported an infrared memory using the vdW heterostructure of MoS₂/PbS [57], which is sensitive to 1550 nm radiation with the sensitization of narrow bandgap PbS thin flakes epitaxially grown on MoS₂ (as illustrated in Figure 6c). The charge trapping is based on the electron injection into MoS₂ by the generation of large amount of photoexcited electrons in PbS under light illumination, as indicated by the energy band diagram shown in Figure 6d. However, the device exhibits low resistance change by light exposure and transient conductance variation after program, due to the eventual recombination of electron–hole pairs in dark, which drive carrier distribution to equilibrium. Also, the program speed is directly determined by photon energy and the overall incident power, as the former governs the energy of photoexcited carriers (whether it is sufficient to overcome the interfacial potential barrier to be injected into the other side) and the latter determines the number of excited carriers. Alternatively, the charge trapping in defect states in dielectric materials tends to exhibit long retention time. Xiang et al. constructed a nonvolatile memory using WSe₂ transferred on insulate h-BN layer (Figure 6e) [58]. The inherent defect states in h-BN are able to trap photoexcited carriers in WSe₂, therefore enabling optoelectronic memory operation. The memory is operated under the simultaneous light exposure and gate bias, thus to force the charge trapping into the midgap states of h-BN. Because of the large bandgap of h-BN, the trapped charges can hardly move, and the resulted memory exhibits long-term retention characteristics for more than 10⁴ s. Such optoelectronic memory can be feasibly transformed into multi-bit memory, by using either the amplitude of gate bias or the light irradiation power, wavelength, and pulse number as the input (Figure 6f). However, slight temporal change of conductance is still observed due to the recombination of photogenerated electron–hole pairs in WSe₂ itself. Nevertheless, the strategy has been exploited to develop artificial optoelectronic synapses, the overall weight of which is less sensitive to the single-unit device but to the average of multiple connections [59].

5.2 Float gate heterostructures

Instead of charge trapping in random trap states, float gate structure exhibits well-described charge trapping characteristics and long-term retention characteristics [60]. The charge trapping can also be triggered by light irradiation to the light sensing semiconductor channel or float gate. Using 2D materials, the float gate structure can be assembled by h-BN as the insulate barrier and 2D semiconductors as the channel.

Figure 7a displays the initial 2D float memory based on graphene and MoS₂ separated by h-BN [61]. The device usually has the structure of a field-effect transistor but with an additional float gate inserted between the source-drain channel and the control gate. The memory behavior of the device by using MoS₂ as the channel and graphene as the float gate is shown in Figure 7b. The charge trapping is based on the quantum tunneling under gate bias, which induces FN tunneling by lowering the effective tunneling barrier with trigonal potential profile in the insulate h-BN layer. Alternatively using graphene as the channel results in low on–off ratio due to the zero-bandgap nature of graphene, by what the graphene channel can hardly be turned off. Notably, the thickness of h-BN is critical for the float memory, as too thin h-BN results in direct tunneling loss of charges and poor retention behavior, while too thick h-BN is good for retention but requires high operation voltages. The optimal thickness of h-BN is ~6–10 nm. The thin thickness of h-BN enables efficient tunneling of channel conductance by the float gate potential, as indicated in the inset of Figure 7b. Instead of graphene and MoS₂, many other 2D semiconductors have been explored for the float memory, including WSe₂, ReS₂, BP, etc. [63, 64, 65, 66]. They all displayed high on–off ratio up to 10⁷, which is likely to benefit multi-bit storage.

Figure 7.

Several representative 2D float gate heterostructures. (a) The schematic configuration of a float gate memory based on MoS₂/h-BN/graphene (b) shows the hysteresis memory behavior using back-Si gate, and the inset depicts the MoS₂ conductance modulated by float gate potential, reproduced with permission from Ref. [61], Copyright 2013 Nature Publishing Group. (c) Schematic of the semi-float gate device base on graphene/h-BN/WSe₂ heterostructure for the formation of lateral diode and (d) its IV characteristic showing rectification behavior by the formation of p-n junction, reproduced with permission from Ref. [62], Copyright 2017 Nature Publishing Group. (e) A two-terminal optoelectronic memory based on vdW heterostructure of MoS₂/h-BN/graphene (f) displays its IV characteristics in dark and light illumination, showing the light programmed on and off states under positive bias, and the memory states are electrically erased using large negative bias, reproduced with permission from Ref. [20], Copyright 2017 Wiley-VCH.

Because of the excellent tunability of charges in 2D channel, the float gate structure has been reformed into semi-float and two-terminal structures. Figure 7c shows a semi-float gate device with WSe₂ as the channel [62], in which the graphene as float gate spans half of the channel. Thus, the charge trapping in graphene only modulates the carrier concentration in partially the overlapped region. Taking advantage of the ambipolar characteristic of WSe₂, the gate region can be tuned either p- or n-doped, forming the lateral pn diodes or Schottky diodes with apparent rectification behavior (Figure 7d). A special advantage of such device is their reconfigurable device behavior on demand. The device structure can be further simplified into two-terminal structures by removing the control gate, which usually is the back-Si gate [20]. Figure 7e displays a schematic structure of such two-terminal float memory. The charge tunneling can be realized by applying enough source-drain bias as indicated in Figure 7f. Because of the nonuniform electric field in channel, the potential drop between drain and float gate is sufficient to induce charge injection into float gate. After applying negative V_ds, electrons are injected into graphene, resulting in off state when reading at V_ds > 0. However, shining light to the device releases the trapped charges and recovers the initial state. Thus, the memory can be electrically erased and programmed by light exposure. Due to the absorption limit of MoS₂, the device is only programmable with wavelengths <650 nm. By controlling the light dose with power and duration, the device manifests 18 states, rendering potential application for multi-bit purposes. However, an essential drawback of such two-terminal device is the high power consumption during electrical erase, as high source-drain current is present compared to the negligible leakage current via gate coupling.

The various heterostructures by versatile 2D stacking have enabled the blossom of 2D optoelectronic devices. There is also an emerging of optoelectronic programmed logic elements using the flexible gate coupling in ultrathin thickness [67]. The pathway toward multifunctional 2D devices seems very promising to stimulate indispensable applications based on continuously expanding family of 2D materials.

6. Conclusions

As a summary, in this chapter, we have introduced various types of 2D heterostructures for both photodetection and optoelectronic memory, both of which extensively take advantage of the feasible field-effect modulation to the optoelectronic properties of 2D materials. In the past few years, we have witnessed the marvelous revolution of design and construction of functional devices using diverse 2D materials and feasible vdW stacking methods. The progress will undoubtedly continue given the remarkable flexibility of stacking 2D material in atomic thickness, which had been extremely challenging for 3D materials. However, one shall expect critical breakthroughs are necessary before their practical applications, especially in the large-scale fabrication of vdW devices, and the development of indispensable functions compared to the existing ones in consumer markets.

Acknowledgments

This work was supported by National Natural Science Foundation of China (Grant No. 61804059).

Conflict of interest

The authors declare no conflict of interest.