Open access peer-reviewed chapter

Porous Low-Dielectric-Constant Material for Semiconductor Microelectronics

Written By

Yi-Lung Cheng and Chih-Yen Lee

Submitted: August 29th, 2018 Reviewed: September 18th, 2018 Published: December 31st, 2018

DOI: 10.5772/intechopen.81577

From the Edited Volume

Nanofluid Flow in Porous Media

Edited by Mohsen Sheikholeslami Kandelousi, Sadia Ameen, M. Shaheer Akhtar and Hyung-Shik Shin

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To provide high speed, low dynamic power dissipation, and low cross-talk noise for microelectronic circuits, low-dielectric-constant (low-k) materials are required as the inter- and intra-level dielectric (ILD) insulator of the back-end-of-line interconnects. Porous low-k materials have low-polarizability chemical compositions and the introducing porosity in the film. Integration of porous low-k materials into microelectronic circuits, however, poses a number of challenges because the composition and porosity affected the resistance to damage during integration processing and reduced the mechanical strength, thereby degrading the properties and reliability. These issues arising from porous low-k materials are the subject of the present chapter.


  • porous low-k
  • porosity
  • Cu interconnects
  • BEOL
  • integration
  • plasma damage
  • Cu drift
  • TDDB
  • reliability

1. Introduction

To obtain a high operation performance and to pack more chips in microelectronics, the semiconductor industry spent a lot of efforts to accomplish successful integration of the integrated circuits (ICs). As the dimensions of the device are continuously shrinking with the advance of technology node, the carrier’s transit time across the length of a transistor channel (called gate delay) decreases, while the signal propagation through the interconnects [called resistance-capacitance (RC) delay] increases, as shown in Figure 1. As a result, the effective speed of the device is limited by the RC delay since 0.25 μm technology node [2, 3, 4]. The RC delay can be reduced by using metals with low resistivity and dielectric materials with low dielectric constant (k). Therefore, copper (Cu) and low-dielectric-constant (low-k) materials have been introduced in back-end-of-line (BEOL) interconnects of ICs to replace the conventional Al/SiO2 interconnects [4, 5, 6, 7]. Cu with a resistivity of 1.7 μΩ-cm (2.7 μΩ-cm for Al) is becoming the common metallization material. Low-k materials with k values lower than 4.0 (k value of SiO2) provide lower capacitance between wires. To effectively reduce the k value of a dielectric film, low-polar bonds and porosity are introduced into the film. The produced dielectric materials are called porous low-k materials [8, 9, 10]. To provide a further low-k value, more porosity is introduced into the low-k material; however, more integration challenges arise.

Figure 1.

Gate and interconnect delay with technological generation (International Technology Roadmap for Semiconductors [1]).

This chapter is an attempt to provide an overview of porous low-k materials. The resulting issues and reliability during the integration of porous low-k material in Cu interconnects are discussed.


2. Low-k dielectric materials and deposition method

2.1 Low-k dielectric materials

The dielectric constant (k) of a dielectric material is generally described by Clausius-Mossotti Eq. (1):


where k = ε/ε0, ε, and ε0 are the permittivity of the material and vacuum, N is the number of molecules per unit volume (density), and α is the total polarizability, including electronic (αe), distortion (αd), and orientation (αo) polarizabilities. According to Eq. (1), decreasing the total polarizability (α) and/or density (N) is the feasible method to effectively reduce the k value of a dielectric material. Reducing the polarizability can be achieved by the use of low-polar bonds (like C-C, C-H, Si-F, Si-CH3, etc.). Based on the used type of the low-polar bond, the produced low-k dielectric material can be divided into two types: One type is organic polymer that contains saturated and unsaturated and conjugated and aromatic hydrocarbons [11]. However, this type low-k dielectric material is thermally unstable and has poor mechanical strength and relatively high coefficient of thermal expansion (CTE). As a result, the successful integration into the BEOL interconnects is still not achieved.

The other type is hybrid silica-based low-k dielectric material, which is the mainstream inter-layer-dielectric (ILD) insulator used in BEOL interconnects. This type of low-k dielectric material can be produced by doping fluorine or/and carbon into the traditional SiO2 film. The formation of low-k dielectric materials are fluorinated silicon glass (FSG) [11, 12] or carbon-doped silicon glass [SiCOH or called organosilicate glass (OSG)] [11, 13]. Fluorine or carbon substitution lowers the k value by decreasing the polarizability and increasing the free volume.

The minimum k value of the hybrid silica-based low-k dielectric material is limited to be 2.6–2.7. To prevent a huge increase in the parasitic capacitance of BEOL interconnects in the 45 nm or below technology nodes, a new low-k dielectric material with k value less than 2.6 is required. The air has a minimum k value of ∼1.0 in the world; as a result, the introduction of air pores in the existing low-k dielectric film is the possible strategy to further reduce the k value. The produced low-k dielectrics are porous, which are called “porous low-k dielectrics” [14, 15]. The k value of porous low-k dielectrics depends on the porosity and dielectric constant of the film skeleton (k2) [16]:


where k1 is the dielectric constant of the material inside the pores and V is the average pore volume. The first term in the right side of Eq. (2) equals to zero if the air is inside the pore (k1∼1.0). As a result, porous low-k dielectrics with relatively small k2 value and higher porosity can provide much lower k value. Currently, porous low-k dielectrics have been successfully integrated into Cu interconnects since 45 nm technology node. The widely used method to produce the porous low-k dielectrics is co-deposition of a silica-like matrix together with a sacrificial organic polymer (porogen) using plasma-enhanced chemical vapor deposition (PECVD). Following, the sacrificial organic polymer in the deposited low-k dielectric material is removed by ultraviolet (UV)-assisted thermal curing at a temperature range of 300–450°C in order to form the pores in the film. The precise composition and porosity depend on the type of precursor molecules, the matrix/porogen ratio used during deposition, and the curing conditions [17, 18].

2.2 Deposition method for porous low-k materials

Porous low-k dielectric materials can be produced by either spin-on technology or chemical vapor deposition (CVD) method [14, 15, 17, 18, 19, 20]. In the CVD method, the deposition rate of CVD method is strongly dependent of the deposition temperature. To obtain a suitable deposition rate, increasing the deposition temperature is required to deposit the porous low-k dielectric material. However, the temperature of BEOL interconnects is limited to be less than 450°C because of melting concern for metal conductors. With an assistant of plasma technology, the deposition precursors are dissociated to form the active radicals under the electron collision in the cold plasma. The generated active radicals with high reactivity accelerate the deposition process, thus reducing the deposition temperature.

2.2.1 Spin-on technology

Spin-on technology has been used in semiconductor processing for photoresist coating. It can also use to deposit the low-k dielectric material. The used dispensing liquid contains the deposition precursors for low-k materials, which is dropping into the center of the substrate. The created centrifugal forces by rotating of the substrate help to distribute the material on the surface. After the spinning step, a heating (or bake) is required to remove solvent. The temperature is typically below 250°C. Finally, a curing at temperatures varying from 350 to 600°C is required to obtain a stable film.

There are two methods to introduce the porosity into the film to produce porous low-k dielectric materials by spin-on technology. One is through sol–gel process, and the other is formed through the use of sacrificial particles (porogens) that are desorbed during the curing process. In the sol–gel process, the formation of subtractive porosity can be achieved by two approaches: the aging process and the hierarchical organization of the primary particles in the sol (self-assembly) [21, 22]. The other method is the use of sacrificial porogens, in which molecular or supramolecular particles are added in the low-k dielectric precursor with the purpose of tailoring the thermal stability. In the final curing process, these added molecular particles are removed by pyrolysis effect. The detailed description about spin-on technology to form porous low-k materials can be found elsewhere [23].

2.2.2 PECVD technology

PECVD is a complex process, involving a wide variety of scientific and technical principles, including gas-phase reaction chemistry, thermodynamics, heat and material transfer, fluid mechanics, surface and plasma reactions, thin film growth mechanism, and reactors engineering. During the deposition process, the active intermediates and structural units are formed in the gas phase and then absorbed in the solid substrate. Finally, they migrate and react to form the matrix of the growing layer [11].

In the current semiconductor industry, the production of the porous low-k dielectric material is relied on PECVD technology because the formation material is more thermally stable and the k value can be lower than 2.0. The subtractive porosity approach is the widely accepted method. In this method, a low-k (generally is SiCOH) skeleton precursor mixed with a porogen precursor is introduced into the reactor during the deposition. After the deposition, a dual-phase SiCOH-CHx material is formed after the deposition. Tetramethylcyclotetrasiloxane (TMCTS), octamethylcyclotetrasiloxane (OMCTS), decamethylcyclopentasiloxane (DMCPS), and diethoxymethylsilane (DEMS) are the widely used skeleton precursors [24, 25, 26, 27]. These skeleton precursors have a common property with a sufficiently low dissociation level under rf power in order to keep the sufficient hardness for the produced porous low-k dielectric material. The porogen precursor is organic molecule with sufficient volatility. Unsaturated cyclic hydrocarbons like terpinenes or norbornenes, linear alkenes, or molecules with strained rings like cycloalkene oxides or butadiene monoxide are the commonly used porogen precursors [11, 28].

Following, it is necessary to remove the labile organic fraction CxHy from the as-deposited SiCOH-CxHy film to form pores in the film. Thermal annealing, electron beam, or ultraviolet (UV) irradiation methods are provided to remove the labile organic fraction CxHy [29, 30, 31]. To reach better removal efficiency, it can be done by UV-assisted curing. However, the temperature of the curing has to be limited at ∼400°C. The mechanical strength (elastic modulus and hardness) of the porous low-k dielectric material can also be improved by UV-assisted curing because the UV curing can rearrange and enhance the cross-linking of the skeleton of the low-k material by breaking a fraction of mainly the Si-CH3 (Si-Me) bonds. The improvement effect is associated to the used wavelength, temperature, and time of the UV curing [32, 33].

Currently, a promising method to deposition of the porous low-k dielectric film is using a single precursor molecule consisting of skeleton with embedded (or grafted) porogen precursor. An example of such a porous SiCOH material is Applied Materials’ Black Diamond 3 (BD3) dielectric film. The UV curing is also modified to create more uniform porosity and improve the mechanical properties [8, 33].

2.3 Characterizations of porous low-k dielectric materials

In order to successfully integrate the porous low-k dielectric material into Cu interconnects, their physical, chemical, mechanical, and electric properties are important consideration factors. Table 1 lists the main characterization techniques for porous low-k dielectric materials. Detailed principles and operation procedures can be found elsewhere [34, 35].

Table 1.

Characterization techniques for porous low-k dielectric materials.

Table 2 lists the main properties of porous low-k dielectric materials and compares to other generations of ILD materials (including SiO2, FSG, and OSG) [36, 37, 38]. In addition to providing a lower k value, porous low-k dielectric materials possess the degrading material properties. The degradation is more pronounced with increasing porosity (for the reduction of k value) for porous low-k dielectric materials. Therefore, the use of porous low-k dielectric materials in the ICs is becoming more challenging.

Table 2.

Properties of various dielectric materials.


3. Integration of porous low-k dielectric materials in Cu interconnects

As Cu metallization replaced Al metallization in BEOL interconnects, the fabrication process was also switched to damascene approach from metal etching approach because the Cu etching formation compounds are hardly volatile at low temperature or the etch rate is relatively slow [39]. In the damascene pattering process, a dielectric is firstly etched, and then a Cu metallization is filled and polished. To prevent Cu diffusion and improve the adhesion with the dielectric layer, a barrier is required to surround the Cu wire [40, 41].

Dual-damascene patterning process is widely used to fabricate BEOL interconnects. In this method, both trench and via are patterned in a dielectric film simultaneously, and Cu metallization is filled into both trench and via. Compared to single-damascene patterning process, this method can reduce the processing step of Cu metallization. According to the order of via and trench pattering, dual-damascene patterning process has two types: “Via first” and “Trench first” processes [42, 43]. Generally, “Via first” dual-damascene process is widely used, plotted in Figure 2.

Figure 2.

Via first dual-damascene patterning process: (A) Dielectrics (SiN/SiCN, SiCOH, SiO2) deposition. (B) Via-1 lithography and RIE. (C) ARC plug. (D) M-2 trench lithography and RIE. (E) Etching stop layer opening. (F) Metal barrier and Cu seed deposition. (G) Electroplating Cu deposition. (H) Cu CMP.

During the fabrication of BEOL interconnects, the used porous low-k dielectric material as an interconnecting insulator undergoes dielectric deposition, photoresist, etching, stripping, Cu metallization deposition, and chemical mechanical polishing (CMP) processes. Plasma damage, moisture/chemicals adsorption, Cu diffusion, and mechanical stress occurred on the porous low-k dielectric materials. These issues would reduce the electrical characteristics and reliability of the porous low-k dielectric materials. The mechanism and the resulting effect will be discussed in the following section.

In order to reduce the plasma-induced damage and pattern small features, the metal hardmask method and the multilayer resist method, as plotted in Figures 3 and 4, respectively, are proposed since 32 nm technology node [44, 45, 46]. In the metal hardmask process, the resist is stripped prior to the trench and via etching into the porous low-k ILD; therefore, resist-stripping process-induced damage can be minimal. However, the polymer may remain on the sidewalls of the trenches during the trench etching step. The remaining polymer must be removed without damaging the porous low-k dielectric material. Additionally, the stress in the metal layer must be minimized to avoid pattern deformation after the etching process. Metal residues can form on the etched surfaces and block etching of the porous low-k dielectric material.

Figure 3.

Metal hardmask dual-damascene patterning process: (A) TiN, ARC, and resist deposition. (B) M-2 metal hardmask RIE. (C) M-2 trench lithography. (D) Via-1 lithography. (E) Via-1 RIE. (F) M-2 oxide hardmask RIE. (G) M-2/Via-1 RIE and M-1 capping layer RIE. (H) M-2/Via-1 Cu metallization.

Figure 4.

Multilayer resist dual-damascene process: (A) ARC and resist coating. (B) Via-1 lithography. (C) Via-1 RIE. (D) Multilayer resist coating and M-2 trench lithography. (E) LTO and OPL RIE. (F) M-2 trench RIE. (G) OPL strip and M-1 capping layer RIE. (H) M-2/Via-1 Cu metallization.

In the advanced technology nodes, the multilayer resist method is preferred because it has an advantage to pattern small features. However, the porous low-k dielectric material is fully exposed to the resist strips. In order to avoid plasma-induced damage on the porous low-k dielectric material, low-plasma-damage resist-stripping process is required for the multilayer resist method.


4. Electrical and reliability characteristics of porous low-k dielectric materials

As porous low-k dielectric materials are used in the BEOL interconnects, the change in the k value during the integration must be minimal. Additionally, the electrical properties and reliability are the most important concerns. As a result, the leakage current of the porous low-k dielectric between metal lines should be maintained low. The time-dependent dielectric breakdown (TDDB) failure time of the integrated BEOL structure at operating conditions should meet the specifications.

4.1 Conduction mechanisms in porous low-k dielectrics

In a crystalline solid, as the electrons overcome the bandgap (or called energy gap), the resulting current is detected. The bandgap is defined as the difference between the energy of the lowest conduction band and that of the highest valence band. For thermally deposited SiO2 dielectric film, the bandgap is around 8.9 eV [47]. As carbon is doped into SiO2 dielectric film to form SiOCH low-k dielectric material, the bandgap was determined to be between 8.0 and 10.0 eV, depending on the low-k dielectric types and the characterization techniques [48, 49, 50]. If the carbon content in the low-k dielectric film is not incorporated in the matrix network but primarily exists as terminal methyl groups, its bandgap is similar to that of SiO2 film. However, if the carbon content is present in the network bonds by forming Si-C-Si bridging structure, the bandgap value would drop dramatically. As porosity is introduced into the SiOCH low-k dielectric material, the bandgap of porous SiOCH low-k dielectrics (k = 2.0–3.3) is in the range between 7.5 and 10 eV [51]. The effect of porosity on the bandgap of porous SiOCH low-k dielectrics is not pronounced. More investigation about bandgap determination for porous low-k dielectric materials is required.

The conduction mechanisms of low-k dielectric materials are commonly described by Schottky emission (SE), Poole-Frenkel (PF) emission, and Fowler-Nordheim (FN) tunneling [52, 53, 54], as shown in the following Eqs. (3)(5):

  • Schottky emission (SE)


  • Poole-Frenkel (PF) emission


  • Fowler-Nordheim (FN) tunneling


where J is current density, A* is Richardson constant, T is temperature, q is the elementary charge, φ is barrier height, E is electric field, εo is permittivity of free space, εr is dielectric constant, m* is effective electron mass, and h is Planck’s constant.

SE and PF emissions are field-enhanced thermal excitation conduction models. The excited electrons enter the conduction band from the low-k interface and the trap states with coulomb potentials for SE and PF emissions, respectively. FN tunneling conduction is caused by electrons tunneling from the metal Fermi energy or trapping sites in the material itself into the low-k dielectric conduction band. SE and PF emission currents are associated with the field and temperature. The former exhibits a strong temperature dependency. However, FN tunneling current exhibits a strong field dependency and is independent of temperature. Generally, PF emission is more likely the dominant conduction mechanism in low-k dielectric materials, especially at low fields. At high field, the dominant conduction mechanism transfers to FN tunneling [55, 56].

In the integrated interconnects, the barrier height at both the low-k/metal and the low-k/Si interfaces is around 4 eV, and the barrier height at the etching-stop layer/metal interface is less than 2.0 eV [57]. Therefore, the interface-controlled SE emission occurs.

4.2 Reliability of porous low-k dielectric materials

The breakdown field and TDDB failure time are the main reliability items for a dielectric material [58, 59]. Figure 5 plots the relatively breakdown field of various dielectric materials used as BEOL ILDs. Compared to other dielectric materials, the porous low-k dielectrics have relatively weak breakdown field, and the decreasing magnitude is amplified with increasing the porosity [60]. The pores in the porous low-k dielectrics are treated as defective cells, shortening the percolation path. Additionally, porous low-k dielectrics have weaker bonds, higher trap densities, or lower barrier heights at the metal–insulator interface.

Figure 5.

Relative breakdown field of various dielectric films.

TDDB testing is performed by applying an electric stress on a tested dielectric material for a period of time. The stressing field is lower than the breakdown field of the tested dielectric material. The leakage current is monitored with the stressing time. During the electric stress, electric damage occurs in a dielectric material, converting the resistance state of a dielectric material from high to low. This leads to the loss of the insulating properties for a dielectric material. As a conducting path between a dielectric is formed, the leakage sharply increases. Therefore, the dielectric breakdown occurs. This stressing time is defined as the breakdown time of a dielectric material.

TDDB is strongly related to the property of a tested dielectric film and the applied electric field. As a result, as the technology node advances to 45 nm or below technology nodes, TDBB is becoming a critical reliability issue. In addition to using porous low-k dielectrics with a lower breakdown field, the interconnect dimensions are reduced which increases the lateral electric field across the BEOL dielectric. However, in real Cu damascene interconnects, the integration performance strongly dominates TDDB results. The interface of Cu/capping layer, line-edge-roughness line-to-line overlay errors, and via-to-line misalignment are the dominated TDDB failure mechanisms [61, 62, 63, 64, 65].

Typically, TDDB testing is done at high fields (voltages) to accelerate the test. To predict lifetime from high voltage/field conditions to operating conditions, TDDB lifetime model is required and critical for prediction. The commonly used TDDB lifetime models are summarized in Table 3 [66, 67, 68]. Each TDDB lifetime model has its theoretical fundamentals, but cannot explain all observed TDDB phenomenon. Moreover, for the choice of TDDB lifetime model, it is necessary to consider that the breakdown mechanism under testing conditions is also the dominant mechanism under operating conditions.

Table 3.

TDDB lifetime models for dielectric materials.

In these used TDDB lifetime models, E, 1/E, and power-law models are field-driven models, while E1/2 model is a current-driven model. Moreover, E model is the most conservative model because it gives the shortest dielectric lifetime in the lower-field conditions, and 1/E model is the optimistic model providing the longest predicted lifetime. The E1/2 mode is widely accepted TDDB lifetime model for porous low-k dielectrics.


5. Integration issues of porous low-k dielectric materials

During the integration of porous low-k dielectrics into Cu interconnects, the fabricating processes can seriously degrade material properties, electrical characteristics, and reliability. Moreover, the porosity can act as a fast penetration media for reactive species or contamination during the integration, accelerating degradations.

The main key issues associated with porous low-k dielectrics are schematically shown in Figure 6. The key issues will be discussed and the improvement actions will be provided in this section.

Figure 6.

Main integration issues of porous low-k dielectrics in BEOL interconnects.

5.1 Plasma-induced damage

Plasma is an aggressive medium which produces vacuum ultraviolet (VUV) and ultraviolet (UV) photons, energetic ions, electrons, and highly reactive radicals [69]. Exposure to plasma causes physical damage and chemical modifications on porous low-k dielectric materials [70, 71]. Under plasma irradiation, Si-CH3 and Si-H groups in the porous SiCOH low-k dielectric material are extracted from the network and then converted into the Si-O or Si-OH groups, leading to densification and k-value increase. Moreover, plasma-induced damage makes porous low-k dielectric materials hydrophilic from hydrophobic, facilitating moisture uptake.

Plasma-induced damage on the porous low-k dielectric materials depends on the porosity, the used plasma reactors, power, and gas [72, 73, 74, 75, 76]. Therefore, for porous low-k dielectric materials that are irradiated under a plasma with higher density, inductively coupling plasma (ICP) reactor, or O2 plasma, more damage on low-k dielectrics is expected.

To minimize the plasma-induced damage on the porous low-k dielectric materials, H2-based plasma in remote-plasma (RP) system is an alternative for resist-stripping process. [77, 78, 79, 80, 81]. Figure 7(a) and (b) exhibits the breakdown field and TDDB failure time (TTF) of the porous low-k dielectric film after H2/He plasma treatment [80, 81]. For porous low-k dielectric films operated in RP system, a higher breakdown field and a longer TTF were observed as compared to those operated in capacitance coupling plasma (CCP) system. In the RP system, neither deep UV light radiation nor ion bombardment is acted on the porous low-k dielectric film, mitigating plasma-induced damage. Additionally, the trends of temperature dependence of reliability characteristics are different for H2/He plasma treatments in the CCP and RP systems. The breakdown field and TTF of H2/He plasma-treated porous low-k dielectric film in CCP system decrease, while those in CCP system improve with increasing of the operation temperature. Moreover, as the operation temperature of H2/He plasma treatment in RP system is increased to 350°C, the plasma-treated porous low-k dielectric films have better reliability than the pristine samples. The improvement mechanism is attributed to the removal of carbon-based porogen residues from the porous low-k dielectric film by H2/He plasma treatment at 350°C [82].

Figure 7.

(a) Breakdown field. (b) Time-to-fail of H2/He plasma-treated porous low-k dielectric films operated in CCP and RP systems as a function of operation temperature [81].

The dielectric property of the plasma-damaged low-k dielectrics can be recovered by applying silylation agents such as hexamethyldisilazane (HMDS), trimethylchlorosilane (TMCS), and dichlorodimethylsilane (DMDCS), depositing hydrophobic agents from hydrocarbon plasma and using a thermal treatment to eliminate the adsorbed hydroxyl (OH) groups and the physisorbed water [83, 84, 85, 86].

5.2 Moisture uptake

During the integration processing, the porous low-k dielectric films are damaged and are transferred to be hydrophilic. The hydrophilic surface tends to uptake moisture in subsequent process steps. Due to a high k value of water (∼80), only a small amount of moisture adsorption in the low-k dielectric film increases the effective k value significantly [87]. As the porosity increases in the porous low-k dielectric film, the pores connect each other to form “open pores,” which serve as the fast diffusion path for moisture. The adsorbed moisture degrades reliability performance of porous low-k dielectric films, as shown in Figure 8 [88]. The TDDB failure time is reduced by a factor of approximately 10 for the moisture-uptake low-k dielectric film and slightly decreases as the moisture immersion time increases. An annealing step is demonstrated to remove moisture and improve the film reliability, as also presented in Figure 8. However, even with thermal annealing at 400 C for 1 h, TDDB performance was only partially restored, being poorer than that of the fresh sample.

Figure 8.

Cumulative probability of TDDB failure times of porous low-k dielectric films as functions of the moisture immersion time [88].

As the moisture is adsorbed in the low-k dielectric film, there are two types: physisorbed and chemisorbed moisture [89]. The physisorbed moisture starts to be desorbed at 190°C. After the 400°C annealing, most physically adsorbed moisture is desorbed. The chemisorbed moisture has the higher bonding energy; thus, it can be desorbed by a thermal annealing with the temperature above 600°C. As a result, the temperature of annealing is required to be elevated to 600–1000°C in order to remove the adsorbed water from porous low-k dielectric films. However, this temperature is not suitable to use in the BEOL interconnects because porous low-k dielectric films become unstable at temperature above 600°C.

To reach a better recovery for moisturized low-k dielectric films, a combination of UV curing and silylation process has been provided. UV curing and silylation processes can be done in the same chamber to save the processing step. The UV-assisted restoration is performed at elevated temperatures using a gaseous hydrocarbon in the curing ambient. The efficiency of recovery can be optimized with the process parameters, including UV wavelength and intensity, substrate temperature, UV curing time, chamber pressure, and reactant gas mixture [90, 91].

5.3 Cu drift

Due to a high diffusivity, Cu is easily oxidized to Cu mobile ion and then diffuses into ILDs under thermal and/or electrical bias [92, 93]. The diffused Cu ions could generate shallow energy levels in the bandgap of the porous low-k dielectric film [94]. These generated states act as defect centers, facilitating PF type conduction. Additionally, the penetration of Cu atoms or ions contributes to field enhancement locally inside the dielectric or at the electrode of electron injection [95]. These effects result in the significant degradation in the electric characteristics and reliability for the porous low-k dielectric films.

To prevent or minimize the diffusion of Cu ions and Cu barriers, including metal and dielectric barriers, are required for Cu metallization. Figure 9 plots the Cu ion concentration Nm(T) in the various low-k dielectric films after thermal stress as a function of annealing temperature [96]. The Cu penetration is enhanced at increased temperatures. The larger Cu ion concentration in the porous low-k dielectric film after annealing indicates that the pores in the low-k dielectric film induced the rapid migration of Cu ions. Additionally, the porous low-k dielectric film had the lowest activation energy (0.57 eV) with a value close to those reported elsewhere (0.42–0.60 eV) [97, 98]. The SiCNH capping layers on the low-k dielectric films increased the activation energy to ∼0.81 eV for both dense and porous low-k films, suggesting that the SiCNH capping layer acts as a Cu barrier and prevents possible Cu migration. The use of SiCNH capping layer as a Cu barrier increases the effective k value of BEOL ILD, being a main concern.

Figure 9.

Cu ion concentration in dense and porous low-k SiOCH films with and without capping SiCNH layer after annealing as function of temperature [96].

The deposition of metal barrier can also prevent Cu migration. However, due to a high resistivity of metal barrier, the overall resistivity of the metal line significantly increases in the scaling interconnect pitch. Additionally, barrier metals like tantalum (Ta) deposited by physical vapor deposition penetrate into low-k dielectric in a way similar to Cu, causing low-k dielectric degradation. Moreover, the metal barrier-induced damage increases as the porosity of the low-k dielectric increases [99, 100].

Currently, self-forming barrier [101], atomic layer deposition (ALD) barrier [102], and self-assembled monolayer (SAM) [103, 104] processes are promising methods to prevent metal penetration. However, the integration with the porous low-k dielectric must be controlled precisely to meet all requirements.

5.4 CMP-induced damage

The purpose of chemical mechanical polishing (CMP) is to produce planarization topography by means of both mechanical polishing and chemical reaction. A simultaneous interaction between polishing slurry, a semiconductor wafer, and a polyurethane pad occurred. Thus, the chemical, mechanical, and material properties of the pad, wafer surface, and slurry determine the controllability and quality of CMP process.

In Cu metallization, CMP process is used to remove the excess Cu film and the barrier metal. There are three main steps in Cu CMP process. Firstly, the excess Cu film is polished. Then, as reaching the interface, both metal barrier and Cu film are polished. Finally, to ensure that all metals are removed from the field regions in all parts of the wafer, over-polishing in the last step is necessary. Thus, the used dielectric insulator is polished simultaneously. To reach high degree of planarization and avoid Cu dishing, dielectric erosion, and interface quality degradation (dangling bonds, generation, metal contaminants, and moisture presence), precise control CMP process is required [105, 106].

As the porous low-k dielectric film is used as an interconnecting insulator, peeling, delamination, and cracking may occur under CMP process because it has not enough mechanical strength to survive the large mechanical stress process. Therefore, improving the elastic modulus or hardness of the porous low-k dielectric film is required. Figure 10 shows the change in the hardness of porous low-k dielectric materials as a function of UV curing time [107, 108]. By increasing UV curing time after the porous low-k dielectric film deposition, the hardness (H) can be improved. Moreover, CMP-induced peeling was checked to determine the minimum hardness for integration of the porous low-k dielectric film into BEOL interconnects. At a UV curing time of less than 300 s for the porous low- k dielectric films, peeling was observed. Peeling was worse at shorter UV curing times. As UV curing time is greater than 300 s, the wafer exhibited peeling-free for the porous low-k dielectric films, indicating that the minimum hardness for integration of the porous low-k dielectric film into BEOL interconnects is 1.2 GPa.

Figure 10.

Hardness of porous low-k dielectric materials as a function of UV curing time [107].

The other problem of Cu CMP problem is that the V-shape corners in the porous low-k trenches are formed due to the higher mechanical force. This would become a potential critical path for porous low-k dielectric breakdown owing to field enhancement along the CMP interface.


6. Conclusions

To improve the performance of ICs, porous low-k dielectric materials have been used as an interconnecting insulator for providing lower parasitic capacitance between the wires to reduce RC time delay. Porous low-k dielectric materials can be achieved by introducing low-polarizability chemical bonds and porosity into the film. During the integration, the semiconductor processing induces damage on the porous low-k dielectric material, making the dielectric material densification hydrophilic, facilitating moisture uptake, and inducing Cu and barrier metal penetration. These lead to k value increase and reliability degradation for the porous low-k dielectric material. Moreover, high porosity and large pore size in the porous low-k dielectric materials make them sensitive to integration-induced damages. Moreover, porosity in the low-k dielectric material weakens the hardness and enhances the local field of the film, resulting in CMP damage and reliability challenges. Therefore, in order to achieve a successful implementation of advanced porous low-k dielectric films in the future BEOL interconnects, optimization and innovation of material science and integration processing are needed.


  1. 1. The International Technology Roadmap for Semiconductor; ITRS 1997
  2. 2. Thompson SE, Parthasarathy S. Moore’s law: The future of Si microelectronics. Materials Today. 2006;9:20-25
  3. 3. Isaac RD. The future of CMOS technology. IBM Journal of Research and Development. 2000;44:369-378
  4. 4. Bohr M. MOS transistors: Scaling and performance trends. Semiconductor International. 1995;18(6):75-80
  5. 5. Dixit GA, Havemann RH. Overview of Interconnect—Copper and Low-k Integration, Handbook of Semiconductor Manufacturing Technology. 2nd ed. NY: CRC Press; 2008. (Chapter 2)
  6. 6. Jeffery G. Process Technology for Copper Interconnects, Handbook of Thin Film Deposition. 3rd ed. William Andrew; 2012. pp. 221-269
  7. 7. Havemann RH, Hutchby JA. High-performance interconnects: An integration overview. Proceedings of the IEEE. 2001;89:586-601
  8. 8. Grill A, Gates SM, Ryan TE, Nguyen SV, Priyadarshini D. Progress in the development and understanding of advanced low k and ultralow k dielectrics for very large-scale integrated interconnects–State of the art. Applied Physics Reviews. 2014;1:011306-011312
  9. 9. Grill A. Porous pSiCOH ultralow-k dielectrics for chip interconnects prepared by PECVD. Annual Review of Materials Research. 2009;39:49-69
  10. 10. Grill A. Plasma enhanced chemical vapor deposited SiCOH dielectrics: From low-k to extreme low-k interconnect materials. Journal of Applied Physics. 2003;93:1785-1790
  11. 11. Maex K, Baklanov MR, Shamiryan D, Iacopi F, Brongersma SH, Yanovitskaya ZS. Low dielectric constant materials for microelectronics. Journal of Applied Physics. 2003;93:8793-8841
  12. 12. Cheng YL, Wang YL, Liu CW, Wu YL, Lo KY, Liu CP, Lan JK. Characterization and reliability of low dielectric constant fluorosilicate glass and silicon rich oxide process for deep sub-micro device application. Thin Solid Films. 2001;398–399:544-548
  13. 13. Shapiro MJ, Nguyen SV, Matsuda T, Dobuzinsky D. CVD of fluorosilicate glass for ULSI applications. Thin Solid Films. 1995;270:503-507
  14. 14. Chang YM, Chang WY, Leu J, Cheng YL. Effect of thermal treatment on physical, electrical properties and reliability of porogen-containing and porogen-free ultralow-k dielectrics. Thin Solid Films. 2013;528:67-71
  15. 15. Broussous L, Berthout G, Rebiscoul D, Rouessac V, Ayral A. Mechanical properties of a plasma-modified porous low-k material. Microelectronic Engineering. 2010;87:466-469
  16. 16. Talebian E, Talebian M. A general review on the derivation of Clausius–Mossotti relation. Optik. 2013;124:2324-2326
  17. 17. Kim CY, Navamathavan R, Lee HS, Woo JK, Hyun MT, Lee KM, et al. Ultraviolet irradiation effect on the properties of leakage current and dielectric break-down plasma damage on low-k dielectric materials 23 of low-dielectric-constant SiOC(H) films using comb capacitor structure. Thin Solid Films. 2011;519:6732-6736
  18. 18. Chapelon LL, Arnal V, Broekaart M, Gosset LG, Vitiello J, Torres J. Porous ultra low k deposited by PECVD: From deposition to material properties. Microelectronic Engineering. 2004;76:1-4
  19. 19. Vanstreels K, Ciofi I, Barbarin Y, Baklanov M. Influence of porosity on dielectric breakdown of ultralow-k dielectrics. Journal of Vacuum Science and Technology B. 2013;31:050604-1-050604-5
  20. 20. Jousseaume V, Zenasni A, Gourhant O, Favennec L, Baklanov MR. In: Baklanov MR, Ho P, Zschech E, editors. Ultra-low-k by CVD: Deposition and Curing. Advanced Interconnects for ULSI Technology. Wiley; 2012. pp. 35-77. (Chapter 2)
  21. 21. Sun Y, Negreira AR, Meersschaut J, Hoflijk I, Vaesen I, Conard T, et al. Optimization and upscaling of spin coating with organosilane monolayer for low-k pore sealing. Microelectronic Engineering. 2017;167:32-36
  22. 22. Aw KC, Salim NT, Gao W, Li Z. Characterization of spin-on-glass very-low-k polymethylsiloxane with copper metallization. Thin Solid Films 2006;504:243-247
  23. 23. Shamiryan D, Abell T, Iacopi F, Maex K, Low-k dielectric materials. Materials Today. 2004;7:34-39
  24. 24. Lubguban J Jr, Rajagopalan T, Mehta N, Lahlouh B, Simon SL, Gangopadhyaya S. Low-k organosilicate films prepared by tetravinyltetramethylcyclotetrasiloxane. Journal of Applied Physics. 2002;92:1033-1038
  25. 25. Gates SM, Neumayer DA, Sherwood MH, Grill A, Wang X, Sankarapandian M. Preparation and structure of porous dielectrics by plasma enhanced chemical vapor deposition. Journal of Applied Physics. 2007;101:094103-1-094103-8
  26. 26. Smirnov E, Ferchichi AK, Huffman C, Baklanov MR. Impact of plasma exposure on organic low-k materials. Proceedings of SPIE. 2010;75217:52107-1-52107-8
  27. 27. Uchida Y, Katoh T, Oikawa M. Characterization of low-k porous silica films incorporated with alkylene groups. Materials Science in Semiconductor Processing. 2002;5:259-264
  28. 28. Ming Z, Beichao Z. Preparation of porous ultra low k films using different sacrificial porogen precursors for 28 nM technological node. Materials Science in Semiconductor Processing. 2015;36:170-178
  29. 29. Chang TC, Tsai TM, Liu PT, Chen CW, Tseng TY. Study on the effect of electron beam curing on low-K porous organosilicate glass (OSG) material. Thin Solid Films. 2004;469–470:383-387
  30. 30. Kemeling N, Matsushita K, Tsuji N, Kagami KI, Kato M, Kaneko S, Sprey H, Roest DD, Kobayashi N. A robust k ∼2.3 SiCOH low-k film formed by porogen removal with UV-cure. Microelectronic Engineering. 2007;84:2575-2581
  31. 31. Dultsev FN, Nekrasov DV. Transformation of porous structure under vacuum ultraviolet irradiation of the films based on silicon dioxide. Thin Solid Films. 2016;603:249-254
  32. 32. Prager L, Marsik P, Wennrich L, Baklanov MR, Naumov S, Pistol L, et al. Effect of pressure on efficiency of UV curing of CVD-derived low-k material at different wavelengths. Microelectronic Engineering. 2008;85:2094-2097
  33. 33. Producer® Black Diamond® PECVD-Applied Materials:
  34. 34. Marsik P, Urbanowicz AM, Verdonck P, Roest DD, Sprey H, Baklanov MR. Effect of ultraviolet curing wavelength on low-k dielectric material properties and plasma damage resistance. Thin Solid Films 2011;519:3619-3626
  35. 35. Pantouvaki M, Huffman C, Zhao L, Heylen N, Ono Y, Nakajima M, Nakatani K, Beyer GP, Baklanov MR. Advanced organic polymer for the aggressive scaling of low-k materials. Japanese Journal of Applied Physics. 2011;50:04DB01-1-04DB01-5
  36. 36. Baklanov MR, Vanhaelemeersch S, Bender H, Maex K. Effects of oxygen and fluorine on the dry etch characteristics of organic low-k dielectrics. Journal of Vacuum Science and Technology B. 1999;17:372-379
  37. 37. Grill A, Neumayer DA. Structure of low dielectric constant to extreme low dielectric constant SiCOH films: Fourier transform infrared spectroscopy characterization. Journal of Applied Physics. 2003;94(10):6697-6707
  38. 38. Chang HL, Kuo CT, Liang MS, Mechanical properties and fracture mechanism of porous SiOCH low-k dielectrics. Microelectron. Eng. 2011;88(7):1623-1627
  39. 39. Havemann RH, Antonelli GA, Arendt GK, Danek M, McKerrow AJ, Weinberg RS. Copper BEOL solutions for advanced memory. Solid-State Technology. 2009;52:10-13
  40. 40. Kim SW. Dielectric barrier, etch stop, and metal capping materials for state of the art and beyond metal interconnects. Journal of Solid State Science and Technology. 2015;4(1):N3029-N3047
  41. 41. Cheng YL, Chiu TJ, Wei BJ, Wang HJ, Wu J, Wang YL. Effect of copper barrier dielectric deposition process on characterization of copper interconnects. Journal of Vacuum Science & Technology B. 2010;28(3):567-572
  42. 42. Kriz J, Angelkort C, Czekalla M, Huth S, Meinhold D, Pohl A, et al. Overview of dual damascene integration schemes in Cu BEOL integration. Microelectronic Engineering. 2008;85:2128-2132
  43. 43. Takei S. Resist poisoning studies of gap fill materials for patterning metal trenches in via-first dual damascene process. Japanese Journal of Applied Physics. 2008;47:8766-8770
  44. 44. Jeffery G. Process technology for copper interconnects. In: Handbook of Thin Film Deposition; 2012. pp. 221-269
  45. 45. Hamioud K, Arnal V, Farcy A, Jousseaume V, Zenasni A, Icard B, et al. 32 nm node BEOL integration with an extreme low-k porous SiOCH dielectric k=2.3. Microelectronic Engineering. 2010;87:316-320
  46. 46. Gambino J, Chen F, He J. Copper interconnect technology for the 32 nm node and beyond. In: IEEE Custom Integrated Circuits Conference Proceedings. PA: Warrendale; 2009. pp. 141-148
  47. 47. Sze SM. Physics of Semiconductor Devices. 2nd ed. New York: Wiley; 1981
  48. 48. King S, French B, Mays E. Detection of defect states in low-k dielectrics using reflection electron energy loss spectroscopy. Journal of Applied Physics. 2013;113:044109
  49. 49. Nichols M, Li W, Pei D, Antonelli G, Lin Q, Banna S, Nishi Y, Shohet J. Measurement of bandgap energies in low-k organosilicates. Journal of Applied Physics. 2014;115:094105-1-094105-4
  50. 50. Wu C, Li Y, Baklanov MR, Croes K. Electrical reliability challenges of advanced low-k dielectrics. ECS Journal of Solid State Science and Technology. 2015;4(1):N3065-N3070
  51. 51. Zheng H, King S, Ryan V, Nishi Y, Shohet J. Bandgap measurements of low-k porous organosilicate dielectrics using vacuum ultraviolet irradiation. Applied Physics Letters. 2014;104:062904
  52. 52. Vilmay M, Roy D, Volpi F, Chaix JM. Characterization of low-k SiOCH dielectric for 45 nm technology and link between the dominant leakage path and the breakdown localization. Microelectronic Engineering. 2008;85:2075-2078
  53. 53. Chen F, Shinosky M. Addressing Cu/low-k dielectric TDDB-reliability challenges for advanced CMOS technologies. IEEE Transactions on Electron Devices. 2009;56(1):2-12
  54. 54. Lloyd JR, Liniger E, Shaw TM. Charge transport model to predict intrinsic reliability for dielectric materials. Journal of Applied Physics. 2005;98:084109
  55. 55. Wu C, Li Y, Barbarin Y, Ciofi I, Croes K, Bӧmmels J, Wolf ID, Tӧkei Zs. Correlation between field dependent electrical conduction and dielectric breakdown in a SiCOH based low-k (k = 2.0) dielectric. Applied Physics Letters. 2013;103:032904
  56. 56. Ogawa ET, Kim J, Haase GS, Mogul HC, McPherson IW. Leakage, breakdown, and TDDB characteristics of porous low-k silica-based interconnect dielectrics. In: IEEE International Reliability Physics Symposium Proceedings; 2003. pp. 166-172
  57. 57. Chen F, Shinosky M. Electrical reliability challenges of advanced low-k dielectrics. Microelectronics Reliability. 2014;54:529
  58. 58. Nichols MT, Sinha H, Wiltbank CA, Antonelli GA, Nishi Y, Shohet JL. Time-dependent dielectric breakdown of plasma-exposed porous organosilicate glass. Applied Physics Letters. 2012;100:112905-1-112905-4
  59. 59. Chen F, Bravo O, Harmon D, Shinosky M, Aitken J. Cu/low-k dielectric TDDB reliability issues for advanced CMOS technologies. Microelectronics and Reliability. 2008;48:1375-1383
  60. 60. Liv J, Gan D, Hu C, Kiene M, Hu PS, Volksen W, et al. Porosity effect on the dielectric constant and thermomechanical properties of organosilicate films. Applied Physics Letters. 2002;81:4180-4182
  61. 61. Noguchi J. Dominant factors in TDDB degradation of Cu interconnects. IEEE Transactions on Electron Devices. 2005;52(8):1743-1750
  62. 62. Ueno K, Kameyama A, Matsumoto A, Iguchi M, Takewaki T, Oshida D, et al. Timedependent dielectric breakdown characterization of 90-and 65-nm-node Cu/SiOC interconnects with via plugs. Japanese Journal of Applied Physics. 2007;46:1444-1451
  63. 63. Tőkei Z, Croes K, Beyer GP. Reliability of copper low-k interconnects. Microelectronic Engineering. 2010;87(3):348-354
  64. 64. Lloyd JR, Murray CE, Ponoth S, Cohen S, Liniger E. The effect of Cu diffusion on the TDDB behavior in a low-k interlevel dielectrics. Microelectronics and Reliability. 2006;46:1643-1647
  65. 65. Yamada Y, Konishi N, Noguchi J, Jimbo T. Influence of CMP slurries and post-CMP cleaning solutions on Cu interconnects and TDDB reliability. Journal of the Electrochemical Society. 2008;155(7):H485-H490
  66. 66. Haase GS, McPherson JW. Modeling of interconnect dielectric lifetime under stress conditions and new extrapolation methodologies for time-dependent dielectric breakdown. In: IEEE International Reliability Physics Symposium Proceedings. 2007. pp. 390-398
  67. 67. Lloyd JR, Liniger E, Shaw TM. Simple model for time-dependent dielectric breakdown in inter- and intralevel low-k dielectrics. Journal of Applied Physics. 2005;98:084109
  68. 68. McPherson JW. Time dependent dielectric breakdown physics–models revisited. Microelectronics and Reliability. 2012;52:1753-1760
  69. 69. Baklanov MR, de Marneffe J-F, Shamiryan D, Urbanowicz AM, Shi H, Rakhimova TV, Huang H, Ho PS. Plasma processing of low-k dielectrics. Journal of Applied Physics. 2013;113:041101-1-041101-35
  70. 70. Kazi H, Kelber JA. Plasma damage mechanisms in low k organosilicate glass and their inhibition by Ar ion bombardment. Journal of Vacuum Science and Technology B. 2010;32(2):021302-1-021302-7
  71. 71. Kunnen E, Barkema GT, Maes C, Shamiryan D, Urbanowicz A, Struyf H, et al. Integrated diffusion–recombination model for describing the logarithmic time dependence of plasma damage in porous low-k materials. Microelectronic Engineering. 2011;88:631-634
  72. 72. Perret A, Chabert P, Jolly J, Booth J-P. Ion energy uniformity in high-frequency capacitive discharges. Applied Physics Letters. 2005;86:021501-1-021501-3
  73. 73. Rakhimova TV, Braginsky OV, Ivanov VV, Kim TK, Kong JT, Kovalev AS, et al. Experimental and theoretical study of rf plasma at low and high frequency. IEEE Transactions on Plasma Science. 2006;34:867-877
  74. 74. Cheng YL, Lin BH, Huang SW. Effect of O2 plasma treatment on physical, electrical, and reliability characteristics of low dielectric constant materials. Thin Solid Films. 2014;572:44-50
  75. 75. Worsley MA, Bent SF, Gates SM, Fuller NCM, Volksen W, Steen M, et al. Effect of plasma interactions with low-k films as a function of porosity, plasma, chemistry, and temperature. Journal of Vacuum Science and Technology B. 2005;23(2):395-405
  76. 76. Lionti K, Volksen W, Magbitang T, Darnon M, Dubois G. Toward successful integration of porous low-k materials: Strategies addressing plasma damage. ECS Journal of Solid State Science and Technology. 2015;4(1):N3071-N3083
  77. 77. Amanatides E, Mataras D. Frequency variation under constant power conditions in hydrogen radio frequency discharges. Journal of Applied Physics. 2001;89:1556-1566
  78. 78. Han QY, White B, Berry IL, Waldfried C, Escorcia O. Activated He:H2 strip of photoresist over porous low-k materials. Solid State Phenomena. 2005;103–104:341-345
  79. 79. Urbanowicz AM, Shamiryan D, Zaka A, Verdonck P, De Gendt S, Baklanov MR. Effects of He plasma pretreatment on low-k damage during Cu surface cleaning with NH3 plasma. Journal of the Electrochemical Society. 2010;157(5):H565-H573
  80. 80. Cheng YL, Huang JF, Chang YM, Leu J. Impact of plasma treatment on structure and electrical properties of porous low dielectric constant SiCOH material. Thin Solid Films. 2013;544:537-540
  81. 81. Cheng YL, Tsai YS, Hung WJ, Sun CR, Lee WH. Effect of H2/He plasma on porous low dielectric constant materials. Surface and Coatings Technology. 2016;38:182-188
  82. 82. Urbanowicz AM, Vanstreels K, Shamiryan D, De Gendt S, Baklanov MR. Effect of porogen residue on chemical, optical, and mechanical properties of CVD SiCOH low-k materials. Electrochemical and Solid-State Letters. 2009;12:H292-H295
  83. 83. Urbanowicz AM, Baklanov MR, Heijlen J, Travaly Y, Cockburn A. Damage reduction and sealing of low-k films by combined he and NH3 plasma treatment. ECS Journal of Solid State Science and Technology. 2007;10(10):G76-G79
  84. 84. Impens NREN, Voort PVD, Vansant EF. Silylation of micro-, meso- and non-porous oxides: Review. Microporous and Mesoporous Materials. 1999;28:217-232
  85. 85. Forster A, Wagner C, Schuster J, Gemming S. Theoretical investigation of in situ k-restore processes for damaged ultra-low-k dielectrics. Microelectronic Engineering. 2016;156:121-125
  86. 86. Koehler N, Fisher T, Zimmermann S, Schulz SE. A plasma assisted in situ restoration processes for sidewall damaged ULK dielectrics. Microelectronic Engineering. 2016;156:116-120
  87. 87. Proost J, Baklanov M, Maex K, Delaey I. Compensation effect during water desorption from siloxane-based spin-on dielectric thin films. Journal of Vacuum Science and Technology B. 2000;18(1):303
  88. 88. Cheng YL, Leon KW, Huang JF, Chang WY, Chang YM, Leu J. Effect of moisture on electrical and reliability properties for low dielectric constant materials. Microelectronic Engineering. 2014;114:12-16
  89. 89. Raja A, Laibowitz R, Liniger EG, Shaw TM, Heinz TF. Impedance spectroscopy studies of moisture uptake in low-k dielectrics and its relation to reliability. Microelectronic Engineering. 2015;147:100-103
  90. 90. Gandhi DD, Singh B, Singh AP, Moore R, Simonyi E, Lane MW, et al. Effects of silylation on fracture and mechanical properties of mesoporous silica films interfaced with copper. Journal of Applied Physics. 2009;106:054502
  91. 91. Kimura Y, Ishikawa D, Nakano A, Kobayashi A, Matsushita K, Roest DD, Kobayashi N. Impact of hydrocarbon control in ultraviolet assisted restoration process for extremely porous plasma enhanced chemical vapor deposition SiOCH films with k =2.0. Japanese Journal of Applied Physics. 2012;51:05EC04
  92. 92. Cui H, Bhat IB, Murarka SP, Lu H, Hsia WJ, Catabay W. Copper drift in methyl-doped silicon oxide film. Journal of Vacuum Science and Technology B. 2002;20(5):1987-1993
  93. 93. Cheng YL, Lee CY, Huang YL, Sun CR, Lee WH, Chen GS, et al. Cu-induced dielectric breakdown of porous low dielectric constant film. Journal of Electronic Materials. 2017;46(6):3627-3633
  94. 94. Lee S, Oates A, Chang K. Fundamental understanding of porous low-k dielectric breakdown. IEEE International Reliability Physics Symposium (IRPS);2009. pp. 481-484
  95. 95. Chen F, Shinosky MA. Electron fluence driven, Cu catalyzed, interface breakdown mechanism for BEOL low-k time dependent dielectric breakdown. Microelectronics and Reliability. 2014;54(3):529-540
  96. 96. Cheng YL, Lee CY, Hung WJ, Chen GS, Fang JS. Electrical and reliability characteristics of dielectric stack with low dielectric constant SiCOH and capping SiCNH films. Surface & Coatings Technology. 2018;350:57-63
  97. 97. Fisher I, Eizenberg M. Copper ion diffusion in porous and nonporous SiO2-based dielectrics using bias thermal stress and thermal stress tests. Thin Solid Films. 2008;516:4111-4121
  98. 98. Mukaigawa S, Aoki T, Shimizu Y, Kikkawa T. Measurement of copper drift in methylsilsesquiazane-methylsilsesquioxane dielectric films. Japanese Journal of Applied Physics. 2000;39:2189-2193
  99. 99. Tan T, Gan C, Du A, Cheng C. Effect of Ta migration from sidewall barrier on leakage current in Cu/SiOCH low-k dielectrics. Journal of Applied Physics. 2009;106:043517
  100. 100. Zhao L, Volders H, Baklanov M, Tokei Z, Pantouvaki M, Wilson CJ, et al. Study of metal barrier deposition-induced damage to porous low-k materials. Microelectronics Engineering. 2011;88:3030-3033
  101. 101. Franz M, Ecke R, Kaufmann C, Kriz J, Schulz SE. Characterisation of the barrier formation process of self-forming barriers with CuMn, CuTi and CuZr alloys. Microelectronics Engineering. 2016;156:65-69
  102. 102. Yang CC, Cohen, Shaw ST, Wang PC, Nogami T, Edelstein D. Characterization of ultrathin-Cu/Ru(Ta)/TaN liner stack for copper interconnects, IEEE Electron Device Letter. 2010;31:722-724
  103. 103. Uedono A, Armini S, Zhang Y, Kakizaki T, Rehberg RK, Anwand W, et al. Surface sealing using self-assembled monolayers and its effect on metal diffusion in porous low-k dielectric studied using monoenergetic positron beams. Applied Surface Science. 2016;368:272-276
  104. 104. Boyd AB, O’Connor R, Armini S, Selvaraju V, Hughes G, Bogan J. On the use of (3-trimethoxysilylpropyl)diethylenetriamine self-assembled monolayers as seed layers for the growth of Mn based copper diffusion barrier layers. Applied Surface Science. 2018;427:260-266
  105. 105. Chapelon LL, Chaabouni H, Imbert G, Brun P, Mellier M, Hamioud K, et al. Dense SiOC cap for damage-less ultra low k integration with direct CMP in C45 architecture and beyond. Microelectronic Engineering. 2008;85:2098-2101
  106. 106. Ueki M, Onodera T, Ishikawa A, Hoshino S, Hayashi Y. Defectless monolithic low-k/Cu interconnects produced by chemically controlled chemical mechanical polishing process with in situ end-point-detection technique. Japanese Journal of Applied Physics. 2010;49:04C029-1-04C029-6
  107. 107. Kao KC, Chang WY, Chang YM, Leu J, Cheng YL. Effect of UV curing time on physical and electrical properties and reliability of low dielectric constant materials. Journal of Vacuum Science and Technology A. 2014;32(3):061514-1-061514-7
  108. 108. Cheng YL, Wang YL, Lan JK, Chen HC, Lin JH, Wu YL, Liu PT, Wu YC, Feng MS. Effect of carrier gas on the structure and electrical properties of low dielectric constant SiCOH film using trimethylsilane prepared by plasma enhanced chemical vapor deposition. Thin Solid Films. 2004;469:178-183

Written By

Yi-Lung Cheng and Chih-Yen Lee

Submitted: August 29th, 2018 Reviewed: September 18th, 2018 Published: December 31st, 2018