TY  - CHAP
AU  - Rung-Bin Lin
AU  - Meng-Chiou Wu
AU  - Shih-Cheng Tsai
ED  - Cher Ming Tan
Y1  - 2008-09-01
PY  - 2008
T1  - Reticle Floorplanning and Simulated Wafer Dicing for Multiple-Project Wafers by Simulated Annealing
N2  - This book provides the readers with the knowledge of Simulated Annealing and its vast applications in the various branches of engineering. We encourage readers to explore the application of Simulated Annealing in their work for the task of optimization.
BT  - Simulated Annealing
SP  - Ch. 13
UR  - https://doi.org/10.5772/5569
DO  - 10.5772/5569
SN  - 
PB  - IntechOpen
CY  - Rijeka
Y2  - 2024-04-16
ER  -