Light
Abstract
This chapter aims to provide students/workers in the field of photovoltaics with the valuable information and knowledge needed to understand the physics and operation of high‐efficiency front junction n‐type crystalline silicon solar cells. The surface recombination and passivation mechanisms, and several promising passivation schemes for front and back cell surfaces, are addressed and reviewed. The advanced cell structures and their fabrication schemes to achieve higher efficiency are described and discussed, including selective emitter on the front and locally doped back surface filed or carrier selective rear contact composed of tunnel oxide and phosphorus‐doped polycrystalline silicon thin film. These advanced cell design features have become highly active areas of investigations in the photovoltaic industry for next‐generation production cells.
Keywords
- front junction
- recombination
- surface passivation
- selective emitter
- tunnel oxide passivated contact
- high efficiency
1. Introduction
Solar cells depend upon the photovoltaic effect for their operation that converts the incident energy of sunlight directly into electricity using the electronic properties of semiconducting materials. In the past few decades, silicon wafers have been used to fabricate the overwhelming majority of solar cells in the very dynamic photovoltaic industry because of the abundance and non‐toxicity of silicon, the simplicity of cell fabrication process, and the vast amount of processing knowledge developed and accumulated in the microelectronics industry. Simply speaking, silicon wafer‐based solar cells generate electricity via absorbing photons and generating electron‐hole pairs that are separated by a
2. Operating principle of a front junction n ‐type silicon solar cell
The operating principle of a front junction
2.1. Solar cell parameters
According to the
where
The resulting
where
where
2.2. pn ‐junction formation
To form the
Screen‐printed boron emitters have also been explored by printing proper boron‐containing paste followed by a thermal drive‐in diffusion [9]. Another promising and widely used technology is called ‘BBr3 diffusion’ that involves a direct thermal diffusion of boron atom from a liquid boron tribromide (BBr3) source [10]. In this process, pure nitrogen (N2) carrier gas flows into a bubbler containing liquid BBr3, which creates and transports gaseous BBr3 into the quartz tube and deposits on the surface of silicon wafers loaded in a quartz boat [11]. During this deposition stage, a boron oxide layer is formed on the silicon wafer surface in the oxygen (O2) ambient according to
This thin boron oxide layer contains very high concentration of inactive boron element on the silicon surface. So, a high temperature anneal (typically ≥950°C) is necessary to activate boron atoms and diffuse them into silicon bulk to form the
Because all of these junction formation technologies suffer from wrap‐around or naturally double‐sided diffusion process, etching off one side or depositing a mask layer on one side is needed to prevent junction shunting. Therefore, ion implantation has been investigated and implemented as a promising alternative technology that has a unique characteristic to provide single‐sided diffusion and facilitates the development of next‐generation cells [13]. It can simplify the junction formation process by eliminating the extra processes of masking and etching. In addition, ion implantation offers other technical advantages, including (1) high junction uniformity, (2) flexibly and precisely controlled dopant profiles, (3) elimination of the edge isolation process, (4) capability of patterned doping for selective doping and (5) elimination of the dopant glass (i.e. BSG layer) removal process [14]. It is important to note that ion implantation forms an amorphous layer on the surface [15], therefore, a very high temperature (≥1000°C) is needed to recover lattice damage and activate dopants [16, 17]. In addition, proper ion dose, implant energy and anneal conditions are essential to obtain desired dopant profiles [18, 19]. Current ion implantation tools have throughput of more than 2000 wafers per h but the capex and maintenance is much higher than the traditional diffusion tubes [13]. Figure 4 shows two examples of boron emitter profiles measured by electrochemical capacitance‐voltage (ECV) profiling technique, revealing that the boron concentration decreases towards the silicon wafer surface due to the higher solubility of boron in the SiO2 layer than in silicon bulk [20].
2.3. Metallization
In order to extract electrical power from a silicon solar cell, metal contacts have to be applied to the front emitter and the rear base to collect the generated electron‐hole pairs. The collected electrons flow through the
Second contact technology involves metal plating approach that offers low contact resistivity, good gridline conductivity and narrow gridline width (low metal shading). Thus, it is a promising alternative to the screen‐printing technology but metal plating typically requires an initial patterning step to create openings in a dielectric masking layer for the subsequent self‐aligned metallization [21]. The openings can be defined by photolithography [10] or laser ablation, and then the contacts are applied by electroless plating [25] or a combination of light‐induced plating (LIP) and electroplating in an inline plating machine [26]. For industrially feasible plated metallization, nickel (Ni) layer is typically used, first to obtain low contact resistivity and prevent copper (Cu) diffusion followed by copper plating to provide excellent line conductivity and low material cost (compared to silver) [27]. The gridline width after plating is typically around 30 µm, with height of ∼15 µm, as shown in Figure 5(B).
Third contact technology involves physical vapour deposition (PVD) that is attractive because of its potential advantages of lower specific contact resistance [28], reduced wafer breakage and processing of thinner wafers due to non‐contacting process. In addition, a thin (1∼2 µm) PVD aluminium (Al) on the entire rear area is sufficient to meet the required electrical conductance for large area silicon solar cells, which can lead to less wafer bow and less metal material consumption [22]. In order to form the contact between silicon and PVD metal, patterned openings through a dielectric masking layer are needed for the subsequent PVD metallization, which is typically created by laser ablation. Figure 5(C) shows an example of rear point contact pattern (300 × 300 µm2) after laser ablation, with the opening diameter of ≤40 µm and metal coverage of ≤1.4% [22]. To obtain a good solder contact to the PVD Al side, deposition of a double layer of Ni:V/Ag on top of PVD Al layer is often implemented to provide an excellent solderability and long‐term stability for module manufacturing [29].
2.4. Optical, resistive and recombination losses in a solar cell
Theoretical maximum
Actual silicon solar cells also suffer from ohmic losses due to parasitic resistance
Apart from optical and ohmic losses, recombination of generated carriers can reduce
where
In addition to these three bulk recombination mechanisms, surface recombination is also very critical for cell performance. This is because dangling bonds present at both surfaces of the wafer induce defect levels within the forbidden band gap. Surface recombination is characterized by a surface recombination velocity that is a function of surface state density and cross‐section of surface traps [31]. To account for all the four recombination mechanisms, an effective lifetime (
where
where
3. Surface passivation of crystalline silicon solar cells
At the silicon wafer surface, the covalent silicon‐silicon bonds of crystal lattice are broken during wafer slicing, which creates non‐saturated (‘dangling’) bonds that are often referred as ‘surface states’ and can easily trap electrons from the conduction band or holes from the valence band as some of the energy levels are located near mid‐gap. In order to keep surface recombination losses at a tolerable level, the wafer surfaces must be electronically well passivated. According to the Shockley‐Read‐Hall theory [31], the SRV depends on several features, including the properties of the surface states, state density, their capture cross‐sections for electrons and holes, the injection level at the surface and the wafer doping level [34]. Therefore, SRV can be decreased by two technical approaches: (1) the chemical passivation by reducing the surface state density via depositing or growing a passivating dielectric film on the silicon surface and (2) the field‐effect passivation by reducing the concentration of one charge carrier type (either electrons or holes) at the surface via forming an internal electric field below the silicon surface with doping profile or electrical charges in dielectric insulator. Practically, these two fundamental passivation approaches are often applied together to minimize the SRV. For front junction
3.1. Front boron emitter passivation
In order to take the advantages of high bulk lifetime
It is also shown that with ALD‐Al2O3 passivation, ion‐implanted boron emitters (post‐implant anneal at 1040°C for 1 h) demonstrate noticeably higher
3.2. Rear surface passivation
In practice, there are two different types of surfaces on the rear side of front junction
SiNx formed by PECVD provides excellent passivation for
In front junction
3.3. Carrier selective tunnel oxide passivated rear contact
Current high‐efficiency front junction
In this TOPCON structure, four parallel mechanisms contribute to carrier selectivity (as shown in Figure 8(B)) [45]. (1) Heavily doped
To obtain an efficiently doped
4. High‐efficiency front junction n ‐type crystalline silicon solar cells
All front junction
4.1. Passivated emitter with rear totally diffused (PERT) cells
Even though
Table 1 shows that 21.9% cell efficiency has been reported on thermal SiO2‐passivated boron emitter formed by BBr3 diffusion [53] while 22.7% cell efficiency has been achieved via Al2O3‐passivated boron emitter formed by ion implantation and photolithography on small area
The detailed characterization and analysis show that the 22.7% efficient PERT cell is largely limited by the rear side recombination (
4.2. Passivated emitter with rear locally diffused (PERL) cells
The concept of ‘passivated emitter rear locally diffused (PERL)’ structure was introduced and developed in 1990s [56], in order to reduce the recombination from the rear side. The PERL schematic is shown in Figure 11(A), which can diminish the heavy doping effect by using locally phosphorus‐diffused area and decrease the metal‐induced recombination simultaneously via heavy doping (
4.3. Tunnel oxide passivated contact cells
The implementation of polysilicon tunnel junction as an alternative to either totally or locally diffused junction to reduce the recombination at the contact of silicon solar cells has been reported in the 1980s [60]. Because of its excellent surface passivation and carrier selectivity, a full area TOPCON shown in Figure 12(A) was applied, which also enables one‐dimensional (1D) carrier transport on the rear side to eliminate
In addition, because both the heavy doping effect and the metal‐induced recombination are minimized in TOPCON structure,
To implement TOPCON on a more manufacturable cell structure, large area front junction n‐type Cz silicon solar cells have been developed with ion‐implanted boron emitter, SiNx anti‐reflection coating and screen‐printed front contact, as shown in Figure 12(B), and cell efficiency of 21.4% with evaporated rear contact has been reported [45]. Figure 13 shows the simulated road map to achieve ≥23% efficient large area front junction
5. Summary and outlook
In this chapter, the physics and operation of front junction
High‐efficiency front junction
Acknowledgments
The authors would like to thank all other group members of UCEP in Georgia Tech and R&D department of Suniva, Inc. for their great support. This work was supported by the DOE FPACE I and the FPACE II contracts, as well as the DOE Solarmat1 and the DOE Solarmat2 contracts.
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