Open access peer-reviewed chapter

Reticle Floorplanning and Simulated Wafer Dicing for Multiple-Project Wafers by Simulated Annealing

By Rung-Bin Lin, Meng-Chiou Wu and Shih-Cheng Tsai

Published: September 1st 2008

DOI: 10.5772/5569

Downloaded: 2858

© 2008 The Author(s). Licensee IntechOpen. This chapter is distributed under the terms of the Creative Commons Attribution-NonCommercial-ShareAlike-3.0 License, which permits use, distribution and reproduction for non-commercial purposes, provided the original is properly cited and derivative works building on this content are distributed under the same license.

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Rung-Bin Lin, Meng-Chiou Wu and Shih-Cheng Tsai (September 1st 2008). Reticle Floorplanning and Simulated Wafer Dicing for Multiple-Project Wafers by Simulated Annealing, Simulated Annealing, Cher Ming Tan, IntechOpen, DOI: 10.5772/5569. Available from:

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