Typically, 0.85, 1.3, and 1.55 μm are wavelengths of interest for fiberoptic communications. Conventionally, photodetectors or photodiodes (PDs) based on different absorption layers are used for corresponding wavelengths. For instance, at 0.85-μm wavelength, GaAs or Si-based PD is preferred, while for 1.3-μm and 1.55-μm wavelengths, InP-based PD is most suitable. A PD served all these wavelengths therefore is desirable for network projection.
Conventional PDs with a broad spectral range can be classified into two configurations as illustrated in Figs. 1(a) and 1(b). One is with a shallow p-n junction directly formed in the absorption layer, either by epitaxial growth, or diffusion, or ion implantation, with the metal contact directly deposited on the p-type absorption layer. The principal drawbacks of this configuration involve excessive surface leakage. The other, which intends for reducing surface leakage, is with a shallow p-n junction formed in the absorption layer by selective acceptor diffusion through a dielectric window and a thin wide-bandgap cap layer and with the metal contact deposited on the diffused cap layer. Although by such a configuration and selective-area-diffusion (SAD) process all the p-n junction periphery in the narrow-bandgap absorption layer is sealed inside and surface leakage is minimized, the device still suffers from problems of low surface concentration, efficiency diminution at shorter wavelengths, and alloy spike. Since the temperature of the SAD process is usually limited by the tolerance of the dielectric mask and the diffusion time is limited by a required shallow diffusion depth, for high (saturated) surface concentration the wide-bandgap cap layer should be thick enough for elongating diffusion time under an optimum temperature. Thick wide-bandgap cap layer results in severe efficiency diminution at wavelengths shorter than the cutoff wavelength of the cap layer. As a consequence, for broad spectral range operation, a thin cap layer and thus a low surface concentration are necessary in this configuration. High contact resistance emerges and, if alloyed, metallurgical spike can be risky.
For the case of conventional InGaAs p-i-n PDs, to be reliable, the InGaAs PDs utilize SAD process and place the outermost junction periphery in the wide-bandgap cap layer, which is usually InP. Either front-illumination or back-illumination sets the lower limit of the device spectral range to be ~0.92 μm, the absorption cutoff of InP. Consequently, the operation spectral range is usually limited to 0.9-1.65 μm. However, devices based on these structures, although has achieved a broad responsivity spectrum, require shallow SAD process, which is rather difficult to achieve satisfactory junction properties. As a consequence, such devices
usually suffer from an excessive leakage and a low breakdown voltage. Besides, alloy spikes after contact annealing might electrically short the pn junction and cause device failure. Edge-coupling configuration can also achieve a wide responsivity spectrum if most of light is direct-coupled into the InGaAs region. However, rather accurate alignment is required and a more stringent limit is placed on the pseudowindow thickness for shorter wavelength operation . To achieve a wider spectral range, structures with a thin InP cap (< 0.2 μm) were utilized , . As the bandwidth demand goes higher, the coupling loss affects the performance of the fiber-optic link more, due to a smaller period per bit. For the receivers, to reduce the capacitance charging delay, the PD aperture shrinks as the bandwidth rises. Therefore, for high-speed operation, it would be more meaningful if the PD has a large coupling aperture. Conventional top-illuminated 10-Gb/s InGaAs p-i-n PDs typically have an optical coupling aperture of 20-40 μm in diameter, only one-third of the 2.5 Gb/s version. A larger aperture for 10 Gb/s operation, although achievable, must be based on the bondpad reduction or bondpad isolation design , which usually invokes wire-bonding difficulties and process complexities, respectively, and thus the yield and reliability concerns. Nevertheless, the small-aperture PD requires an active alignment during device package, which necessitates the use of more complex and more expensive facilities. If the alignment fails, not only the coupling efficiency is lost, but also the bandwidth is deteriorated due to the slow diffusing carriers. To cope with the problem, wet or dry etched backside microlens was proposed to increase the alignment tolerance at the price of more backside processing steps , . However, the enhancement of the optical coupling tolerance using such a backside-etched microlens is limited, and not to mention the degraded chip yield due to the backside process. Other fabrication methods for a microlens, such as surface micromachining , mass transport after preshaping , and photoresist reflow method , need complicated processes and are difficult to control the microlens radius. Therefore, using a commercial microball lens integrated with a planar high-speed PD to enlarge the alignment tolerance is a simple and attractive method.
This chapter reports the PD whose configuration is suitable for broad spectral range operation. The device is configured so that light illuminates directly upon the narrow-bandgap absorption layer, while with p-contact metal depositing on a thick wide-bandgap cap layer. Because the p-n junction periphery in the absorption layer is still sealed inside, the device has minimum surface leakage. Besides, a thick wide-bandgap layer facilitates the reach of maximum surface concentration and prevents the effect of alloy spike. With a shallow p-n- junction inside the absorption layer, the PD ideally can exhibit a wide responsivity spectrum with only the long-wavelength side limited by the absorption-layer cutoff. Beside, to achieve a 10-Gbps PD with wide spectral and spatial detection range, structures with a thin cap can be utilized. We shall first illustrate the spin on diffusion technique and for the applications to InP and GaSb materials. We fabricated the InGaAs/InP and InGaP/GaAs p-i-n PDs by removing the window layer of the conventional InGaAs/InP and InGaP/GaAs PDs ,  on the photosensitive surface. These PDs exhibit a low capacitance, a low dark current, a high speed, and a high responsivity in the enhanced spectral range, which permits applications as PDs for the high-speed communication, optical storage systems CD-ROM, as well as red and blue laser DVDs. Finally, we also accomplish the improvement of the coupling loss of small coupling aperture of 10-GHz InGaAs p-i-n PD by using a simple method of enlarging alignment tolerance of a high-speed PD with integrating to a self-positioned micro-ball lens.
2. Zinc diffusion in InP from spin-on glass
Zn is one of the most typical p-type impurities in the InGaAs/InP system. Diffusion of Zn into semiconductor, such as n-type InP, InGaAs or InGaAsP, and Zn-doped InP epitaxial layers, is an important technique for forming p-n junctions in optoelectronic devices.
The most common low-cost technique for planar junction formation in InP/InGaAs PD manufacturing is the sealed-ampoule Zn-diffusion technique. This process seals the patterned InP wafers under vacuum inside a quartz ampoule, along with some dopant source and a decomposition suppressant. The junction pattern is typically etched through a silicon-dioxide or silicon-nitride mask. The dopant source for p-n junction formation is usually solid-phase zinc, although cadmium also has been used. Zinc and cadmium are p-type dopants, so the InP-based semiconductor material must be n-type for a diode junction to be formed. This type of diffusion is not realistic for InP-based material systems because the temperature requirement far exceeds the decomposition temperature even when a Group-V decomposition suppressant is used.
A relatively new technique for junction formation, at least within the InP/InGaAs material system, is spin-on diffusion (SOD) -, a process that has been available for many years for silicon and is still used in some low-cost silicon processes. These days, though, ion implantation and carrier-gas diffusion dominate most silicon production, and spin-on-glass (SOG) doping for silicon has mostly been relegated to undergraduate electronics laboratories because of its relative simplicity and low cost. These same features make the process attractive for fabrication of InP-based diodes. SOG is a type of glass that can be applied as a liquid and cured to form a layer of glass having characteristics similar to those of SiO2. In general, SOG is mainly used for planarization and as a dielectric material. The process sequence of spin-on diffusion is outlined as below:
Silicon nitride diffusion-mask deposition and shallow delineation etching.
Application of source on top of silicon nitride layer with open diffusion windows by spin coating of an InP substrate and soft bake on hotplate.
Deposition of 1500 Å thick cap layer of silicon nitride.
Drive-in process with application of rapid thermal annealing (RTA) at 550C
Removal of excess glass and silicon nitride films in HF: H2O.
Deposition of silicon nitride, followed by lithography and etching steps
It is found that the samples prepared by SOD method economize 100 min than those prepared by furnace diffusion (FD) which does not include the heat clean of furnace system of 2 days. The economical process time of SOD is an advantage for mass production.
To inspect the relationship between diffusion depth and diffusion time, the electrochemical C-V (ECV) measurement was applied. The diffusion-depth test was applied to a 3 μm thick undoped InP epitaxial layer which was grown on an n+-InP substrate. The diffusion process was performed at 550ºC in a RTA with N2-purged ambient, and the rising ramp rate of temperature was set to 5ºC/sec. After driving in of Zn diffusion source and removing residual glass and dielectric, the diffused wafer routinely underwent RTA process for impurity activation while virtually eliminating the potentially damaged interstitial zinc. Fig. 2 shows the concentration profiles for the various thermal treatment condition (ramping rate/temperature/time). The thermal treatment condition used for PD fabrication is 600ºC RTA for 25 sec in N2 ambient. This shows that most Zn atoms are activated and act as acceptors. The net-acceptor concentrations are around 2-4 x 1018 cm-3 in all of the samples.
Similar SOD technology is also applied to the case of GaSb wafer. The fabricated p-n junction structure is shown in the inset of Fig. 3. The diffusion depth measured by electrochemical C-V profiler is shown in Fig. 3. The junction depth is 0.6 μm and the concentration of surface can be achieved as high as around 5 × 1020 cm-3.
3. Fabrication of InGaAs/InP p-i-n photodiodes 
The InP/InGaAs/InP p-i-n PD is constructed to be capable of speedily and efficiently detecting light signals of wavelengths ranging from 0.7 μm to 1.65 μm. This range covers all the wavelengths of interest nowadays in fiberoptic communications: 0.85 μm, 1.3 μm, and 1.55 μm.
The InP/InGaAs/InP epitaxial device structure was grown by metal-organic chemical vapor deposition (MOCVD) on the n+-InP substrate. A first layer of 0.5-μm undoped InP was grown for buffering the growth process. A second layer of 2.5-μm undoped indium gallium arsenide (InGaAs) was grown for light absorption layer. A third layer of 1.0-μm undoped InP was grown as the wide-bandgap cap layer. Highly reliable SAD planar device process, either by sealed-ampoule diffusion or spin-on diffusion, was utilized for device fabrication. Silicon nitride (SiNx) film with 1500-Å thickness was deposited onto the entire wafer by plasma-enhanced chemical vapor deposition (PECVD). Through conventional photolithographic process and reactive ion etching (RIE), diffusion windows with 50-μm diameter were opened on the dielectric film. Afterwards, wafer was loaded into semi-closed diffusion system and zinc (Zn)–diffusion process was performed at 550℃ for 10 min. Such a temperature and period produced a 1017 cm-3 acceptor front at 1.2-μm deep below the surface. Due to a rather slow diffusion of Zn in InGaAs (3 times slower than that in InP), the Zn protrusion depth into the InGaAs can be well controlled to be about 0.1-0.2 μm, which was designed for reliability, wide spectral range, and high-speed operation considerations. After impurity activation by RTA and conventionally photolithographic process, ring-shaped p-contact metallization chromium (Cr)/gold (Au)/AuZn/Cr was deposited on heavily doped p-type InP cap layer. The contact adhesion was enhanced by heat treatment. Then the InP cap layer inside the 30-μm-diameter coupling aperture was removed by a reactive ion etching with the CH4/H2 source to slightly etch and recondition the InP surface and then by chemical etching based on the 3H3PO4: HCl solution to selectively clean the InP thickness left. Afterwards, double-layer SiNx/SiOx antireflection (AR) coating and Cr/Au for bondpad metallizations were deposited in sequence. Wafers were then lapped and polished down to about 150 μm and the polished backside was coated with Ti/Pt/Au n-contact metallizations. Lastly, samples were annealed at 420℃ for 20 sec to reduce the contact resistance. The cross-sectional view of a finished device is schematically drawn in Fig. 4. Then the wafer was separated into chips, and several were packaged for characterizations.
The essence of this PD is to remove the InP cap layer inside the illumination aperture (directly above the light-absorption layer) while leave a shallow p-n junction in the narrow-bandgap InGaAs absorption layer. Also, the contact is made on the thick-enough InP cap layer for preventing the alloy spike from shortening device layers with opposite conducting types. There are several critical considerations in performing this art.
First, a well-controlled diffusion process needs to be established. The junction protrusion depth into the InGaAs absorption layer is consequential. Too shallow junction depth would result in the following two detrimental effects: surface depletion and large sheet resistance. The former leads to large dark leakage even at low bias, while the latter results in non-uniform spatial response. To the other extreme, deep junction results in excessive absorption in the quasi-neutral p-type region. Electrons generated in this low-field region slowly diffuse (as compared to drift process) out of the region or recombine with holes. As a consequence, low-efficiency and low-speed device performance can be expected for certain
wavelength operation. Shorter wavelength typically has a larger absorption coefficient that is equivalent to a shallower absorption depth, and vice versa. How deep the junction can protrude into the InGaAs absorption layer is thus quite dependent on the operating wavelength for avoiding slow carrier diffusion process. Typically the depth is designed about the reciprocal of the absorption coefficient corresponding to the minimum wavelength the detector operates.
Second, a well-controlled etching process is required to remove the InP cap layer inside the aperture region. Due to the target region is surrounded by contact metallizations, the metal films should adhere to the cap layer well enough for inhibiting non-uniform and excessive localized undercut during wet etching process. The wet etching time should also be controlled. Excessive undercut could expose the junction periphery in the InGaAs absorption layer and consequently result in severe surface leakage, which could go further if there would be process-induced damages. It would be advantageous to have the metal/semiconductor interface slightly alloyed before etching process. By using a wider p-contact span “s” or adopting a second dielectric passivation, the wet etching process can be more tolerable. Of course, this benefit is at the price of reduced coupling aperture. Besides adhesion consideration, dry etching process can be performed as an assist before wet process to minimize undercut. Nevertheless, to avoid impact damages, some thickness of cap layer should be left for wet process. It is essential that the wet process has desired selectivity; that is, the etching process stops automatically once the etching solution sees the absorption layer. If the etching solution or the material system has poor selectivity, the etching time should be accurately controlled, otherwise the shallow p-n junction can be also removed and, as a consequence, no biasing field for generated carriers.
Third, for high efficiency in all the operating spectral range, device has an anti-reflection dielectric coating designed for the wavelengths of interest. It is impossible for single-layer dielectric film to serve a broad spectral range. Therefore, at least two layers of dielectric films are required.
4. Device characteristics 
Fig. 5 shows both current-voltage (I-V) and capacitance-voltage (C-V) characteristics of the devices measured at room temperature. Typically, the InGaAs PD exhibits a 50-pA dark current and a 0.3-pF capacitance at –5 V. Obviously from this figure, the device leakage behaves just as of those conventional planar InGaAs p-i-n PDs, which keeps a slightly increasing leakage as the bias increases till the tunneling-type breakdown is reached. Such a low dark current indicates that the InP cap is removed without generating the surface damage and the severe undercut, which might expose the junction periphery in InGaAs. In addition, the sheet resistance of the p+-InGaAs layer was measured as about 720 Ω/, which is comparable to that of the p+-InGaAs base of the InP-based heterojunction bipolar transistors (HBTs) . The measured series resistance of the InGaAs PD is about 18 Ω, which indicates that the 0.1-0.2 m p+-InGaAs layer has been doped high enough (~1019 cm-3) for high-speed applications. The low capacitance indicates a well-controlled junction depth and a significantly reduced parasites, which results in a 0.1-pF junction capacitance and a 0.2-pF parasitic capacitance, respectively. The estimated frequency response deduced from the series resistance and the measured capacitance is about 10.1 GHz.
For obtaining the responsivity spectrum, we utilized a tungsten lamp/monochromator/multi-mode fiber (MMF) combination as the optical source for measurement. Fig. 6 shows the measurement results of the InGaAs pin PD with the InP cap removed. The device exhibits a quantum efficiency higher than 80% in the 0.85-1.65 m wavelength range and higher than 70% in the 0.55-1.65 m wavelength range.
To see if the device with the InP cap removed still retains its high-frequency operation capabilities, the device was mounted onto a SMA-connector for dynamic characterizations. For the 3-dB bandwidth measurements, the packaged device was characterized at 1.3-μm wavelength using HP8703 lightwave component analyzer. As shown in Fig. 7, the device operating at -5 V achieves a 3-dB bandwidth of about 10.3 GHz. Furthermore, to see the transmission characteristics, the non-return-to-zero (NRZ) pseudorandom codes of length 23l-1 at 10.3 Gbps data rate using the 0.85-μm multimode and 1.3-μm singlemode fibers were fed into the photodiode, respectively. Fig. 8 shows the back-to-back eye diagrams. It is observed that both the eye diagrams of 0.85-μm (Fig. 8(a)) and 1.3-μm (Fig. 8(b)) wavelengths are distinguishably open and free of intersymbol interference and noise. These characteristics prove that the InGaAs p-i-n photodiode is well qualified for high-speed fiber communication
5. 10-GBPS InGaP-GaAs p-i-n photodiodes with wide spectral range 
The epitaxial structure of InGaP-GaAs p-i-n PD was grown by MOCVD on the n+-GaAs substrate. A 2.5-m non-intentional doped GaAs absorption layer was grown on a 200 nm GaAs buffer layer. This was followed by a 10 nm Al0.3Ga0.7As grading layer which was doped p type with a carrier concentration of approximately 1 1018 cm-3. Here, a 10 nm p-Al0.3Ga0.7As intermediate layer was inserted to reduce the band off-set at the interface between the absorption layer and the window layer to eliminate the hole trapping problem. An In0.5Ga0.5P etching stop layer was doped p type and its thickness was 20 nm. The wafer was finally capped with a 200 nm thick p+-GaAs contact layer with a hole concentration higher than 1 1018 cm-3.
The process started with depositing a 2000 Å SiNx film and then creating the 50-m-in-diameter windows for the following chemical wet etching process. A circular mesa structure of a 50-μm diameter was formed by 1H3PO4: 1H2O2: 20H2O solution for etching GaAs and AlGaAs, and 1HCl: 3H3PO4 solution for etching InGaP. In order to attain a low dark current, the mesa etching was stopped at the middle of absorption layer so the current goes through the bulk region. To reduce the parasitic capacitance, a double-layer passivation of 1500 Å SiNx and 5000 Å SiO2 was deposited by PECVD. After a ring-shaped Cr/AuZn/Au p-contact metal deposition, the GaAs cap layer inside the 30-m-in-diameter coupling aperture was removed by selective etching process. Afterwards, the double-layer SiNx/SiOx antireflection (AR) coating and Cr/Au for bondpad metallizations were deposited in sequence. Wafers were then lapped and polished down to about 300 m and the polished backside was coated with Cu/AuGeNi/Au n-contact metallizations. Lastly, the samples were annealed at 400ºC for 20 sec to reduce the contact resistance. The cross-sectional view of a finished device is schematically drawn in Fig. 9.
The dark current of an InGaP/GaAs p-i-n PD is usually too low to have any significant influence on receiver sensitivity. However, it is an important parameter for process control and reliability. Fig. 10 shows both I-V and C-V characteristics of the devices with a window of 50 m in diameter measured at room temperature. The fabricated InGaP-GaAs p-i-n PDs exhibit a sufficiently low dark current of less than several pA and a small capacitance of 0.3 pF at –5 V. All the tested p-i-n PDs show a breakdown voltage over 40 V. These characteristics indicate the high crystalline quality of the epitaxial layers grown by MOCVD and without generating the surface damage after removing the GaAs cap layer. Inspection of this figure reveals that the device leakage behaves just as of those conventional p-i-n PDs, which keeps a slightly increasing leakage as the bias increases. Such a low dark current illustrates that the GaAs cap is removed without generating the surface damages and the severe undercut. A low capacitance is of fundamental importance to achieve a high-speed PD. The low capacitance indicates significantly reduced parasitics, which results in a 0.1-pF junction capacitance and a 0.2-pF parasitic capacitance. To minimize the noise and maximize the bandwidth, the series resistance RS should be as low as possible. The derived series resistance is about 5 Ω from the estimation of series resistance as RS ≈ dV/dI at a relatively large forward current of 50 mA.
For obtaining the responsivity spectrum, we utilized a tungsten lamp/monochromator/multi-mode fiber (MMF) combination as the optical source for measurements. Fig. 11 shows the measured responsivity spectra of the InGaP-GaAs p-i-n PD with the GaAs cap layer removed and a commercial Si PD. Our device exhibits a quantum efficiency higher than 90% in the 420-850 nm wavelength range and higher than 70% in 360-870 nm range, which is obviously superior to the Si PD in this wavelength range.
Fig. 12 is the simple equivalent circuit of InGaP-GaAs pin PD. The calculated frequency response deduced from the series resistance, junction capacitance, bondpad capacitance, and the transit time is approximate 8 GHz. To see if the device with the GaAs cap layer removed still retains its high-frequency operation capabilities, the device was mounted onto a SMA-connector for dynamic characterizations. For the 3-dB bandwidth measurements of 850 nm wavelength, we have established a high frequency measurement system which includes an 850 nm laser source, a 0-20 GHz modulator, a signal generator (Agilent E8257D), and a spectrum analyzer (Agilent E4448A). The influence of used cables and bias tee on the measured frequency responses has been amended carefully. The 3-dB bandwidth of this device is expected as about 8 GHz, which is dominated by RC time constant. The thickness of the absorption layer is only 2.5 m, which is expected to have a 3-dB bandwidth larger than 11 GHz, when we only consider the transit time factor. As shown in Fig. 13, the measured result of device operating at –5 V achieves a 3-dB bandwidth of about 9.7 GHz, which is a combination result of carrier transit, RC discharge, and inductance of bonding wire. The measured 3-dB bandwidth of packaged PD is enhanced due to inductance peaking. Furthermore, to see the transmission characteristics, the non-return-to-zero (NRZ)
pseudorandom codes of length 23l-1 at 10.4 Gbps data rate using the 850-nm multimode fibers was fed into the PD. Fig. 14 shows the back-to-back eye diagram. It is observed that the eye diagram at 850-nm wavelength is distinguishably open and free of intersymbol interference and noise. These characteristics prove that the InGaP-GaAs p-i-n PD is well qualified for high-speed fiber communications.
6. Alignment-tolerance enlargement of a high-speed photodiode by a self-positioned micro-ball lens
To widen the alignment tolerance of a 10-Gb/s InGaAs p-i-n PD, which typically has an optical coupling aperture of only 30 μm in diameter; we propose a self-positioning ball-lens-on-chip scheme for enlarging the effective coupling aperture of the device . A Monte-Carlo ray trace simulation, which is suitable for either on-axis or off-axis simulation of various optical or optoelectronic systems in the three-dimensional (3D) space -, is utilized to optimize the conditions of this micro-ball-lens (MBL) integrated high speed p-i-n PD . The effectiveness of the MBL and the Monte-Carlo ray trace modeling demonstrates through the measurements of the spatial response uniformity of the MBL-integrated InGaAs p-i-n PD.
We shall report the detailed analyses of = 250 μm ruby ball-lens integrated photodiode. With a single-mode fiber light source, the optimal spatial response uniformity and alignment tolerance are demonstrated through the ray trace simulation and the practical measurements. The dynamic response of the MBL-integrated high speed InGaAs p-i-n PD is also characterized.
The photolithographic process is to define and develop the MBL-socket made of SU-8 in concentric with the coupling aperture; therefore the optical axis of the photodiode will be automatically aligned to the MBL. The inner diameter D and the height H of the socket, which was controlled by the patterned conditions and the spin-coating speed, respectively, are designed to accommodate a commercially available ruby micro-ball-lens.
After the photodiode chip was die- and wire-bonded onto a modified subminiature-version-A (SMA) connector, a sufficient UV-cured epoxy was filled into the socket and then the MBL was placed over. The MBL fell into the socket to find an equilibrium position automatically, as shown in Fig. 15. Then, the chip was fully cured by UV light to secure the ball-lens on the socket. Such a lens-on-socket scheme is inherently a self-positioning process.
The detailed structural drawing of the MBL-integrated photodiode is illustrated in Fig. 16. For an ideal situation, the distance between the bottom of the MBL and the aperture, h, at that equilibrium position can be calculated by
where H is the height of the lens-socket, is the diameter of the MBL, and D is the inner diameter of the socket.
The pattern on the chip surface, including a metal contact ring (W = 10 μm), a bondpad, and a connection metal line, is also illustrated in Fig. 16. The area within the metal contact ring (d = 30 μm) is the detection region wherein the selective diffusion region is wider (Ds = 50 μm).
In this study, a SU-8 ball-lens socket with a 130-μm inner diameter (D) on the InGaAs photodiode has been fabricated to sustain a = 250 μm ruby MBL. The height of lens-socket is a parameter to find an optimal condition.
To evaluate the effectiveness of the integrated MBL, the response (coupling) uniformity of a photodiode with a micro-ball-lens is characterized and is compared to a bare chip. By transversely scanning (i.e., parallel to the X-Y plane defined in Fig. 15) a single-mode fiber (SMF) across the center of the entire chip, we are able to evaluate the X (Y)-axis response (coupling) uniformity. On the other hand, the axial scan (along the optical axis) provides the Z-axis response (coupling) uniformity. As a reference coordinate, ΔX and ΔY are used to represent the SMF’s output facet position with respect to the optical axis (ΔX = ΔY = 0), and ΔZ represents the distance between the SMF’s output facet and the nearest coupling plane along the optical axis. The nearest coupling plane herein means the plane of aperture (without MBL) or the vertex of the ball-lens (with MBL) normal to the optical axis.
A Monte-Carlo ray trace simulation has been constructed to imitate this optical system in Ref. 20. It is a useful tool to analyze the MBL integrated photodiode. The simulated data for the ruby MBL integrated photodiode, whose lens diameter is 250 μm, are shown in Fig. 17. In the figure, the dash lines represent the responsivities that only accumulate the rays detected within the metal contact ring on the photodiode surface. The solid lines additionally include the rays that are incident at the effective detection regions outside the metal ring. It is therefore greater than the dash lines under the same conditions. However, the deviation between the solid and dash lines is undesired. The out slow diffusing carriers can degrade the dynamic performance of a high speed InGaAs photodiode.
Fig. 17(a) shows the Z-axis response uniformity along optical axis (X = 0 μm). The variation of curves caused by H from 150 to 30 μm (ΔH = -20 μm) is quite obvious. By defining the 1-dB optical loss (responsivity = 0.83) as the alignment limit, we can obtain the Z-axis alignment tolerances. These data extracted from the curves are listed in Table 1. As compared to the narrow 170-μm tolerance of a bare chip from measurements, the improvements can be at least 3.65 fold (H = 150 μm), except the case of H = 30 μm which is hard to define. Moreover, the maximum value (1150 μm) derived from the curve of H = 50 μm amazingly achieves 6.76 times the alignment tolerance of a bare chip.
In order to prove the modeling results, various MBL-integrated photodiodes with H from 50 to 110 μm were fabricated and were characterized by a single-mode fiber light source (λ = 1.3 μm). The alignment tolerances extracted from the measurements are also listed in Table 1. According to the results, they are 1120 μm (H = 50 μm), 1020 μm (H = 70 μm), 920 μm (H = 90 μm), and 850 μm (H = 110 μm), respectively. The practical alignment tolerances quite match the simulated results. In addition, the responsivities with the conditions of H = 110 μm (triangle) and H = 50 μm (circle) are chosen to be plotted in the same figure for comparison.
The alignment tolerance along X axis is more important practically, because it is much narrower than that in Z axis. The size of PD’s active area, concerning with the dynamic response, limits the available alignment region. The X-axis alignment tolerances at the chosen position of ΔZ = 400 μm are characterized by transversely scanning across various MBL-integrated photodiodes. As shown in Fig. 17(b), as the H decreases, the central main peak becomes wider and hence the alignment tolerance is larger. Nevertheless, the central responsivity (ΔX = 0) starts to degrade as the H < 70 μm. The reduction of the central responsivity is attributed to the bigger beam size focused on the PD surface by the micro-ball-lens as compared to the aperture within the metal contact for the narrower distance between the micro-ball-lens and the photodiode surface.
According to the Monte-Carlo simulation, the X-axis alignment tolerances, respectively, are 140 μm for H = 50 μm, 116 μm for H = 70 μm, 96 μm for H = 90 μm, 78 μm for H = 110 μm, 64 μm for H = 130 μm, and 56 μm for H = 150 μm, as listed in Table 1, except the condition of H = 30 μm which is also hard to define. The maximum improvement can be 7 times the alignment tolerance of a bare chip.
The effectiveness of the = 250 μm MBL-integrated photodiode is also demonstrated by the practical device fabrication and measurements. As the results of H = 110 μm (triangles) and H = 50 μm (circles) are plotted in Fig. 17(b), the measured alignment tolerances along X axis are 62 and 150 μm, respectively. Thus, the improvements are 3.1 and 7.5 folds, respectively. These data still match the simulated results. Such the wide alignment tolerances are enough for the conventional passive scheme for photodiode package.
As revealed from the results above, the optimal condition for this = 250 μm ruby ball-lens integrated photodiode would be H = 50 μm and the theoretical alignment tolerance is 1150 μm 140 μm. It means that we can have a MBL integrated photodiode with a 6.76- 7-fold improvement. The practical device based on this condition has been fabricated and has an alignment tolerance of 1120 μm 150 μm which matches the simulated results.
The one-dimensional simulation provides a promising way to quickly search the optimal condition for this MBL integrated photodiode. Furthermore, the two-dimensional simulation can show us more clear information for widening the alignment tolerance. The two-dimensional responsivity for the optimal case is drawn in Fig. 18(a). According to the simulation, the alignment tolerance is 1150 μm 180 μm. The result in X axial here is wider than that from one-dimensional simulation. It represents that the optimal X-axis alignment tolerance is not at ΔZ = 400 μm but at ΔZ = 150 μm.
For ray trace analyses, we recorded the ray incident location on the photodiode surface. The four positions we chose to locate a SMF light source are b: ( ΔX, ΔZ in μm) = (0, 200), c: (0, 800), d: (0, 1900), and e: (-80, 300) labeled on the responsivity surface. The corresponding maps are sequentially illustrated in Figs. 18(b), 18(c), 18(d), and 18(e). Inspection of this figure reveals that only if the SMF is operated within the alignment tolerance region, most rays are incident at the active area, not the area outside which may degrade the high-speed performance of the InGaAs photodiode. The reason why the responsivity is reduced as observed in Figs. 18(b), 18(d), and 18(e) is attributed to some of the rays to be incident at the metal contact and then can be reflected.
Such evidence indicates that no detrimental effects but alignment tolerance enhancements are brought by the MBL integration. Fig. 19 shows the experimental results by two-dimensional scanning across the device. The practical alignment tolerance for this = 250 μm ruby ball-lens integrated photodiode is 1120 μm 174 μm marked in this figure. Within the 1-dB alignment tolerance region, we try to measure its dynamic characteristic. Fig. 20 shows the back-to-back eye diagram at the 10.3-Gb/s data rate. It is observed that the eye diagram of 1.3-μm wavelength is distinguishably open and free of intersymbol interference and noise. These characteristics prove that the MBL integrated InGaAs p-i-n PD is indeed well qualified for high-speed fiber communication.
We have demonstrated the PIN PDs whose configuration is suitable for broad spectral range operation. The spin-on diffusion has several excellent advantages for junction formation, such as good uniformity, simple process, high yield and low cost. Here we present the process and condition for creating shallow p-n junctions of InP/InGaAs and GaSb wafer applied SOD technique. By selectively removing the wide-bandgap cap layer on top of the conventional InP/InGaAs or InGaP/GaAs p-i-n PDs, such a wide-wavelength photodiode can be achieved. This spectral range covers all the wavelengths of interest nowadays in fiberoptic communications: 0.65, 0.85, 1.3, and 1.55 μm. With the optimized design of antireflection coating, both the PDs exhibit a dark current smaller than several pA, the photodiode has a 3-dB bandwidth of ~10 GHz. In addition, InP/InGaAs and InGaP/GaAs p-i-n PDs show high quantum efficiency in the 300-850 nm and 0.85-1.65 μm spectral range, respectively. Since both high-efficiency and high-speed operation can be achieved, receivers based on such devices are suitable for both 850- and 650-nm fiber communication systems.
By selectively removing the InP cap layer and integrating with a micro-ball-lens, we have demonstrated the alignment tolerance enhancement of 10-Gb/s InGaAs p-i-n photodiode by integrating a ϕ = 250 μm ruby micro ball lens on a chip. According to the Monte-Carlo ray trace simulation, the available alignment tolerance for positioning a 1.3-μm single-mode fiber light source can be found by varying the lens socket height. The maximum alignment tolerances are 1150 and 180 μm along the longitudinal and transverse axes, respectively, which are 6.76- and 7.5-fold improvements to the chip without micro-ball-lens integration. The modeling results are proven through practical measurements. Such ball-lens-on-chip scheme for enlarging the effective coupling aperture is efficient and cost-reductive process for the small-aperture photodiode package.