Abstract
The variation of line impedance has always been a great concern for grid operators and industrial users. The problem is that the reliability and quality of the supplied power are influenced by this variation. Indeed, several standards and grid requirements fix strict rules and rigorous standards when connecting or disconnecting from the public grid. In this context, this chapter proposes a full study of a line impedance emulator, which includes the power design and the control. The line impedance emulator is useful for small scale laboratories that develop distributed energy generation. Developed line impedance emulator is based on a three-phase power converter. For these converters, different controls are applied, including proportional integral and resonant controllers. For the generation of voltage reference values that correspond to expected line impedance, two algorithms are studied, namely, trigonometric functions-based algorithm and voltage drop-based algorithm. The theoretical study is supported by simulation and experimental results.
Keywords
- power quality
- distributed energy generation
- microgrid
- line impedance emulation
- resonant controller
1. Introduction
Nowadays, with the tremendous increase of distributed energy generation (DEG), the concept of power quality (PQ) has become a growing concern for grid operators around the world [1, 2, 3, 4]. Many research teams working on this topic are developing small or large-scale DEG laboratories (Figure 1) [3, 4, 5, 6, 7, 8, 9] as well as algorithms for critical situations is the grid emulator. This grid emulator is also used to confirm the compliance with standards and different grid codes [10, 11, 12, 13].

Figure 1.
Example of a microgrid including line impedance emulators.
This chapter covers one of the functionalities of the grid emulator, which is the line impedance emulation. Indeed, line impedance deviation can be caused by several circumstances, such as, a remote grid fault, or a connection disconnection of a large load in the distribution network [14].
The line impedance variation is able to considerably affect reactive power sharing between parallel loads [15, 16], and it can also induce operation instability in case of standalone microgrid [17, 19]. In addition, line impedance value has an influence on the quality of voltage and line current in the point of common coupling of the microgrid [19]. In another hand, tests introducing line impedance variation are used for the compliance with many relevant standards especially those dealing with anti-islanding.
This chapter explains in details the steps of the line impedance emulator design based on power converters. Regarding line impedance emulation algorithm, reference voltage values are deduced in view of the phase shift with the input AC grid voltage, according to the equipment under test (EUT) active and reactive power. Presented emulator guarantee flexible tests with decoupled variation range of impedance component.
This chapter first outlines modeling of line impedance emulator, followed by a description of the control methodology for the overall, simulation results and experimental validation are then developed.
2. Line impedance emulator presentation
The line impedance emulator is installed between the grid and the EUT and used for the emulation of variable line impedance. The structure of the studied line impedance emulator system is shown in Figure 2. It incorporates two power converters joined by dc-link capacitor: an EUT side converter (EsC) and a grid side converter (GsC). The GsC and the EsC are AC/DC and DC/AC converters, respectively. To mitigate switching harmonics, an LCL filter is employed at the output of the EsC. The EsC control aims to maintain the voltage through the LCL filter capacitor

Figure 2.
Power converter-based three-phase line impedance emulator.
The flowchart of the line impedance emulator process is given by Figure 3. The first step of this flowchart consists in initializing the different functions and the microcontroller peripherals such as the ADC, Timers and the General Purpose Input/Output (GPIO) as well as the analog-to-digital conversion of the measured voltages and currents. The next step is to control of the GsC. The objective of this control is voltage at the DC bus regulation. In parallel with these steps, the impedance emulation algorithm provides the capacitor voltage references

Figure 3.
Line impedance emulator process flowchart.
Figure 4 summarizes the different steps of the line impedance emulator design. As mentioned, the first step consists in modeling the two power converters of the line impedance emulator giving the system equations and transfer functions. After that, the operator selects the appropriate control converters control in terms of dynamic response, THD value, steady state error and sensitivity to perturbation and parametric variation. In this chapter, the control of the line impedance emulator converters employed resonant controllers and PI regulators. This choice is due to their simple use (tuning parameters and implementation), while ensuring simultaneously acceptable dynamic response, THD value and steady state error. Then, based on the obtained system transfer functions, the control parameters are deduced. After that, the operator should select the appropriate line impedance emulator algorithm. In this chapter, two impedance emulator algorithms will be presented. The next step of the design methodology consists in simulating the whole system including the power converters, the control strategy and the line impedance emulation algorithm. When the simulation results verify the proper system operation, the control will be implemented on a digital board. The last step of the design methodology consists in the experimental validation of the line impedance emulator.

Figure 4.
Methodology of the design of a line impedance emulator.
3. Line impedance emulator modeling
The GsC power circuit single phase representation is depicted on Figure 5, where

Figure 5.
GsC power circuit.
The EsC power circuit single phase representation is given by Figure 6. Based on this Figure, the equations related to the EsC are given by Eq. (2), Eq. (3), Eq. (4) and Eq. (5). The obtained single phase simplified block diagram of the LCL-EsC is depicted on Figure 7.

Figure 6.
EsC power circuit single phase representation.

Figure 7.
LCL-EsC simplified block diagram.
4. Line impedance emulation control
4.1 Grid side converter control
Figure 8 shows the GsC control. It incorporates two control loops. The internal loop controls in the

Figure 8.
Block diagram of GsC control.
4.1.1 Tuning of the PI regulator of the voltage at the DC bus
Based on Figure 9, the current

Figure 9.
DC bus voltage regulation loop simplified block diagram.
Since the current
The transfer function of the PI regulator is given by Eq. (8). Based on this equation and neglecting the load current
The transfer function of Eq. (9) is a second-order system whose denominator can be written in the canonical form of a second-order system given by the right-hand side of Eq. (9). By identifying the terms of Eq. (9), the obtained transfer function is characterized by a damping ratio
Then, the form and the dynamics of the response of the DC bus voltage
4.1.2 Tuning of the resonant controller of the grid side current
The use of the PWM makes it possible to have a fundamental of the voltage

Figure 10.
Grid current regulation loop simplified block diagram.
Considering Figure 10, the closed-loop system transfer function (
For the synthesis of the resonant controller parameters, we consider the pole placement method and more precisely the Naslin criterion [20, 21]. The
From Eq. (14), we deduce the system characteristic polynomial given by Eq. (16).
The identification between the system characteristic polynomial
4.2 EUT side converter control
The control based on resonant controller for the EsC is depicted on Figure 11. This control includes an external and an internal loops. The external one controls the voltages through the filter capacitor

Figure 11.
Block diagram of the EsC control.
4.2.1 Tuning of the resonant controller of the voltage through the LCL filter capacitor
For reasons of simplification, it is assumed that the internal loop of the current is faster than the external loop of the voltage. Thus, we can approximate it equal to the unity by associating the PWM function. Consequently, the block diagram of the voltage regulation loop is given by Figure 12.

Figure 12.
Voltage regulation loop simplified block diagram.
Hence, the closed loop system transfer function (
The method chosen for the computation of the resonant controller parameters is based on the generalized stability criterion [22]. In this case, the
On the other hand, based on Eq. (19), the system characteristic polynomial
The identification of
4.2.2 Tuning of the gain of the current i1
The simplified internal current regulation loop block diagram is given by Figure 13.

Figure 13.
Current regulation loop simplified block diagram.
Hence, the transfer function of the closed-loop system
5. Line impedance emulation algorithms
In this section, two methods of the line impedance emulator algorithm synthesis are presented: the trigonometric functions-based algorithm and the voltage drop-based algorithm.
5.1 Trigonometric functions-based algorithm
The impedance emulation conception is based on the phasor diagram depicted on Figure 14 According to this Figure, the apparent power

Figure 14.
Line impedance and phasor diagram.
According to Figure 14, the reactive power
Figure 15 shows the trigonometric-based line impedance emulation algorithm. The first step consists in measuring the grid voltage

Figure 15.
Line impedance emulator algorithm-based trigonometric functions.
5.2 Voltage drop-based algorithm
This algorithm is based on a voltage drop

Figure 16.
Voltage drop line impedance emulator principle.

Figure 17.
Reference voltage according to fixed line impedance.
6. Simulation and discussion
Simulation tests were performed under PSIM software. The proposed control was applied to a 20kVA line impedance emulator. Table 1 gives the line impedance emulator parameters. In Figure 18 is presented the
Description | Symbol | Value | Unit | |
---|---|---|---|---|
Nominal voltage line-line | 400 | V | ||
GsC nominal power | 20 | kVA | ||
EsC nominal power | 20 | kVA | ||
LCL filter | Converter side inductor | 2 | mH | |
EUT side filter inductor | 2 | mH | ||
Capacitor | 30 | μF | ||
Switching frequency | 10 | kHz |
Table 1.
Line impedance emulator parameters.

Figure 18.
Vdc response to a step reference of 100 V.

Figure 19.
Line impedance emulator output in case of voltage reference magnitude change.

Figure 20.
Simulation control scenario.

Figure 21.
System output for real and programmed impedance for X = 1.5 Ω and R = 1 Ω.
7. Experimental validation
Figures 22 and 23 show the experimental prototype and the test bench for the line impedance emulator. It includes (1) an auto transformer used in order to vary the voltage peak magnitude; (2) an L filter (composed of three inductors (20 mH/20A) with 0.3 Ω internal resistors; (3) a 20 kVA AC/DC converter (GsC); (4) a dc-link capacitor (1100 μF/800 V); (5) a 20 kVA DC/AC converter (EsC); (6) an LCL filter (composed of three inductors (2 mH/10 A) with 0.1 Ω internal resistors, three capacitors (4 μF/400 V) and three inductors (2 mH/10A) with 0.1 Ω internal resistors); (7) a measurement board (LEM LA55 and LEM LV25 for currents and voltage measuring, respectively); and (8) the STM32F4-Discovery digital solution. It is worth noting here that two STM32F4-Discovery cards were used in the experimental test bench; the first one is dedicated to the GsC control and the second one is dedicated to the EsC control.

Figure 22.
Experimental prototype.

Figure 23.
Experimental test bench.
For both GsC and EsC controls, the switching frequency was fixed equal to 10 kHz. For experimental tests, the switching frequency is equal to 10 kHz, the voltage at the DC bus

Figure 24.
DC bus measured voltage and reference values.

Figure 25.
Emulator output voltage Vc(abc) for voltage reference change from 20 to 10 V.

Figure 26.
Line impedance emulator input Vina and output Vouta for different values of R and L.
8. Conclusion
In this chapter, line impedance emulator was studied. This equipment is used in small scale laboratories studying distributed energy generation. It ensures power tests with variable line impedance. Presented line impedance emulator is based on two power converters connected via a dc-link capacitor. Theoretical study is detailed and validated by simulation and experimental tests. The proposed study describes in detail the control design of each power converter. In addition, two variants of line impedance emulator algorithms were synthesized. To prove the efficiency of the presented study, a test with a real impedance and an emulated one was performed and obtained results show the similarity of system responses with both equipment.
Acknowledgments
This work was supported by the Tunisian Ministry of High Education and Research under Grant LSE-ENIT-LR 11ES15.