Open access peer-reviewed chapter

Fault Diagnosis of Switched Reluctance Motors in Electrified Vehicle Applications

By Yihua Hu, Chun Gan, Wenping Cao and Stephen Finney

Submitted: April 29th 2015Reviewed: October 1st 2015Published: December 9th 2015

DOI: 10.5772/61659

Downloaded: 2222

Abstract

Electric vehicles (EVs) and hybrid electric vehicles (HEVs) can reduce greenhouse gas emissions while switched reluctance motors (SRMs) are one promising motor technology for EVs. This chapter illustrates the fault diagnosis and fault tolerance operation of SRM-based EVs/HEVs, where high reliability is a vital factor involving human lives. Based on the traditional asymmetric half-bridge topology for SRM drives, the characteristics of switching devices upon open-circuit and short-circuit are analyzed, and the corresponding fault diagnosis methods are developed. In order to achieve fault tolerance operation, the central point of SRM stator winding is tapped to form a modular half-bridge configuration to provide fault diagnosis and fault tolerance functions. The fault diagnosis functions are set idle in normal conditions. Simulation results in Matlab/Simulink and experimental results on a 150-W four-phase 8/6 SRM are used to validate the fault identification, and on a 750-W, three-phase 12/8 SRM are used to validate the fault tolerance operation of the proposed strategy, which may have significant implications for EV/HEV applications.

Keywords

  • Electrified vehicles
  • fault tolerance
  • motor drives
  • switched reluctance motors

1. Introduction

Currently, electric vehicles (EVs) and hybrid electric vehicles (HEVs) represent the future of green transportation and thus are under extensive development across the world [1-3]. In terms of motor drive topology, high-performance permanent magnet (PM) motors are advantageous due to their high efficiency and high torque density [4, 5], but unsustainable for mass production market such as EVs/HEVs because of the scarcity of rare-earth materials they rely on. Considering this reason, more efforts have been devoted to the development of rare-earth-free motor or rare-earth-less motor for future EVs and HEVs [6, 7]. In contrast, switched reluctance motors (SRMs) are becoming a mature technology and are considered to have commercial potentials in widespread applications due to their rare-earth-free feature and wide-range torque-speed characteristics. SRMs have the advantages of robust mechanical structure, low cost, high efficiency, and a wide speed range [8-10]. Hence, the SRM drives have been considered as an attractive solution for the drivetrains of EVs and HEVs [11, 12]. However, to promote the application of SRMs in EVs and HEVs, the following two issues should be properly addressed: 1) the reduction of the weight, complexity, and cost of the drives; and 2) the improvement of the performance and reliability.

In order to satisfy the mentioned requirements, this chapter focuses on fault diagnosis and fault tolerance operation; a new modular fault tolerant topology is proposed on the basis of the traditional SRM driving topology; and the corresponding fault diagnosis and fault tolerance schemes are proposed by trade-off hardware and software.

1.1. Principle of SRM

The structure and principle of switched reluctance motors (SRMs) are derived from 1840s, when the researchers realized that motors can operate by taking advantage of magnetic pull in order. However, the development of high-power thyristors makes it possible to further study of SRM until the 1960s, and then the SRM realized its rapid development in the next time.

As a new speed control system, SRM drive system is integrated with power electronic technology, computer control technology, and microelectronics technology. It has the advantages of both ac and dc speed control systems. Due to its simple structure, low cost, fault-tolerant ability, high efficiency, and wide speed range, SRM has been widely applied in new energy electric vehicles, household appliances, and aviation industry and renewable energy.

The SRM driver system is mainly composed of SRM, power converter, controller, position detector, and current detector, as shown in Figure 1. The SRM has double salient poles structure, and the concentrated windings are rolled around its stator, while its rotor is only made up of silicon steel sheets. Figure 2 shows the structure of a conventional four-phase 8/6-pole SRM. The power converter has many kinds of topologies, while the asymmetrical half-bridge converter topology is one of the most commonly used topologies, as shown in Figure 3.

Figure 1.

SRM driver system.

Figure 2.

8/6-pole SRM.

Figure 3.

Power converter.

The SRM operation follows the principle that the magnetic flux is always closed along the path of least resistance. When a rotor pole is unaligned with the corresponding stator pole, the magnetic permeance is not at the maximum and the magnetic field can produce a magnetic pull to align with the corresponding poles, as shown in Figure 4. If the conduction sequence of each phase is changed, the motor will rotate inversely. However, the change of phase current direction would not influence the motor rotation.

Figure 4.

Operation of SRM.

SRM still has some disadvantages due to its special structure and operation mode, such as high torque ripple and noise, and it is difficult to establish the accurate mathematical model. In order to make up for these shortcomings, a lot of technologies have been developed. The optimization of motor structure and the adoption of effective control strategies are used to suppress the torque ripple and noise. And some schemes aim at sensorless control and new power converter topology.

2. Fault diagnosis methods

SRM drives are known to be fault-tolerant by their nature but not completely fault-free. Open-circuit faults are a common fault type of the motor drive, leading to starting difficulty, over-currents, high torque ripples, and reduced load capacity [13, 14]. Due to the harsh condition EVs/HEVs operate at, the switching devices can easily break down. In this section, the fault characteristics of SRM under open-circuit are illustrated; and the fault diagnosis strategy is also presented.

2.1. SRM fault characteristics

Open-circuit faults are common in SRM drives. As shown in Figure 5, there are many locations to initiate an open-circuit fault, such as power converter, motor windings, position signals, and drive circuit. However, the power converter is a crucial component in an SRM drive and is also a vulnerable part in the system [15, 16].

Figure 5.

Open-circuit faults for SRM drives.

Each bridge arm is controlled independently by two switches and each phase is independent of each other, providing good fault tolerance. The system will work in the open-circuit state when an open-circuit fault occurs in upper-switch or lower-switch. The average electromagnetic torque under healthy conditions is given by:

Tav=mNr2π02π/NrTα(θ,i(θ))dθE1

where m is the phase number, Nr is the number of rotor poles, θ is the rotor angular position, and Tα(θ,i(θ)) is the instantaneous torque of one phase. When the open-circuit faults occur at k phases, the faulty phase windings lose excitation but other healthy phases can still operate normally. In this condition, the average torque of the system is given by:

Tfav=mkmTavE2

2.2. Bus current detection

The voltage equation for phase A is given by:

Ua=Raia+La(θ)diadt+iaωdLa(θ)dθE3

where Ua is the phase voltage, Ra is the phase resistance, La is the phase inductance, ia is the phase current, ω is the motor angular speed, and θ is the rotor position.

The phase current can be written as:

ia(t)=UaRa+ω(dLa/dθ)(1et/τ)E4

The branch current of phase A is given by:

idc_a={iaS1close,S2close0S1open,S2closeiaS1open,S2openE5

For a four-phase motor, the bus current idc is the sum of four branch currents, given by:

idc(t)=idc_a(t)+idc_b(t)+idc_c(t)+idc_d(t)E6

Three bus locations can be defined as follows:

  1. When each phase is in the turn-on region [θon-θoff], the phase voltage is:

Uk={Usupperswitchclose,lowerswitchclose0upperswitchopen,lowerswitchcloseE7

where Us is the dc voltage output of the rectifier from the ac power supply. The bus current is in the chopping control state i.e., chopping bus current, denoted by idc2.

  1. When each phase is in the turn-off region [θoff -θon+π/3], the upper-switch and lower-switch are both shut off, and Uk=-Us. The bus current is in the phase demagnetization state, i.e., demagnetization bus current, denoted by ifc.

  2. The bus current in each phase excitation state contains both the chopping bus current and reverse demagnetization bus current, i.e., excitation bus current, denoted by idc1.

idc1=idc2ifcE8

Based on the three bus locations, there are three current sensor placement strategies in the converter, as illustrated in Figure 6. The corresponding detected currents are the chopping bus current in Figure 6(a), the demagnetization bus current in Figure 6(b), and the excitation bus current in Figure 6(c).

Figure 6.

Three bus current detection schemes. (a) Chopping bus. (b) Demagnetization bus. (c) Excitation bus.

2.3. Fault diagnosis based on the FFT algorithm

The FFT algorithm with Blackman window function interpolation is employed to analyze the current spectrums due to smaller side lobe, and better harmonic amplitude accuracy [17].

The fundamental frequencies of the phase current and bus current are given by:

f1=nNr/60E9
fbus=mf1=mnNr/60E10

where f1 is the fundamental frequency of the phase current, fbus is the fundamental frequency of the bus current in normal conditions, n is the motor speed in rpm, and Nr is the number of the rotor poles.

The excitation bus current spectrums before and after the open-circuit faults are shown in Figure 7. There are no harmonic components at f1 for bus current in normal condition, as shown in Figure 7(a). The dc component A0 changes little after phase A open, while the phase fundamental frequency component Af1, double-phase fundamental frequency component Af2, and triple-phase fundamental frequency component Af3 all increase, especially Af1, as shown in Figure 7(b).

Figure 7.

Simulation spectrums of the excitation bus current (a) Normal condition. (b) Phase A open. (c) Phases A and B open. (d) Phases A and C open.

The phase fundamental frequency component Af1 and double-phase fundamental frequency component Af2 are normalized to the dc component A0 of the bus current, and the equations are formalized as:

A1*=Af1/A0E11
A2*=Af2/A0E12

where A1* and A2* are defined as the normalized components of A1 and A2.

The simulation results at seven different speeds are shown in Table I. The values of A1* and A2* are stable at different speeds in the same failure mode. There is no fundamental component in the bus current spectrum under normal conditions; hence, A1* is zero when healthy. It increases to 0.7–0.8 when phase A is open, and increases to 1.5–1.7 when phases A and B are open. Similarly, A2* rises to about 1.0 when phases A and C are open. Clearly, the normalized components can be used to link with open-circuit faults.

Experimental tests are carried out on a 150-W four-phase 8/6-pole prototype SRM. An asymmetric half-bridge converter is employed in the system, and a DSP TMS320F28335 is used as the main control chip. A fuzzy control algorithm with PWM voltage regulation control is implemented for the closed-loop system. The turn-on angle is set to 0° and the turn-off angle to 28°. An adjustable dc power supply is employed to drive the converter with a 36-V voltage. The IGBT gate signals are controlled to emulate the open-circuit faults.

Speed
[r/min]
Phase A openPhases A and B openPhases A and C open
A0 [mA]A f1 [mA]A1*A0 [mA]A f1 [mA]A1*A0 [mA]A f2 [mA]A2*
40034.6325.710.7432.5250.731.5633.6632.720.97
60047.0233.120.7145.7867.301.4744.8646.251.03
80062.2647.460.7661.88100.241.6260.2558.910.98
100073.8156.950.7770.66122.241.6371.3268.960.97
120086.7265.320.7584.93139.281.6482.1378.680.96
140099.8674.110.7498.32155.351.5898.1896.210.98
1500108.6383.930.77106.21176.311.66105.26102.580.97

Table 1.

Simulation results of the excitation bus current

Figure8 (a)-(d) shows the chopping bus current idc1, excitation bus current idc2, and demagnetization bus current ifc before and after phase A open, phases A and B open, and phases A and C open, respectively, at 600 r/min. The FFT algorithm with Blackman window interpolation is generated on the bus current before and after the fault, ranging from 400 to 1500 r/min.

Figure 8.

Experimental results of bus currents. (a) Healthy. (b) Phase A open. (c) Phases A and B open. (d) Phases A and C open.

The phase fundamental frequency component Af1 is very small at normal conditions. However, Af1 is zero in the simulation due to an ideal condition, while a small harmonic component exists in the phase fundamental frequency because of the electromagnetic interference (EMI) and rotor eccentricity in real conditions, which does not affect the accuracy of the diagnosis. The dc component A0 does not change and the phase fundamental frequency component Af1 increases obviously when faults happen. Hence, A1* increases both after phase A open and after phases A and B open.

The fault characteristics of the bus current before and after phase A open and phases A and B open are shown in Figure 9. A1* of the excitation bus current, chopping bus current, and demagnetization bus current are all below 0.05 at normal conditions, while the values are stable within 1.6–1.7, 0.9–1.0, and 1.4–1.5, respectively, when phases A and B are open-circuited. Clearly, the fault characteristics confirm that the normalized phase fundamental frequency component of the bus current can be used as the open-circuit fault signature.

Figure 9.

Fault characteristics before and after open-circuit faults. (a) A1* of excitation bus. (b) A1* of chopping bus. (c) A1* of demagnetization bus. (d) A2* before and after phases A and C open.

Under phases A and C open condition, A1* cannot be used to diagnose this fault since there is no change in Af1 compared to the normal state, as shown in Figure 9(d). However, Af2 changes obviously and its normalized component A2* can thus be used for this diagnosis. Figure 9(d) shows A2* before and after phases A and C open. Curve 1, curve 2, and curve 3 represent A2* of the chopping bus current, excitation bus current, and demagnetization bus current, respectively, in normal conditions. Curve 4, curve 5, and curve 6 represent A2* of the chopping bus current, excitation bus current, and demagnetization bus current, respectively, when phases A and C are open-circuited. As illustrated in the figure, the stability for curve 6 is poor, and the value declines as the speed increases, while the fault characteristic of curve 5 is more significant and more stable compared to others, which can be used for diagnosis of this fault.

By comparing the three fault characteristics, it becomes clear that the excitation bus current shows a good correlation with the faults. Therefore, it is chosen to extract the fault characteristics for fault diagnosis.

The fault characteristic has good robustness, as shown in Figure 10. A1* has good disturbance resistance to the changes in the load and turn-on angle. Therefore, this diagnostic method is suitable for variable load drives and variable angle control systems. It needs to point out that the sampling frequency should be greater than the PWM chopping frequency to ensure the accuracy of the current detection and harmonic analysis.

Figure 10.

Load torque and turn-on angle in relation to A1*. (a) A1* with load torque. (b) A1* with turn-on angle.

Figure 11 shows the value of A1* when the system is subject to a fast transient disturbance. Clearly, A1* does not change with the load variations, speed regulation, and angle modulation. Therefore, the proposed method has excellent robustness to the fast transients, which would not generate false alarms.

Figure 11.

Fast transients in relation to A1*. (a) Load variation. (b) Speed regulation. (c) Angle modulation.

3. Fault tolerant topology

Traditionally, the SRM phase windings are composed of an even number of series connected windings, as shown in Figure 12. Thus, central-tapped windings are formed, which can be easily designed in 8/6 or 12/8 SRM. Figure13 shows the traditional 12/8 SRM winding connection, in which La1, La2, La3, and La4 represent for four windings of one SRM phase; the central tapped node A of phase La is developed as shown in Figure 13. One phase of SRM drive circuit is composed by traditional asymmetrical half-bridge topology and phase winding; the whole circuit can be divided into two parts: left part and right part; each part has the same components, including diode, switching device, and phase winding, as presented in Figure 14. The two parts have the characteristics of axial symmetry that can be employed in fault tolerance operation. When the central tapped node is connected with positive node of power supply source, the left part of the converter is bypassed, which can block the left part fault. The same method, when the central tapped node A is connected with negative node of power supply source, the right part of the converter is bypassed, which can block the fault from right part.

Figure 12.

Basic winding structure of SRM.

Figure 13.

Central-tapped winding of a 12/8 SRM.

Figure 14.

Two parts of phase converter.

On the basis of the central tapped node and axial symmetry characteristics of the traditional drive topology, the proposed fault tolerant topology is presented in Figure15. Figure 15(a) is the main driving topology composed of main topology (traditional asymmetrical half-bridge) as Figure 15(b), and fault tolerance module as Figure 15(c). The fault tolerance module is the traditional three-phase half-bridge modular. The half-bridge central nodes are connected with central tapped node of phase windings, which are A, B, and C, respectively. Three-phase half-bridge is employed to approach fault tolerance operation. The proposed topology has the characteristics of modular structure; on the base of traditional asymmetrical half-bridge topology, only one three-phase bridge modular is needed. The basic structure of SRM is almost not changed. In normal conditions, the proposed topology works as traditional asymmetrical half-bridge topology; the fault tolerance module is in idle condition that makes the proposed converter have the same efficiency as the traditional asymmetrical half-bridge topology. The fault tolerance module works only at fault condition.

Figure 15.

Proposed topology for SRM fault tolerance operation.

3.1. Switching device faults and phase winding open-circuit faults

Switching device faults and phase winding open-circuit faults are common fault phenomena. In the traditional asymmetrical half-bridge converter, there are two switching devices for each phase; and each phase has four windings for a 12/8 SRM. When there is no current in the excitation region in phase La, it means that the open-circuit occurs. The diagnosis needs to locate which part is under fault condition by replacing S0 by SA1, and giving the turn-off single to S0. In the right part of the converter, SA1, SA2, D1, S1, and La34 compose a new asymmetrical half-bridge. In the right part asymmetrical half-bridge, if the faulty phase can work, it proves that the left part of converter is under fault condition. By the same method, replacing S1 by SA2, and giving the turn-off single to S1; in left part of converter, S0, SA1, SA2, D0, and La12 compose a new asymmetrical half-bridge. In the left part asymmetrical half-bridge, if the faulty phase can work, it proves that the right part of the converter is under fault condition. The diagnosis flowchart of the open-circuit fault is shown in Figure 16.

3.2. Fault tolerance operation under open-circuit fault conditions

When a faulty part is identified in the faulty phase, the fault tolerance module and main topology combines new topology for faulty phase converter. If the left part of one phase converter is in fault condition, in the fault tolerant topology, the left part of one phase converter, including the switching device S0, diode D0 and phase winding La12, is shorted by half-bridge SA1 and SA2 to block faulty part. Figure 17(a) is the typical example of S0 under open-circuit condition. When open-circuit fault occurs, the half-bridge SA1 and SA2 is activated to combine with right part converter to form a new fault tolerant topology. In the new-formed fault tolerance operation topology, when SA1 and S1 conduct, the excitation circuit is shown in Figure 17(b). Figure 17(c) presents the energy-recycling mode, in which the winding voltage is –Uin to speed up winding demagnetization. Figure 17(d) shows the freewheeling conduction mode, in which the winding voltage is 0. The working modes of the fault tolerance converter are the same as a traditional converter, except only a half phase-winding is operating.

Figure 16.

Flowchart for the diagnosis of the open circuit fault.

Figure 17.

Fault tolerance operation topology under open-circuit condition.

The same fault tolerance operation can be achieved, when D0 or La12 is faulty. When the right part of one phase converter is under open-circuit fault condition, the left part of one phase converter and fault tolerance module can combined to form a new fault tolerant topology, using the same method as Figure 17.

3.3. Switching device and phase winding short-circuit fault diagnosis

When S0 is short-circuited, a freewheeling loop is formed, as shown in Figure 18(a). When the short-circuit fault of switching device S1 occurs, the only freewheeling mode is illustrated in Figure 18(b); both in Figure 18(a) and 18(b) fault condition, the corresponding phase current is always over zero, which can be employed in short-circuit fault diagnosis.

When a short-circuit fault is detected, the next step is to locate which switching devices is under fault condition. For example, if S0 has a short-circuit fault, SA1 is enabled by giving drive signals to replace S0. The right part of converter and half-bridge compose a new asymmetrical half-bridge. In the right-part asymmetrical half-bridge, if the freewheeling current can decrease to zero, the faulty part can be located in S0; the right-part converter and half-bridge can form a new converter to achieve fault tolerance operation that is the same as open-circuit. The diagnosis flowchart of the short-circuit fault is shown in Figure 18(c).

The left part of the converter and half-bridge compose a new asymmetrical half-bridge. In the left-part asymmetrical half-bridge, if the freewheeling current can decrease to zero, the faulty part can be located in S1; the left-part converter and half-bridge can form a new converter to achieve fault tolerance operation that is the same as open-circuit.

For instance, when the switching device S0 is short-circuited, the half-bridge arm and right-part converter form new topology. In order to block the faulty part, switching devices S1 is employed as chopping devices. In excitation and freewheeling state, due to SA1 conducting, both sides of phase winding La12 share the same electric potential, which prevents the current forming in La12; in energy recycle mode, there is no current loop for La12. Therefore, in the three basic working states, there is no current in phase winding La12, as presented in Figure 19(a)-(c),which proves that left-part converter is blocked. Similarly, when switching device S1 is in short-circuit condition, in order to block the right-part converter, S0 is employed as chopping switch.

Inner turn short-circuit faults are also the faults to cause the decreasing of phase inductance; but the faulty phase still can operate. The proposed fault tolerance strategy also can bypass the short-circuited part to stop it from propagating.

Figure 18.

Diagnosis of switching device short-circuits.

Figure 19.

Fault tolerance operation under S0 short-circuit condition.

3.4. Fault tolerance operation control strategy

After locating a fault part, the corresponding fault tolerance control strategy is needed to deal with the faulty condition.

Figure 20.

Relationship between the phase current and phase inductance.

Figure 20 shows the relationship between phase current and phase inductance. As illustrated in the figure, θon and θoff are the turn-on and turn-off angles, respectively, i1 and L1 are the phase current and phase inductance under the normal conditions, i2 and L2 are under the fault tolerance conditions, and i4 and i5 are the phase currents when the turn-on angle is set lagging behind. Figure 20(a) shows the phase current and phase inductance in the fault tolerance operation with a half phase winding, compared to a normal operation. Figure 20(b) shows that the phase current operates in fault tolerance conditions when the turn-on angle is set lagging behind.

The phase inductance slope factor in the inductance ascending region is expressed as:

KL=LmaxLminθ3θ2E13

where Lmin and Lmax are the minimum and maximum of the phase inductance, and θ2 and θ3 are the corresponding rotor position.

In the region of θonθ<θ2, the phase current is expressed as:

i(θ)=UinωrθθonLminE14

where Uin is the bus voltage, and ωr is the angular velocity. In this region, the phase current goes up quickly, following the current slope factor Ki, given by:

Ki=didθ=UinωrLmin>0E15

In the region of θ2θ<θoff, the phase current is expressed as:

i(θ)=UinωrθθonLmin+KL(θθ2)E16

The peak value of the phase current is at the position θ=θ2, which is given by:

imax=Uinωrθ2θonLminE17

The average electromagnetic torque of one phase is given by:

Tav=Nr2πUin2ωr2(θoffθ2)(θ2θonLmin12θoffθ2LmaxLmin)E18

where Nr is the rotor poles.

If the motor system has an open-circuit or short-circuit fault in the converter, the proposed converter will operate with a half part of the fault phase winding, then

{Lmax'=12LmaxLmin'=12LminE19

where Lmin’ and Lmax’ are the minimum and maximum of the faulty phase inductance.

The phase inductance slope factor in the inductance ascending region in the fault-tolerant operation is as follows:

KL'=12Lmax'Lmin'βs=12KLE20

In the region of θonθ<θ2, the phase current slope in fault-tolerant operation is as follows:

Ki'=(didθ)'=Uinωr12Lmin=2UinωrLmin=2KiE21

The peak value of the phase current at the position θ=θ2, in fault-tolerant operation, is:

imax'=Uinωrθ2θon12Lmin=Uinωr2(θ2θon)Lmin=2imaxE22

The average electromagnetic torque of the failure phase is given by:

Tav'=Nr2πUin2ωr2(θoffθ2)(θ2θon12Lmin12θoffθ212Lmax12Lmin)=2TavE23

According to Eqs. (22) and (23), the peak value of the phase current and the average electromagnetic torque of the failure phase are double of the normal value when working in fault-tolerant operation. However, in a closed-loop system, the total average electromagnetic torque is the same as that in the normal state, due to a constant load.

When an open-circuit fault of the drive happens, conventionally, the system still works in the phase absence operation to ensure the continued working ability in a closed-loop system. However, the currents of other normal phases will be larger than the previous one to compensate the torque output, due to the adjustment of the speed controller. The unbalanced phase current increases the torque ripple and the load capacity also is reduced considerably. When the short-circuit fault of the drive happens, the demagnetization current cannot decrease to zero due to a zero-voltage loop, which causes phase current to become more unbalanced and obviously increases the torque ripple.

Considering the proposed fault tolerance scheme in the CCC system, a half of the failure phase still can be put into use to ensure the torque output. Since the phase current is the control target, it will be regulated to the same reference compared to the normal one, even though a half of the failure phase is removed. In voltage-PWM control strategy, the phase voltage is the control target. The imposed voltage on each phase is the same, regardless of the whole or half of the phase winding works. In order to reduce the unbalanced phase current further in voltage-PWM system, the turn-on angle of the failure phase can be adjusted lagging behind to reduce the increased phase current in the failure winding, as illustrated in Figure 20(b). Hence, the proposed drive topology can be used to compensate the current and torque, and reduce the torque ripple to improve the drive performance in fault conditions.

3.5. Experimental verification

To verify the effectiveness of the proposed scheme experimentally, a test rig for testing a 750-W SRM prototype is set up, as shown in Figure 21(a). Two air switches are adopted to emulate open-circuit and short-circuit faults, as shown in Figure 21(b), where J1 is used to achieve an open circuit fault and J2, a short circuit fault. Figure 21(c) shows the fault tolerance control system diagram with the closed-loop speed regulation capability. As illustrated in the figure, a PI controller is used to regulate the motor speed, and the proportional gain and integral gain are 0.05 and 0.5, respectively. The current controller and voltage controller are utilized to generate the drive signals to control the motor drive in different operation modes. The position detector and speed calculator are used to give the instantaneous speed for feedback control. The current sampling and fault diagnosis schemes are employed to control the gate signals for the fault tolerant topology to operate under faulted conditions.

The type of the MOFESTs used is FDA59N30 from Fairchild Inc; and diodes are IDW75E60 from Infineon Technologies. Three current sensors (LA55Ps) are used to measure the phase currents. An incremental encoder with 1000 lines is used to measure the rotor position. A dSPACE 1006 control board is employed to implement the control scheme. A magnetic brake acts as the load with a torque of 1 N·m. The dc-link voltage is fixed to 48V. Two air switches are adopted to generate open-circuit and short-circuit faults. The torque observed in the oscilloscope is obtained online by using the real-time phase currents and rotor position to look up for the torque value in a 3D torque table that includes the T-i-θ characteristics [18, 19]. The torque data in the lookup table are measured by using a rotor-clamping device when supplying different steady currents to the motor windings in a rotor position that changes step-by-step. The output torque in the experimental waveforms is observed through a D/A converter.

The turn-on and turn-off angles are set to 0° and 20°, respectively. In voltage-PWM control system with fault tolerant topology, the turn-on angle is set to 5° to improve the phase current balance for the fault tolerance performance when the short-fault occurs. Figures 22 through 25 present the experimental results at 500 r/min, where ia, ib, and ic are the phase currents for phase A, B, and C, respectively; T* and T are the given load torque and instantaneous torque, which show a good agreement with the simulation results. Figure 22 presents the typical voltage-PWM control model waveforms of the SRM under normal, open-circuit fault, and short-circuit fault conditions. In a normal condition, three phases have the same current amplitude and shape. In an open-circuit faulty condition, there is no current in the faulty phase. In a short-circuit faulty condition, the faulty phase current cannot decrease to zero. The experiment results have agreed well with the analytical study in Section 3.3. Figure 23 verifies the control strategy under fault condition. By controlling the turn-on angle of phase A, the output torque ripple can be decreased. Figure 24 shows the typical waveforms for the current regulation control model under normal, open fault, and short fault conditions. In an open-circuit faulty condition, there is no current in the faulty phase, while in a short-circuit faulty condition, as theory analysis, the fault phase current cannot decrease to zero. The experiment results also verify the theory analysis in Section 3.2. Under these fault tolerance operation conditions, the faulty phase current and output torque with the proposed method can follow the reference values faithfully, as shown in Figure 25. This is also the case in reducing the torque ripple and the imbalance between phase currents for conventional converters with either open-circuit or short-circuit faults.

Figure 21.

Experimental setup and the control system.

Figure 22.

Experimental results of voltage-PWM control mode under normal and fault conditions.

Figure 23.

Experimental results of voltage-PWM control mode with fault tolerant topology under fault conditions.

Figure 24.

Experimental results of current regulation control mode without fault tolerant topology under fault conditions.

Figure 25.

Experimental results of current regulation control mode with fault tolerant topology under fault conditions.

Figure 26 shows the fault tolerance operation at 500 r/min and 5 N·m load in CCC and PWM systems, respectively. The system can still be stable when operating at large load and make up for the missing output torque of the fault phase. Figure 27 shows the operation of the developed system during acceleration and at high speeds with a 1 N·m load. As illustrated in Figure 27(a) , the speed follows the given value well during the continuous acceleration progress. In Figure 27(b) , the system is still stable when it is operated at 1500 r/min, which shows a good stability at high speeds.

Figure 26.

Experimental results of fault tolerance operation under the high load.

Figure 27.

Experimental results of fault tolerance operation during acceleration and at high-speed operation.

Figure 28 shows the fault tolerance operation with only a half phase winding at 500 r/min and 1 N·m load in CCC and PWM systems, respectively. The system can still operate with only a half phase winding at light load. Figure 29 shows the fault tolerance operation with only a half phase winding during acceleration and load increasing. The speed still follows the given speed well both during acceleration and in steady state. However, in Figure 29(b) , when the load increases from 1 to 3 N·m, the speed is reduced due to the insufficient load ability. Hence, in the extreme faulty conditions, the proposed fault tolerance scheme can still operate at light loads.

Figure 28.

Experimental results of fault tolerance operation with only a half phase winding in the extreme faulty condition at steady-state operation.

Figure 29.

Experimental results of fault tolerance operation with only a half phase winding during acceleration and load increasing.

4. Conclusion

In this chapter, a novel SRM fault diagnosis and fault tolerance strategy have been studied. The main contributions of this work are as follows: (i) The fault characteristics under open-circuit, short-circuit faults are researched on the basis of traditional asymmetrical half-bridge driving topology. (ii) An FFT algorithm with Blackman window interpolation is proposed for SRM fault diagnosis; the method uses the normalized harmonic component of the bus current as the open-circuit fault signature, which can detect the open-circuit faults accurately even in fast transients; the diagnosis time is within one current period, achieving a fast fault detection. (iii) A novel fault tolerance SRM topology is developed with a modular structure. (iv) The developed fault diagnosis technology can achieve convenient fault diagnosis and improve fault tolerance performance of the SRM. Overall, this work will help improve the market acceptance of SRM drives, especially for high-temperature, high-speed, and safety-critical applications.

© 2015 The Author(s). Licensee IntechOpen. This chapter is distributed under the terms of the Creative Commons Attribution 3.0 License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

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Yihua Hu, Chun Gan, Wenping Cao and Stephen Finney (December 9th 2015). Fault Diagnosis of Switched Reluctance Motors in Electrified Vehicle Applications, New Applications of Electric Drives, Miroslav Chomat, IntechOpen, DOI: 10.5772/61659. Available from:

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