Nanowire fabrication types and conditions
Due to the high potential and successful fabrication of one-dimensional nanomaterials such as carbon nanotubes and nanowires, intensive researches have been performed for practical applications (Kim. et al., 2009a).
Carbon nanotube is an ideal candidate for the high sensitive gas detection due to the peculiar hollow structure and a large surface area (Kim. et al., 2009b, Yun. et al., 2009). An electric conductive nickel silicide nanowire proved the high potential to be a functional microscopy tip, which may read the nanoscale structural and electrical information as well (Kim. et al., 2008a). Needle-shaped nanostructures would be utilized for field emitters, which may reduce the turn-on voltage by the enhanced electric field at the tips (Kim. et al., 2008b). Recently, semiconducting nanowires were applied as active light absorbers for Schottky solar cells (Kim. et al., 2009). Additionally, excellent electric conductive nanowires would provide a route to substitute the conventional copper interconnect and overcome the upcoming bottle neck of the current transport limit in a deep submicron integration (Kim. et al., 2005a, Kim & Anderson, 2006a).
Under Moore’s law the semiconductor components have been scaled-down in every two years. A significant problem of conventional copper wire may cause an electromigration when current density exceeds 106 A/cm2. Major industry leaders have predicted that the interconnect will be a significant issue for the device scale-down. ITRS (International Technology Roadmap for Semiconductors) declared that the increasing RC delay is one of the crucial problems for the device performance. A significant attention has given to the carbon nanotubes and nanowires as one-dimensional nanoscale interconnects in nanoelectronics.
There has been a remarkable interest and attention of carbon nanotubes and nanowires as one-dimensional nanoscale interconnects in nanoelectronics. Carbon nanotubes and metallic nanowires are considered as potential candidates to solve the general concerns in terms of electrical resistance and device speed. Metallic silicide nanowires have an advantage of compatibility to the Si technology over carbon nanotubes and perform uniformly. In this chapter, the growth of silicide nanowires is reviewed and the practical applications are presented. Electrical excellent silicide nanowires were applied for nanoscale interconnects and field emitters.
The silicide is a compound of Si with an electropositive component (Kim & Anderson 2005b). Silicides are commonly used in silicon-based microelectronics to reduce resistivity of gate and local interconnect metallization. The popular silicide candidates, CoSi2 and TiSi2, have some limitations. TiSi2 showed line width dependent sheet resistance and has difficulty in transformation of the C49 phase to the low resistive C54. CoSi2 consumes more Si than TiSi2 (Colgan et al., 1996). Nickel silicide is a promising material to substitute for those silicide materials providing several advantages; low resistivity, lower Si consumption and lower formation temperature (Kim et al., 2003). Recently, Ni silicide has emerged as an ideal electrical contact materials to the source, drain and gate in complementary metal oxide silicon devices and also shows an excellent scaling down behavior (Lavoie et al., 2003, Kittl et al, 2003, Morimoto et al., 1995).
2.1. Nanowire growth
Several nanowire growth mechanisms were reported, such as vapor-liquid-solid (VLS), solid-liquid-solid (SLS), and solid-solid (SS) types. The VLS type was first presented by Wagner and Treuting (Wagner & Ellis, 1964, Edwards et al., 1962) and is also the most popular method for growing nanowire today. The liquid catalyst acts as the energetically favored spot for absorbing gas-phase reactants (Morales et al., 1998). The high temperature for nanowire growth has been reduced to 320–600 C by use of gas type Si sources such as SiCl4 or SiH4 with Au (Westwater et al., 1997, Wu et al, 2004, Zeng et al., 2003). Otherwise, a high temperature close to or above 5000 C is needed to liquefy the catalyst and Si (Yu et al., 1998, Wang et al., 1999, Feng et al., 2000, Zhang et al. 1998, Geng et al. 2008).
Recently, SLS synthesis was presented. Metal catalyst coated Si prevents direct forming of vaporized Si atoms but results in liquid droplets of Si and metal, even at a high temperature of 900–950 C (Chen et al., 2003; Yan et al., 2000). It was also claimed that SS synthesis can grow nanowires at 1050 C by simple annealing in a CH4:H2 mixture gas. In this mechanism, the metal particles are observed on the tip of nanowires, different from the SLS mechanism (Lee et al., 2004).
Joondong Kim and professor Anderson (University at Buffalo, State University of New York) reported a unique mechanism of the nanowire growth in 2005 (Kim & Anderson 2005b). A unique nanowire growth mechanism is that of the metal-induced growth (MIG) method. The highly linear nanowires were grown by solid-state reaction of Ni and Si at 575 C by sputtering method. The low-temperature process is desirable for applying nanowires as nanoscale interconnections with little or no damage on the fabricated structures.
Metal-diffusion growth (MDG) was also presented by Joondong Kim et al. in 2007 (Kim et al., 2007 a). It proved the uniform composed Ni silicide nanowires grown by Plasma-enhanced chemical vapor deposition method. The processing temperature (350 oC)was much reduced. It proved the similar electrical performance of each nanowire. Pre-patterned trench fabrication is also reported (Wang et al., 2007). SiO2 patterning templates the nanowire shape and a focused ion beam milling was utilized. The summary of nanowire growth types and processing temperatures are presented in Table I.
|Growth/synthesis types||Processing temperature [ o C ]||Metal||References|
|VLS||300-600||Au||Westwater et al., 1997; Wu et al, 2004; Zeng et al., 2003|
|1150-1200||Fe||Yu et al., 1998; Wang et al., 1999; Feng et al., 2000; Zhang et al. 1998|
|5000||Ni||Geng et al. 2008|
|SLS||950||Ni||( JMR 15-16 Chen et al., 2003; Yan et al., 2000)|
|SS||1050||Ni||Lee et al., 2004|
|MIG||575||Ni||Kim & Anderson 2005b|
|MDG||350||Ni||Kim et al.,|
|Patterning||550||Ni||Wang et al., 2007|
3. Metal-induced growth
Metal-induced growth (MIG) is a spontaneous reaction of metal and solid-type sputtered Si. Professor Anderson (University at Buffalo, State University of New York) has initiated the concept to achieve quality crystalline Si for cost-effective thin film solar cells. Joondong Kim was joined his group in 2002 and had performed a research of thin film Si solar cells and observed interesting morphological changes. He and Professor Anderson revealed the unique mechanism of nanowire growth. They reported that MIG method is versatile to grow films or nanowires as well by modulating temperatures, catalysts, catalyst thickness and so on.
3.2. Crystalline film by MIG
One of the great advantages of MIG is to grow an epitaxial Si film, which adopts the concepts of solid phase crystallization and solid phase epitaxy. The deposited metal catalyst film, as a seed layer, interacts with sputtered Si to form a silicide layer, as a seed layer, to grow Si film above it. Ni and Co are common metal catalysts in the MIG method. The small lattice mismatch of CoSi2 or NiSi2 provides an excellent precursor layer to grow an epitaxial Si film as well as to render a spontaneously formed good ohmic contact layer. This MIG method is a fast Si crystallization method at a low processing temperature and would provide versatile approaches in Si application. More details may be found from the author’s previous reports (Kim & Anderson 2007b, Kim et al., 2007c, 2008b).
3.3. Nanowire growth by physical method; MIG
MIG method provide a unique mechanism of nanowire growth. Unlike the MIG film growth mechanism, it utilizes the property of fast metal diffusion to Si. MIG nanowire growth mechanism is depicted in figure. 1.
The Ni deposited layer has been grooved and agglomerated during substrate temperature ramp up and Si sputtering. The first stage of nanowire growth is grooving and agglomeration. The process temperature of 575 oC is far below the Ni melting point of 1455 oC but it is at the recrystallization temperature known as 0.3 of the melting point in metallic materials. The grain growth occurs in the Ni layer on SiO2 by thermal heating.
The larger grains grow larger at the expense of small grain shrinkage or sacrifice resulting in grooves at the grain boundaries. It has been reported that agglomeration is driven by the reduction in surface and interfacial energy and starts with grain boundary grooving in the silicide layer (Colgan et al., 1996). Deep grooves finally lead to an agglomeration phenomenon in the Ni layer. After the grooving and agglomerating stage, two different Ni layer regions may be formed; a convex-thick Ni layer part and a concave-thin Ni layer part as shown in figure 1(a).
The clustering stage followed by grooving formation affects the different preferential growing directions. Each cluster may have a different orientation which also determines nanowire growth direction. The longest nanowire growing directions are vertical or parallel to the surface. Figure 1(b) shows the clustering stage. The Si sputtering onto the Ni layer reproduces the top morphology to form nickel silicide clusters due to heteroepitaxial growth. The kinetic energy comes from the thermal heating and transferring energy from the plasma gas (H2/Ar). Because the concave region is a thinner Ni layer, this region may quickly become Si saturated resulting in no grown nanowires. The convex region with thicker Ni grows nanowires during the Si sputtering process. At times, clusters form nanofibers as in Figure 1(c). Figure 1(d) shows the segregation phenomenon resulting in several nanowires from one nanofiber. The segregation may be explained by the different thermal expansions of Ni and Si while forming Ni silicide. The thermal linear expansion coefficient for Ni is 13.3×10-6 C-1 while for Si is 3×10-6 C-1. Schematic diagrams are provided in Figure 2 to show the simplified morphological changes at each stage. MIG nanowire growth formation is based on initiating NiSi formation at the onset and retaining the NiSi mechanism to lengthen the nanowire during the process. The substrate has been maintained at the processing temperature of 575 oC before and during the sputtering. Equation (1) shows the first reaction of Ni to the sputtered Si nanoparticles. Si sputtering on the grooved Ni layer leads to Ni diffusion into the accumulated Si to initiate the first NiSi formation.
(Reprinted with permission from Kim et al., 2005b. Copyright 2005, Elsevier.)
NiSi formation as shown in the Equations (2) and (3) may be a main source to continue the nanowire growth in the MIG method. Ni is a dominant moving species to initiate and continue the MIG nanowire growth mechanism. Ni diffuses from the Ni deposited layer to impinging Si from the target to form the NiSi layer shown in Equation (1). Ni also moves inside the nanowires to continue the NiSi mechanism of Equations (2) and (3). Ni diffusion may continue in the NiSi nanowire growth after reacting with sputtered Si. Some amount of NiSi contributes to lengthen the NiSi nanowires and some supplies the feedback mechanism to continue the process. Temperature is one of the most important factors to continue the nanowire growth in the NiSi nanowires growth mechanism and also prohibit the Si-rich formation like NiSi2 which is the most stable composition in Ni silicides. The formation of NiSi is known as being diffusion controlled, opposite to a nucleation-controlled reaction (Ti and Co silicide). Ni is the dominant diffusing species in Ni silicide formation. If the temperature is low enough, Si is not significantly mobile (Lavoie et al., 2003). The optimum growth temperature of NiSi nanowires by the MIG method is 575 oC, which is close to the point of fastest Ni diffusion in Si. Short and thick nanofibers were grown at lower temperature. At higher temperature, the diameter of nanowires increased and the length was shortened. NiSi2 may have formed at high temperature to limit the NiSi reaction. The most attractive point of MIG NiSi nanowires is straight line growth which facilitates nanobridge connections.
3.4. Catalyst effects
Ni-induced nanowire are in Figure 3(a). Ni is a major diffusing species in Ni monosilicide to form NiSi nanowires. No nanowires were grown by a Co catalyst as shown in Figure 3(b), or thick and short nanowhiskers were formed by Pd as in Figure 3(c). In the case of Co, Co is not a major moving species but Si moves in the CoSi phase (Bartur & Nicolet, 1983). Thus, Co did not grow nanowires. In the Pd case, the major moving species is a mixture of Pd and Si (Finstad et al., 1978). Thick and short nanowhiskers were grown with a low linearity.
Figure 4 shows a HRTEM image of a nanowire grown in . The left side inset presents a prototype of a single nanowire, which consisted of 3 parts—root, stem, and tip. The Ni content was found from root to stem to tip by Ni to Si ratio as 1:0.8, 1:1.06, and 1:1.32, respectively. This result suggests that Ni diffused inside the nanowire. It could be considered that the end of nanowire growth at a tip is due to the deficiency of Ni. The right inset image is taken from the nanowire showing the NiSi structure. The cross-sectional transmission electron microscopy (TEM) analysis was performed to investigate the composition of the Ni silicide layer, which is a seed layer below the nanowire grown surface.
The cross-sectional view of the bottom of the Ni silicide layer underneath the nanowire grown surface is shown in Figure 5(a). The Ni silicide layer formed a crystalline structure shown in Figure 5(b). A Ni atomic map is shown in Figure 5(c).
It is clearly shown that the SiO2 layer acted as a diffusion barrier of Ni to the Si substrate. Ni has diffused upward to react with sputtered Si to form a silicide layer. Electron diffraction analysis in the selected area of the cross section at the very bottom of the Ni silicide layer revealed a Ni-rich phase of Ni3Si, as shown in Figure 5(d). The Ni diffusion in the silicide layer is similar to that of the nanowire body. Chemical analysis revealed that the Ni to Si ratio has a gradient from bottom to surface of the layer. The reaction of Ni and Si causes the compressive stress by volume changes at the silicide interface (Gergaud et al., 2003; Gambino & Colgan, 1998) as well as by the different mobility between the Ni and Si (Gambino & Colgan, 1998). The Si bonds are softened by intermixing of Si and Ni atoms and existing Ni in the interface of Ni and Si (Ottaviani, 1981). The induced stress can be relieved by rearranging of atoms due to volume shrinkage. It is considered that the nanowire structure is determined from these interactions to be epitaxially grown above the silicide layer, as shown in Figure 4.
3.3. Morphological changes by Ni thickness
Figure 6 (a) shows the different morphological changes by Ni film thickness, which has been achieved in Ni deposition procedure by tilting a specimen thinning from 150 nm. The nanowire growth region was clearly observed in the Figure 6(c) and presented a critical thickness of Ni film to be 60–80 nm.
A thicker or a thinner film than the critical thickness formed larger silicide drops instead of growing nanowires as shown in Figure 6(b) and (d), respectively. This implies that the reaction of Ni and Si controls the silicide formation. Due to the equilibrium phase is determined by the ratio of Ni atoms to Si atoms (Gambino & Colgan, 1998), the thinner film tends to be a Si rich silicide and the thicker film prefers to be a Ni rich phase (Julies et al., 1999; Zheng et al., 1983).
Thermodynamically, the large grains get larger by the tendency to reduce the surface free energy. The large grain formation is also observed in the thinner Ni region. The cross-sectional observations of Ni silicide nanowires on a SiO2-coated Si substrate and a tungsten plate are presented in Figure 7. The optimum growth temperatures were found to be 575 oC for a SiO2-coated Si substrate and 550 oC for a tungsten plate. The higher thermal conductivity of tungsten is attributed to reduce the processing temperature.
XRD was performed to investigate the formation of Ni silicide phases revealing a NiSi peak as well as Ni rich phase of Ni3Si as shown in Figure 8. The reaction between Ni and Si atoms firstly forms a Ni rich phase and then further Si supply causes Ni diffusion to Si forming a Ni silicide nanowire. Due to the unique mechanism of Ni to Si, it has been found that the Ni silicide nanowires would be grown by the metal-induced growth method both in physical vapor deposition (Kim et al., 2005a, 2005b, 2006a, 2006b) and plasma-enhanced chemical vapor deposition (PECVD) (Kim et al., 2007a). By using the Ni diffusion to grow silicide nanowires, the Ni silicide formation is an important factor to form nanowires of NiSi in PVD and Ni3Si2 in PECVD process.
The spontaneous reaction between Ni and Si firstly forms a silicide layer and then the further reaction causes the Ni diffusion to grow a unique linear nanostructure to be a nanowire above a silicide layer, which is a remarkable feature to form a spontaneous contact formation without an architectural electrode fabrication (Kim et al., 2005a, 2006a). Moreover, the suitable growth of Ni silicide nanowire on various materials may increase the practical uses. Various factors, such as a processing temperature, a metal thickness, and a Si supply amount determine the formation or transition of Ni silicide phases. In this research, Ni thickness is mainly investigated on the growth of nanowires in a specific condition by the balanced reaction of Ni and Si.
4. Ni silicide nanowire growth by chemical method
Beside the MIG methods, chemical vapor deposition (CVD) and DC arc-discharge approaches were presented (Kim et al., 2005a). The low growth temperature from 320 to 420 C is accomplished by the decomposition of silane gas on Ni surfaces to make different composition (NiSi, Ni2Si, and Ni3Si2) of nanowires (Decker et al., 2004). Similar growth was also reported but Ni gradient was appeared through a nanowires. (Kim et al., 2007).
The amorphous nanowires have been grown by the solid-liquid-solid mechanism at a high temperature of 950 C to utilize the NiSi2 eutectic liquid droplets.11 In our previous work, NiSi nanowires have been reported without using a gas-type silicon source by the MIG method.12,13 For the DC arc-discharge growth method, ultra high temperature above 5000 oC was applied to vaporize of Ni and Si (Geng et al., 2008) It has still remained as an assignment to grow single composed Ni silicide nanowires at a low temperature without a metal gradient through a nanowire, which may limit the nanowire-embedding system performance.
4.1. Metal diffusion growth
Joondong Kim has reported Ni silicide nanowire by Plasma-enhanced chemical vapor deposition (PECVD) growth method in 2007 (Kim et al., 2007a). Metal-diffusion growth (MDG) provides advantages in mass production and crystallinity of nanowires. It proved the uniform composed Ni silicide nanowires grown by Plasma-enhanced chemical vapor deposition method. The processing temperature (350 oC) was much reduced. This Ni silicide nanowire has a single composition of Ni and Si through a body, which will benefit the uniform performance of nanowire-embedding devices. Moreover, it has been revealed that the most PECVD grown nanowires have the same composition of Ni and Si.
4.2. Growth condition
The single crystalline Ni silicide nanowire were achieved at a low temperature of 350 C. Ni as a catalyst was thermally evaporated onto a 500 nm SiO2 coated Si substrate at a high vacuum level of 5×10−7 Torr before loading for PECVD. Silane (SiH4) as a Si source was supplied to react the Ni. The gas flow rate was fixed at 50 standard cubic centimeter per minute (SCCM) for 10 min. PECVD system was operated at 13.6 MHz.
4.3. Growth mechanism
Typical Ni silicide nanowire grown morphology by MDG is shown in Figure 9. High dense, long, and thin nanowires were grown at 350 C with a SiH4 pressure of between 10 and 100 Torr. The length is most above 5 μm with 20 - 30 nm in diameter. The Ni–Si binary system has various phases of Ni2Si, NiSi, or Ni3Si2 before forming the NiSi2 phase, which is the most stable phase in the system and to be a seed to grow a crystalline thin Si film due to its little lattice mismatch to Si (Kim et al., 2007b, 2007c). The formation of NiSi and Ni3Si2 is known as the typical transitions phased by the reaction of Ni and Si. Ni is a fast diffuser to Si and there exists a thermodynamically unstable scope causes serious morphological changes resulting in clustering and impinging whiskers (Kim et al., 2005b). The amorphous Ni silicide is unstable and Ni continuously diffuses to Si rich region remaining crystalline Ni silicide nanoscale structure (Levenger & Thompson, 1990). Due to the use of gas type Si source, the Ni silicide nanowire growth temperature has been lowered to 350 C comparing to the solid Si source case of 575 C (Kim et al., 2005b).
4.4. MDG nanowire analysis
High resolution transmission electron microscopy (TEM) image shows that the nanowire has a single crystalline structure grown perpendicular to the (001) plane of Ni3Si2 orthorhombic structure, as shown in Figure 10(a). The measured spaces are 0.694 and 0.540
nm, consistent with the Ni3Si2 interplanar spaces of
Due to the tiny scale and excellent electrical conductivity, Ni silicide nanowires have a high potential in the nanoscale electronics. In this chapter, two promising applications of Ni silicide nanowire are presented. First part discusses the nanoscale interconnect and last part presents Ni silicide field emitters.
5.1. Nanoscale interconnect
Under Moore’s law, the semiconductor components have been shrunk every two years. The interconnect is one of the major issues of component scale-down to increase electrical resistance resulting in device performance loss or malfunction.
A significant problem of conventional copper wire may cause an electromigration when current density exceeds 106 A/cm2. Intel and other companies predicted that the interconnect resistance will start to become a significant limit for the device scale-down. ITRS (International Technology Roadmap for Semiconductors) declared that the increasing RC delay is one of the crucial issues for the device performance.
There has been a significant interest and attention in carbon nanotubes and nanowires as one-dimensional building blocks for nanoscale interconnects. Carbon nanotubes and metallic nanowires are considered as potential candidates to solve the general concerns in terms of electrical resistance and device speed.
Carbon nanotube has been attracted as a possible replacement for copper wires in semiconductor devices. It may be able to pass high current of 109 A/cm2 without failure and has a good mechanical stability. In spite of these benefits, carbon nanotubes are bearing a problem of uniformity. Some nanotubes are semiconductors, while others have metallic characteristics which may not ensure the uniform performance. Additionally, carbon is heterogeneous material to Si and it may require an additional process to Si technology.
In contrast, silicide nanowire is compatible to the Si technology. Ni silicide has been intensively researched for use as a contact material of gate and source/drain in complementary metal oxide-semiconductor (CMOS) devices. It is superior to other candidates, such as TiSi2 and CoSi2. TiSi2 has difficulty in transformation of the C49 phase to the low resistive C54 phase. CoSi2 is limited by high Si consumption and junction leakage. These merits prompt interest in Ni silicide nanowires to make a one-dimensional nanoscale building block.
5.1.1. Current density of Ni silicide nanowires
There has been a significant interest of other high transport nanomaterials. NiSi nanowire interconnect has proven a potential to deliver high level current. It also confirmed that the each NiSi nanowire delivered current uniformly. The ohmic contact behavior was obtained from the Ni silicide nanowire connected Pt electrodes, as shown in Figure 11(a).
The resistance obtained from the two nanowire connections gave 5.07 kΩ. After then, a single nanowire connection was achieved by applying a high impulse voltage to break one nanowire, as shown in Figure 11(b). The
It also proved that the uniform current delivery performances of NiSi nanowires. The current density of the Ni silicide nanowire obtained to be 3.36×107 A/cm2. Wu et al. reported a high failure current density of 3×108 A/cm2 through a Ni silicide nanowire, which was synthesized by Ni coating on a Si nanowire and heat treatment (Wu et al., 2004).
Joondong Kim presented the spontaneous grown and connected parallel nanowire to be called as a nanobridge (Kim et al., 2007a). The nanobridge carries 2.58×108 A/cm2 without breaking the connection implying even higher current is acceptable to transport. Other reports of Ni silicide nanowire current delivery are summarized in table 2.
|Current density||Composition of nanowire||Growth or synthesis method||References|
|3 x~ 10 8 A/cm 2||NiSi||Ni coating on a Si nanowire||Wu et al., 2004|
|8 x~ 10 7 A/cm 2||NiSi, Ni 2 Si, Ni 31 S 12||L ithography||Zhang et al.,2006|
|2.58 x~ 10 8 A/cm 2 or higher||NiSi||MIG||Kim et al., 2006a|
|3.4 x~ 10 7 A/cm 2||NiSi||CVD||Kim et al., 2007|
|1 x~ 10 8 A/cm 2||NiSi||Focus ion beam milling||Wang et al., 2007|
|3.36 x~ 10 7 A/cm 2||Ni 3 Si 2||MDG||Kim et al., 2007a|
5.1.2. Nanowire interconnect: Nanobridge
Beyond nanowire growth, use of nanowires in nanoelectronics may be a breakthrough to overcome the difficulty in scaling down of integrated circuits. The first and inevitable step of nanoelectronics integration is to form contacts.
Many different approaches have been used to make contacts or control nanoscale entities, such as guided self-assembly using magnetic trapping (Tanase et al., 2002), SiO2 patterning and cracking (Alaca et al., 2004), field emission-induced growth on a scanning tunneling microscopy tip, (Thong et al., 2002). ac or dc electric field (Fan et al., 2004, Smith et al., 2000), electron beam lithography (Nastaushev et al., 2002) and “grow-in-place” (Shan et al., 2004). To employ nanoscale structures in devices, it is desirable to make interconnections that are independent from the use of complex processes or multiple lithography steps.
The bottom-up approach provides cost-effective nanowires compared to the top-down approach and offers much promise in future integrated circuits. The self- and directed assembly method based on the bottom-up process will inaugurate the volume manufacturing of nanotechnology. The control and manipulation of self-assembled nanostructures may contribute to the advance of memory chips (Marrian et al., 2003).
The spontaneous nanowire interconnect (nanobridge) may provide an essential connection route as a one-dimensional building block in nanoelectronic devices. The nanowires have a desired property of linear propagation parallel to a substrate at a substrate edge. The deposited Ni has been grooved and agglomerated at substrate heating of 575 oC by the reduction in surface energy, which may determine the silicide islands formation. The silicide island formed at a trench edge may have a property to propagate parallel nanowires across the trench (Kim et al., 2006a).
This could explain the specific nanowire propagation at the edge of the trench. Si sputtering on the grooved Ni layer results in Ni diffusion into Si to form NiSi nanowires. The parallel propagated nanowire formed a spontaneous connection between Ni deposited electrodes shown in Figure 12(a). The MIG nanowire contact nanobridge (NB) is solid and strong with a small contact area that is the same as the diameter of the nanowire itself, about 58 nm.
The electrical transport in Figure 12 (b) gave a low resistance of about 147.9 Ω. The NB resistivity was obtained to be 10.8 µΩ∙cm, comparable to the value for single crystalline20 (Meyer et al., 1997). NiSi of 10 µΩ∙cm and NiSi thin film of 11 µΩ∙cm. The value is also close to the reported resistivity of 9.5 µΩ∙cm for the selective Ni-coating NiSi nanowire (Wu et al., 2004). Other results on NiSi nanowires were reported as about 370 µΩ∙cm from Ti/Au deposition (Lee et al., 2004). or nonlinear high resistance characteristics from Pt deposition (Dong et al., 2005; Decker et al., 2004) implying that there is an effect of foreign metal use or poor adhesion between electrodes and nanowire.
The common method by others to characterize a nanoscale structure is to detach it to an insulation layer, such as SiO2, then make contacts above it. The patterns for electrical leads are usually fabricated with the assistance of e-beam lithography (Wu et al., 2004; Lee et al., 2004; Lew et al., 2004). The electron beam assisted pattern fabrication needs complicated process steps as well as about 10 nm tolerances. Besides the delicate requirement, it has been currently reported about the Ti thickness effects in use with Ti-Au combination, which is a popular binary alloy to make electrodes in e-beam patterning. Ti thickness significantly affected resistance by almost 6 orders of magnitude variation by modulating Ti-Au within a fixed total metal thickness (Hwang et al., 2004). For those reasons, it is preferred that contacts for nanowire electrical testing be of a similar metal to the nanowire.
One advantage of the metal-induced grown NB is in providing compatible metallic pads for electrode use. The MIG pads are homogeneous to the NiSi NB to relieve an extrinsic effect caused by foreign metal use. The electric transport was also measured on a pad and substrate to see the effects on the nanowire measurement. Resistance from point to point on a pad was about 7 Ω providing a reliably low resistance compared to the resistance of the NB. The measured resistance from pad to pad on the substrate without a NB was 40.49 MΩ, the sign of a good insulation layer. It is considered that the pad gave little effect on the NB I-V result without interference from a high resistance substrate, graphically shown in Figure 13.
5.2. Ni silicide nanowire field emission properties
One dimensional nanostructures of nanotubes and nanowires have been emerged as effective cold cathodes, which may reduced the turn on voltage by an enhanced field at sharp tip structures. Field emission in vacuum has a significant benefit over the conventional electron-hole carrier transport in semiconductor without energy loss in medium. To realize a promising of nanostructure for a field emitter, the excellence in electrical conductivity is highly required.
Using a nanoscale structure as a field emitter, it requires a low turn-on voltage and a stable emission current. Various approaches have been performed in fabrication of emitting entities by Si (Kanemaru et al., 1996), diamond and molybdenum tips (Yoon et al., 1999). To enhance the electric conductivity, doping process (Kanemaru et al., 1996) or silicide coating on Si structures (Yoon et al., 1999) have been reported. In the fabrication aspects, a good electric nanoscale emitter is highly desirable. Silicides of Ni, Co, Ti have been utilized to be contact materials in Si technologies due to the compatibility to Si (Kim et al., 2007b, 2007c, 2008a) and low resistance driving intensive interests on forming a silicide nanowires (Wang et al., 2007; Wu et al., 2004; Lee et al., 2004; Decker et al., 2004,Kim et al., 2005a, 2005b, 2006a, 2007a) in applications of a nanoscale interconnection (Kim et al., 2005a, 2006a, 2007a) and a microscopy tip (Yoon et al., 1999). The field emission measurements of Ni silicide nanowires grown on a SiO2-coated Si and a tungsten substrates were performed in a vacuum of 10-7 Torr. An anode electrode of ITO was spaced 300 µm to emitters. In the connection, it requires an extrinsic contact conductor for the Ni silicide nanowires grown on a SiO2-coated Si substrate, otherwise tungsten plate was directly used a conductor. The electric excellence of Ni silicide nanowires has been reported in previous researches.
Although Ni silicide nanowire has been known as a good nanoscale conductor, limited researches have been performed on the nanowire growth observation and the field emission properties. As a one-dimensional conductor, Ni silicide nanowire has a high advantage to be a field emitting entity. Two different samples of were investigated for the Ni silicide nanowire field emission. The cross-sectional observations of Ni silicide nanowires on a SiO2-coated Si substrate and a tungsten plate are presented in Figure 7.
Figure 14 presents that the emission properties of Ni silicide nanowires grown on a SiO2-coated Si and a tungsten substrates was measured in a vacuum level of 10-7 Torr. As denoting a turn-on state as the emission current density to be 10 µA/cm2, the inset electric field was achieved to be 3.23 V/µm at 970 V and 3.47 V/µm at 1040 V from Ni silicide nanowires grown on a tungsten plate and a SiO2-coated Si substrate, respectively. Additionally, the current density from the tungsten plate use provided higher value of 172.5 µA/cm2 than 76.5 µA/cm2 of a SiO2-coated Si case at 5 V/µm.
The lower field emission current density of a SiO2-coated Si substrate may be explained by the structure of the metal–oxide–silicon (MOS), in which the potential drops across an oxide layer and a Si substrate to form the conduction state. Otherwise, no significant potential drop is considerable across a tungsten plate, which is a refractory metal and a good conductor. The Fowler–Nordheim (F–N) plots are presented in Figure 14(b). Current density (J) is related to the electric field (E) and describes as J = aE2exp(-b/E). The constants of a and b are expressed by 1.56×10-10 β2/φ and 6.83×109 φ1.5/β, respectively, where φ is the local work function and β is the field enhancement factor (Joo et al., 2006).
Due to the linear function of the F–N plot (Bonard et al., 2002). The b values were obtained to be 3180 and 3002 from the Ni silicide nanowires grown on a Si substrate and a tungsten plate. According to the similar b characteristics, the field emission properties of Ni silicide nanowires are considered to be uniform. Moreover, the use of a conducting substrate such as tungsten may enhance a current density and lower a turn-on voltage. The field enhancement factor of Ni silicide nanowires have provided much improved performance comparing to that of NiSi2 nanorods (Ok et al., 2006) of 630, which is mainly due to the high aspect ratio nanowires.
In conclusion, The field emission of Ni silicide nanowires gave a high electron emission property at a reduced electric field. The onset electric fields, to give the current density of 10 µA/cm2, were achieved to be 3.23 V/µm at 970 V and 3.47 V/um at 1040 V from Ni silicide nanowires grown on a tungsten plate and a SiO2-coated Si substrate, respectively. The field enhancement factors were similar from different substrate materials to be 3180 from a tungsten plate and 3002 from a SiO2-coated Si substrate. The current density from a tungsten plate use provided higher value of 172.5 µA/cm2 than 76.5 µA/cm2of a SiO2-coated Si case at 5 V/µm indicating the improvement of emission current by using a conductive substrate. The Ni silicide nanowire having a high emission performance with a uniformity shows a potential to be a field emitter in various applications.
In this chapter, we reviewed the growth mechanism of Ni silicide nanowires mainly focused on the metal-induced growth (MIG) and metal-diffusion growth (MDG). Although various techniques were reported to achieve the Ni silicide nanowires, metal-assisted growth (MIG or MDG) provides good electrical properties. Moreover, MDG method may guarantee the uniform composition through a single nanowire and group as well. This chapter discussed two applications of Ni silicide nanowires for nanoscale interconnects and field emitters.
Nanowires and carbon nanotubes have attracted high interests for high current delivery nanoscale interconnect. However carbon nanotube has shown the ability of high current transport, it may require an additional fabrication step to be adopted in Si devices. Moreover, the lack of uniformity limits the carbon nanotube application in nanoelectronics.
In this aspect, the Ni silicide nanowire may be one of the most promising one-dimensional nanoscale building blocks in terms of compatibility to the conventional Si technology and the excellent electrical conductivity. According to the device scale-down, it is inevitable to substitute the conventional copper interconnects, which are bearing a limit of an electromigration when the current density exceeds 106 A/cm2. Several reports have proved the potential of high current delivery of Ni silicide nanowires.
Beyond the nanowire growth, use of nanowires in nanoelectronics may be a breakthrough to overcome the bottle-neck in scaling down. The bottom-up approaches would provide a route for the cost-effective and volume manufacturing scheme of nanotechnology. Spontaneously contacted nanowire connection (nanobridge) is one of the solution for the “grow-in-place” scheme, which may accomplish the nanoscale interconnect without complex processes. The Ni silicide nanobridge showed a high current density of 2.58×107 A/cm2 or higher due mainly to the homogeneous contacts between pads to Ni silicide nanowire.
Additionally, one dimensional nanostructures of nanotubes and nanowires have been emerged as effective cold cathodes, which may reduced the turn on voltage by an enhanced field at sharp tip structures. Field emission in vacuum has a significant benefit over the conventional electron-hole carrier transport in semiconductor without energy loss in medium. To realize a promising of nanostructure for a field emitter, the excellence in electrical conductivity is highly required. Needle-shaped nanostructures would be utilized for field emitters to reduce the turn-on voltage by the enhanced electric field at the tip.
Due to the tiny scale and good electric properties, Ni silicide nanowires are being highly considered as to be entities. In this chapter, the properties of Ni silicide nanowire field emission was reviewed. The onset electric fields, to give the current density of 10 µA/cm2, were achieved to be 3.23 V/µm at 970 V from Ni silicide nanowires grown on a conductive tungsten plate. High field enhancement factor of 3180 was achieved with reducing a turn-on voltage. The Ni silicide nanowire having a high emission performance with a uniformity shows a potential to be a field emitter in various applications.
Beside these above mentioned applications, nanostructures would provide a promise for various nanoelectronics applications such as, the sensitive gas sensors, functional microscopy tips, solar cells, and so on.
The author would like to finish this chapter with a sentence of “There’s plenty of room at the bottom” by Richard P. Feynman.
The author acknowledge the financial support from National Research Foundation (NRF, 2009-0082018) by the Ministry of Education, Science and Technology (MEST) in Korea. Some parts of this chapter were referred from the author’s previous reports (Kim et al., 2005b, 2006a, 2006b, 2007a, 2008b).