Open access peer-reviewed chapter

Graphene Oxide-Based Memristor

By Geetika Khurana, Nitu Kumar, James F. Scott and Ram S. Katiyar

Submitted: December 20th 2016Reviewed: May 15th 2017Published: April 4th 2018

DOI: 10.5772/intechopen.69752

Downloaded: 1040


A memristor is the memory extension to the concept of resistor. With unique superior properties, memristors have prospective promising applications in non‐volatile memory (NVM). Resistive random access memory (RRAM) is a non‐volatile memory using a material whose resistance changes under electrical stimulus can be seen as the most promising candidate for next generation memory both as embedded memory and a stand‐alone memory due to its high speed, long retention time, low power consumption, scalability and simple structure. Among carbon‐based materials, graphene has emerged as wonder material with remarkable properties. In contrast to metallic nature of graphene, the graphene oxide (GO) is good insulating/semiconducting material and suitable for RRAM devices. The advantage of being atomically thin and the two-dimensional of GO permits scaling beyond the current limits of semiconductor technology, which is a key aspect for high‐density fabrication. Graphene oxide‐based resistive memory devices have several advantages over other oxide materials, such as easy synthesis and cost‐effective device fabrication, scaling down to few nanometre and compatibility for flexible device applications. In this chapter, we discuss the GO‐based RRAM devices, which have shown the properties of forming free, thermally stable, multi‐bit storage, flexible and high on/off ratio at low voltage, which boost up the research and development to accelerate the GO‐based RRAM devices for future memory applications.


  • memristor
  • graphene oxide
  • forming free
  • multi‐bit storage
  • flexible devices

1. Introduction

The memristor (contraction for memory resistor) acclaimed as the fourth fundamental circuit element together with already known the capacitor, the inductor and the resistor was theoretically predicted by Chua in 1971 [1]. But it attracted much attention in 2008, when a TiO2‐based crossbar memory array was developed by the HP Labs, and the cross‐point storage element was recognized as the memristor [2]. Recently, a rather deep analysis has been provided concerning memristors [3], which shows conclusively that the memristor is not the long‐sought fourth circuit element but the memory extension to the concept of resistor. With unique superior properties, memristors have promising applications in non‐volatile memory (NVM), artificial neural networks, programmable logic devices, signal processing and pattern recognition circuits. Random access memory (RAM) is an important form of computer data storage. However, due to the technological and physical limitations imposed by dynamic random access memory (DRAM), static random access memory (SRAM) and flash memory towards low power, small size, fast speed, high density and non‐volatility, there is an urgent need of upcoming NVM technologies with low power, high density, high read/write endurance and scalability. In a memristor, a new memory device to solve these problems, a resistive random access memory (RRAM) is a good direction for the development of future memory technology. RRAM is a memory using a material whose resistance changes under electrical stimulus and can be seen as the most promising candidate for next generation memory both as embedded memory and a stand‐alone memory due to its high speed, long retention time, low power consumption, scalability and simple structure [4]. Typically, RRAM is a two‐terminal device that the switching medium is sandwiched between top and bottom electrodes (Figure 1) and the resistance of the switching medium can be modulated by applying electrical signal (current or voltage) to the electrodes. Appropriate value of programming voltage pulse can set the device from high‐resistance state (HRS) to low‐resistance state (LRS) known as SET or writing process. Similarly, switching back of the device from LRS to HRS using a voltage pulse known as RESET or erase process. Based on the voltage polarity used, RRAM can be categorized into two types: unipolar and bipolar resistive switching [5]. The switching operation is called unipolar, if the SET and RESET processes occur at the same voltage polarity. In the SET process, the current is usually constrained by current compliance. Whereas, the switching is bipolar if the SET and RESET processes occur at reversed polarity of voltages. In both switching modes, two resistance states are distinguished from each other at a small read‐out voltage, therefore read operation has no influence on the resistance state. However, the attractive properties of RRAM are low fabrication costs, scalability into the nanometre regime, fast write and read access, low power consumption and low threshold voltages.

Figure 1.

Schematic and electrical configuration of a two‐terminal RRAM cell.

The resistive switching effect has been explored until now in several materials including transition metal oxides, perovskite oxides, organic materials and carbon‐based materials. Carbon‐based materials have been researched extensively as an important class of materials for many years to defeat the technological barriers of conventional semiconductor electronics [6, 7, 8]. Previously, the efforts have been made to fabricate the field effect transistor (FET) devices [9, 10] based on carbon materials. Therefore, it is highly demandable to fabricate carbon‐based memory devices to integrate logic and memory devices based on same material. This chapter introduces RRAM properties of the carbon compound known as graphene oxide (GO). It is basically a wrinkled two‐dimensional carbon sheet with various oxygenated functional groups attached to its basal plane and peripheries, with the thickness of around 1 nm and lateral dimensions varying between a few nanometres and several microns. Graphene oxide has been synthesized by various chemical methods, such as Hummers’ method and its modification, Brodie method and Staudenmaier method. In contrast to the metallic nature of graphene, the graphene oxide is good insulating/semiconducting material, which can be readily obtained by oxidizing graphite with strong oxidants.GO sheets are heavily oxygenated, bearing hydroxyl and epoxide functional groups on their basal planes, in addition to carbonyl and carboxyl groups located at the sheet edges. Furthermore, the ability of these sheets to form covalent as well as non‐covalent (based on interactions) bonds encourages the fabrication of a wide variety of hybrid structures such as transistors, sensors, optoelectronic and memory devices etc. [1112]. The two dimensionality of GO permits scaling beyond the current limits of semiconductor technology, which is a key aspect for high‐density fabrication. Out of tremendous applications of graphene oxide, this chapter focuses on the memory device application. Graphene oxide (GO) with an ultrathin thickness is attractive due to its unique physical‐chemical properties. GO can be readily obtained through oxidizing graphite in mixtures of strong oxidants, followed by an exfoliation process. The presence of these functional groups makes GO sheets electrically insulating, with characteristics comparable to other thin‐layered oxide materials, with the advantage of being atomically thin, which makes GO the perfect candidate for the fabrication of memristive devices [13, 14]. As GO is water soluble which makes it facile to transfer onto any substrate in thin film form by simple methods of spin coating, drop‐casting, Langmuir‐Blodgett (LB) and vacuum filtration. The as‐deposited GO thin films can be further processed into functional devices using standard lithography processes without degrading the film properties [15, 16]. Furthermore, the band structure and electronic properties of GO can be modulated by changing the quantity of chemical functionalities attached to the surface. Therefore, GO is potentially useful for microelectronics production.


2. Status of graphene oxide‐based RRAM devices

Graphene oxide‐based resistive memory devices have several advantages, such as easy synthesis and cost‐effective device fabrication, scaling down to few nanometres and compatibility for flexible device applications. Reliable and reproducible resistive switching behaviour was first reported in graphene oxide thin films prepared by the vacuum filtration method by He et al. in 2009 [17]. They observed very low switching voltages and low on/off ratio of about 20 in Cu/GO/Pt structure. Soon after that there were many reports published showing high on/off ratios in GO‐based RRAM devices [18, 19]. Mechanism for the resistive switching characteristics in GO‐based RRAM was found to be due to the oxygen migration, oxygen vacancies and the electrode diffusion [20, 21]. Furthermore, Jeong et al. presented a GO‐based memory that can be easily fabricated using a room temperature spin‐casting method on flexible substrates and has reliable memory performance in terms of retention and endurance [22]. Resistive switching effect was shown in Ni‐doped graphene oxide by Pinto et al. [23]. Transparent non‐volatile memory device based on SiOxand graphene was also reported which features high transparency, long retention time and low programming currents [24]. Zhuge et al. reported the forming voltage dependence on GO film thickness and on different top electrodes [20]. Forming process is the application of initial high voltages to the devices to initiate the switching process, which is detrimental to the device structure and operation. Forming‐free GO RRAM devices having high on/off ratio with good retention and endurance properties are potential candidates for non‐volatile RRAM. Therefore, in this chapter, we will be discussing RRAM properties of the GO‐based devices, which are forming free, thermally stable, multi‐bit storage, flexible, having high on/off ratio at low operating voltages that boost up the research and development to accelerate the GO‐based RRAM devices for future memory applications.

2.1. Graphene oxide‐based RRAM devices

Synthesis of graphene oxide presented in this chapter has been carried out by modified Hummers method [25, 26]. In brief, highly oriented pyrolytic graphite (HOPG, 2 g) was oxidized using potassium permanganate (KMnO4, 7 g) in the presence of concentrated H2SO4 (50 ml) in ice bath. After the reaction, excess distilled water was added to the solution. With continuous stirring a 30 wt.% of hydrogen peroxide (H2O2) was added slowly until the gas evolution had stopped. Further 15 more‐minute stirring was done to the resultant mixture, and then it was filtered through nylon membrane. Repeated washing was done by distilled water and 5% HCl solution until the filtrate was neutral. Finally, the obtained dark brown slurry was dried for 24 hour in a vacuum oven at 60°C. A colloidal suspension of GO was prepared in distilled water by sonicating graphite oxide in water for 2 hour. Such a solution of GO was used to fabricate the thin films by spin coating process on ITO/Glass substrate. To construct metal-insulator-metal (MIM) devices, platinum top electrodes with an area of 40 × 40 μm2 were deposited by DC sputtering utilizing a shadow mask. The schematic representation of fabricated Pt/graphene oxide/imdium-tin oxide (GO/ITO) is shown in Figure 2.

Figure 2.

Schematic representation of GO‐based MIM devices [26].

To observe the switching characteristics of the device, I‐V measurements for the Pt/GO/ITO device at 300 and 500 K were performed as shown in Figure 3a and b). The Pt/GO/ITO device was found initially in low‐resistance state having resistance value of ∼40 ohm. Figure 3 shows that as the positive voltage was increased, a sudden fall in current was observed at a voltage of ∼3.2 V indicating abrupt increase in the resistance of the device. This is known as RESET process and device transformed from its initial low‐resistance state (LRS) to high‐resistance state (HRS) also known as OFF state.

Figure 3.

Current‐voltage characteristics of the Pt/GO/ITO device at (a) 300 K and (b) 500 K [26].

The low‐resistance state of GO‐based MIM devices once obtained persisted even when the applied voltage was reduced to zero indicating non‐volatility. In high‐resistance state, when the voltage was swept a sudden increase in current was observed at a voltage of approximately −1.2 V indicating abrupt decrease in the resistance of device and switching from high‐resistance state to low‐resistance state as shown in Figure 3a. This is known as the SET process which switched the MIM device in LRS or ON state. The LRS of device remained preserved even when the applied bias voltage was removed. During this set process, current compliance was kept fixed at 100 mA to avoid the breakdown of GO film due to high current flow in low‐resistance state. By repeating the set and reset processes over 100 cycles, it was observed that the reset voltage was larger than the set voltage and spread over a small window of voltage between ∼3 and 3.4 V, whereas the set voltage had a spread between approximately −1.2 and −1.8 V. Thus, the device showed a typical bipolar resistive switching (BRS) behaviour with an on/off current ratio of 104 over 100 test cycles. Switching characteristics of the device were also studied at elevated temperature of 500 K (as shown in Figure 3b). Reduction in the value of reset voltage at 500 K was observed which could be attributed to enhanced diffusivity of oxygen ions at elevated temperature compared to that of room temperature. However, contrary to that we found increment in the set voltage at elevated temperature. Further at high temperature of 500 K, the on/off ratio of the device was found to decrease up to ∼102 compared to its value at 300 K which was ∼104; however, this ratio of high‐ and low‐resistance states is sufficient for operation of memory devices. Low‐ and high‐resistance states were stable up to 104 seconds and up to 100 cycles indicating good retention and endurance characteristics of the device at elevated temperature of 500 K.

Based on the conduction mechanism, it was observed that GO device contains conducting paths between top and bottom electrode perhaps due to the presence of oxygen vacancies and electron traps in graphene oxide layer forming electron hopping path [27]. Presence of oxygen vacancies in graphene oxide indicates partial reduction of GO and dominance of sp2 character over sp3 character providing high conducting channel in GO film and initial low‐resistance state without any forming process. In Pt/GO/ITO devices, the bottom electrode ITO acts as a source/reservoir of oxygen ions [28]. To ascertain the presence of sp2 and sp3 characters of carbon, Raman spectroscopy measurements were carried out on the Pt/GO/ITO devices both in LRS and HRS and are shown in Figure 4. As can be seen in Figure 4 that in case of as‐grown device and the device in LRS, the presence of G peak signifying the sp2 character is larger in intensity compared to the same peak when the device was switched into HRS by the application of suitable bias voltage. This indicates that the sp2 character dominates in LRS. While in case of HRS, the sp2 character is suppressed. These RRAM devices based on GO layer fabricated by a simple process of spin coating show a forming free bipolar resistive switching (BRS) in Pt/GO/ITO structure with high on/off ratio of 104 exhibiting good retention and endurance properties at room and elevated temperatures.

Figure 4.

Raman spectra for Pt/GO/ITO device in LRS (upper curve) and HRS (lower curve) [26].

2.2. Graphene oxide‐based multi‐layer structures for high‐density data storage

Organic memory devices have gained much attention as future information and storage components owing to their low weight, flexibility, inexpensive and facile fabrication methods [29, 30]. Recent reports have shown that organic memory devices have been developed through layer stacking [31] and using advanced memory architectures [32, 33, 34, 35]. However, the most organic memory devices are suffering with slow switching [36] and low storage capacity [37, 38]. RRAM performance of the organic memories can be greatly enhanced by forming hybrid organic structures [39], organic/inorganic composites [40] or by dispersing nanomaterials [41, 42]. Among all other organic polymers, polyvinylidene fluoride (PVDF) was used due to its non‐reactive nature, better heat resistance, flexibility and low weight. As mentioned above, hybrid structures of organic memory devices provide enhanced memory characteristics; therefore, heterostructure of PVDF was fabricated using a charge trapping element in it. In this study, reduced graphene oxide nanoflakes (GR) were used as a charge trapping layer owing to their unique chemical structure and exceptional properties [6, 43, 44, 45, 46, 47] that make it ideal for charge trapping [48] and storage [49] for memory applications. Also, the defects (vacancy, interstitial sites, etc.) present in GR also work as the charge trapping nodes [50]. Tri‐layer structure was fabricated by assembling graphene nanoflakes (GR) between PVDF polymer layers [51] through spin coating process on ITO/glass substrate as shown in Figure 5. DC sputtering was used to deposit platinum top electrode having area (100 μm × 100 μm) through shadow mask to obtain devices from the stacked structure.

Figure 5.

Schematic diagram of the layer‐by‐layer fabricated Pt/PVDF/rGO/PVDF/ITO memory devices. Top electrode of platinum (Pt) having area 100 × 100 μm2 was deposited using DC sputtering [51].

As the voltage was increased, multi‐stage SET and RESET were observed in positive and negative polarities, respectively, as shown in Figure 6a. This process was repeatable for a number of cycles, which established the device as a non‐volatile memory with multilevel conductance states. The multilevel SET process occurring in the device can be due to multi‐channels formation as trapping sites in graphene bear different threshold potentials. Electrons occupied these trapping sites even if the applied voltage is removed, thus preserving the non‐volatile nature of the device in ON state. When negative voltage is applied to the device, current firstly increases with voltage due to the presence of trapped charges in the nodes. At a particular negative bias, current jumps to low value due to the de‐trapping of electrons from the trapping nodes which initiates the breaking of conducting channels. Further at a particular negative bias, when most of the electrons de‐trapped and ejected back to ITO, the conducting path completely disrupts and the device transits to OFF state bearing high resistance. The multi‐channel RESET process occurring in the device is also due to the same mechanism as discussed in the SET process. In brief, it may be due to the breaking of multi‐channels at different potentials. Reports have shown that the intermediate stage present in the device revealing multi‐level switching is due to the formation of multi‐filaments [52] having different threshold potentials [53]. The device was further subjected to different compliance currents of 1, 10 and 100 μA during the SET process and correspondingly obtained different low‐resistance states as shown in Figure 6b.

Figure 6.

Typical I‐V characteristic curves plotted in semi‐logarithmic scale of Pt/PVDF/rGO/PVDF/ITO device (a) showing the presence of intermediate state. (b) Under different compliance currents of 1, 10 and 100 μA showing different low‐resistance states corresponding to the compliance current applied [51].

When the highest value of ICC was imposed, the device was observed in lowest resistance state. However, the HRS value for different ICC was almost the same. All four different states including one HRS and three LRS were observed in the device. It was proposed that with the highest compliance current applied during SET process, maximum number of trapping nodes are filled and hence maximum number of conductive channels are formed resulting in the lowest resistance state, while with the application of the lowest compliance current, small number of trapping nodes are filled having less number of conducting channels, leading to higher resistance state. To observe the performance and stability of the memory device, its endurance and retention properties were studied. Figure 7a represents the endurance characteristics of the device for all the four resistance states tested against number of cycles. As can be seen from Figure 7a, the four different states including one HRS and three LRS (LRS1, LRS2 and LRS3) were stable with no overlapping of resistances tested over the 150 number of cycles. Figure 7b shows the retention properties observed in the device where the resistance of all four states were measured using a read voltage of 0.1 V over a period of 104 seconds. The graph shows well‐differentiated resistance states of HRS and three LRS with no degradation in resistance values over the long time. These measurements for retention and endurance for the device showed that it has well performance and good stability. This tri‐layer structure fabricated by simple spin coating method can be seen as a potential candidate for future memory devices qualifying the need for high‐density storage media.

Figure 7.

Resistances of the device in all LRS and HRS under different compliance currents of 1, 10 and 100 μA with read voltage of 0.1 V. (a) Endurance properties over 150 cycles with enough margin between the states. (b) Retention characteristics over 104 seconds for all four states [51].

2.3. Graphene oxide composite with ZnO nanorods for flexible memory devices

Flexible RRAM devices have shown good potential for bendable memory systems [54, 55, 56, 57, 58].These memories are in much demand due to the qualities of inexpensive, low weight, portability and user‐friendly interfaces over conventional rigid silicon technology [59]. The substrates for flexible memories could not bear high temperatures used in growth techniques, this limitation demands for the need for materials which can be grown on these substrates at room temperature. Obeying this condition, GO is readily oxidizable and water soluble, which qualifies to be fabricated in thin films on flexible substrates at room/moderate temperatures. There are reports which have shown that integration of nanomaterials into oxides is helpful in enhancing the resistive switching properties of the devices [60, 61, 62]. In this work [63], ZnO nanorods (ZNs) were grown in horizontal direction on GO sheets to maximize the contact area between the nanorods and GO sheets [64, 65]. The consequence of this was observed in significant reduction in switching voltages in comparison to GO alone. The solution of GOZNs was spin coated to ITO‐coated polyethylene terephthalate (indium-tin oxide on polyester film (ITOPET)) substrates to fabricate the films. Initially, the Al/GOZNs/ITOPET devices were in high‐resistance state (HRS). In the very first cycle, a forming voltage around 5 V with current compliance of 2 mA was applied to activate these devices. Device showed SET and RESET processes on positive and negative voltages having non‐volatile nature. To investigate the effect of ZNs addition into the GO matrix, another device Al/GO/ITOPET was fabricated following the same process except the incorporation of ZNs in it, and this device showed comparatively higher values of SET and RESET voltages.

I‐V measurements performed on both devices, shown in Figure 8, have clearly shown that SET and RESET voltages in the device containing ZNs were severely reduced to approximately half in comparison to the device containing no ZNs. To further understand the effect of changing ZNs ratio in GO matrix on resistive switching, the I‐V characteristics of different compositions (10:1, 5:1, 3:1 and 2:1) were studied and found that 3:1 was the best among all. In Al/GOZNs/ITOPET devices, we propose that the conducting filament formation during the SET process is due to the oxygen vacancies. Oxygen concentration gradient exists at the interface of GO, and Al has high oxidation tendency. Therefore, oxygen ions from GO move towards and react with Al forming a new interfacial Al oxide layer [66]; also this process induces the oxygen vacancies into the GO region. With the positive bias is applied to the top electrode, these induced oxygen vacancies are deeply inserted into the GO matrix and providing the conductive paths during the SET process. With the negative polarity these oxygen vacancies are pushed back resulting in rupture of the conducting channel during the RESET process. But with the incorporation of ZNs into the GO matrix, significant reduction in the switching voltages was observed and this is due to the desorption/adsorption of oxygen at the interface of GO and ZNs, which stimulates the formation/rupture of conducting paths on the application of suitable polarity voltages. This mechanism based on oxygen vacancies is well supported by the X-ray photoemission spectroscopy (XPS) measurements of these samples shown in Figure 9.

Figure 8.

Typical I‐V switching characteristics in Al/GOZNs/ITOPET devices. Inset shows the I‐V characteristics for Al/GO/ITOPET device [63].

Figure 9.

(a) Comparative XPS spectra of GO and GOZNs for C1S peak. (b) XPS spectra of ZNs and GOZns showing O1S peak resolved into two components O1 and O2. (c) Zn2p spectra of ZNs and GOZNs samples [63].

Figure 9a is the XPS graph for C1s peak in GO and GOZNs samples. The C1s graph of GO contains sp2 and C─O─C peaks, whereas for the GOZNs sample, the C─O─C peak has disappeared having only sp2 peak in the spectra. The XPS study showed the reduction in oxygen content with the disappeared C─O─C peak for the GO matrix having ZNs, which demonstrates that GO has become comparatively less resistive having sp2 character dominant. However, ZNs are well known for chemisorption of oxygen at its periphery and it can be evidenced by the fitted O2 peak for O1s spectra in Figure 9b. Also, the peak positions for these O1 and O2 in GOZNs sample were found to be little shifted towards lower energy. Furthermore, a noticeable increment in the intensity of O2 peak was also observed in GOZNs in comparison to ZNs. The O1s peak was also found to be shifted to lower binding energy due to the additional oxygen absorbed by ZNs as shown in Figure 9b [67]. Further, the presence of excess oxygen can also be clearly observed in Figure 9c which shows the shift in the Zn 2p peak towards lower energy in GOZNs sample in comparison to ZNs sample [67]. The performance of flexible electronic devices can be tested through flexibility and mechanical endurance measurements. The flexibility measurements were done on the Al/GOZNs/ITOPET devices and the value of resistance was plotted as a function of bending radii as shown in Figure 10a. The resistance was measured up to the maximum bending radius of 4 mm and amazingly found that the LRS and HRS were widely separated and can be well distinguished. The mechanical reliability test was also performed by constantly flexing the device many times to the bending radius of 6 mm and the resistance was plotted against number of bending cycles as shown in Figure 10b. The HRS and LRS resistances show no noticeable degradation even up to 1000 times of repeated bending. The measurements performed on the Al/GOZNs/ITOPET device show excellent flexibility and mechanical endurance results and provide the data which show that the devices are capable for flexible memory applications. This study shows that the devices based on ZNs embedded in GO are potential candidate for future flexible non‐volatile memory applications.

Figure 10.

(a) Flexibility test for various bending radius on Al/GOZNs/ITOPET RRAM device. (b) Mechanical bending endurance of device at bending radius of 6 mm on Al/GOZNs/ITOPET RRAM device [63].

2.4. Nanoparticles embedded graphene oxide RRAM devices for low operating voltages and high on/off ratio

RRAM devices based on oxide have good switching characteristics, but still there are two major downsides with these memories: first one is the need of an initial forming voltage [68, 69, 70] to initiate the switching mechanism, which is detrimental to device performance, however, this issue can be resolved by manipulating the deposition and growth process and the other problem is the uncontrolled position of conductive channels formation during repetitive applied bias. To address the problem of initial forming in graphene oxide (GO)‐based devices, we adopted the method of electrophoresis to deposit the device structure [71]. Reports have shown that the graphene oxide films grown by electrophoresis are conducted or reduced in nature [72, 73].As the oxygen functional groups attached to its basal plane get removed, the graphene oxide films become semiconducting having localized π‐π electrons network. These functional groups can be eliminated by passing the current during electrophoresis deposition process, resulting GO to be reduced or semiconducting in nature. In this study, the films were deposited by electrophoresis and as deposited films were found to be in low‐resistance state; therefore, no high forming voltages were required to initiate the switching process. To resolve the problem of confined conducting channels, we have to understand that there is random formation of conductive filaments at nanoscale with applied bias in un‐doped films, and it is hard to confine their position precisely. The reports for RRAM devices based on transition metal oxides infused with metallic nanoparticles have shown enhancement in switching properties with the addition of metal nanoparticles [61, 74]. The present study is focused on improved switching characteristics of graphene oxide films embedded with gold nanoparticles (Au Nps), which helps to confine the conducting filaments during numerous sweep cycles. A colloidal suspension of GO with Au Nps was obtained by sonication. The films were deposited by electrophoresis process using the sonicated GO with Au Nps (GOAu) solution [71]. Electrophoresis was performed using a home‐built assembly with a pair of ITO/glass as electrodes and a Keithley current source. GOAu films were deposited at room temperature by varying the current value ranging from 0.1 to 1.0 mA for 1–10 minutes having 1.5 cm distance between the electrodes as shown in Figure 11.

Figure 11.

GO films grown by electrophoresis process.

The thickness of deposited GOAu film was measured to be ∼85 nm. The GO layers were in the size range of 3–5 μm and Au Nps were found in the range of 10–15 nm. The switching matrix constitutes the stack of GO layers with Au Nps. Aluminium (Al) top electrodes were deposited by thermal evaporation method through a shadow mask having diameter of 200 μm. Thus, the device structure formed was Al/GOAu/ITO/glass. Another sample was also fabricated using GOAu solution by spin coating on ITO/glass substrate for XPS study. To know the chemical composition of as‐grown GOAu films by electrophoresis, XPS study was performed as shown in Figure 12. These XPS measurements were done to illustrate the amount of oxygen functional groups present in electrodeposited GOAu films (Figure 12a) and spin coated GOAu films (Figure 12b) (XPS for spin coating films was performed to compare the amount of oxy groups). The peaks corresponding to C1s spectra as depicted in Figure 12 are C─C, C─O and C═O which are at respective binding energies of 284.6, 286.5 and 288.4 eV. In electrodeposited film, the C─O peak has low intensity in comparison to the C─C peak which shows that the oxygen content is less in the film. The lower oxygen content or presence of oxygen vacancies is favourable for as‐deposited films to be in low‐resistance and hence eliminating the need of forming voltages. Inset of Figure 12a shows the presence of Au 4f7/2and Au 4f5/2 peaks at their respective binding energies of 84 and 87.5 eV.

Figure 12.

(a) XPS spectra for C1s peak of GOAu film grown by electrophoresis. Inset shows Au peaks for the GOAu film. (b) C1s peak of spin‐coated GOAu film [71].

To demonstrate the effect of Au Nps in GO devices, another film of GO having no Au Nps on ITO/glass by electrophoresis keeping same deposition parameters having Al top electrodes (Al/GO/ITO) was fabricated and measured its switching characteristics. Figure 13a shows typical I‐V switching characteristics of Al/GO/ITO (inset) and Al/GOAu/ITO devices, respectively. The initial resistance of the devices was found 3.5 × 104 Ω with Au Nps and 1.3 × 106 Ω without Au Nps. Therefore, the initial resistance of the device incorporated with Au Nps was found to be 100 times lower than that of the pristine GO device. The on/off ratio between LRS and HRS in pristine GO devices is very low and that too at high voltages. GOAu devices have enhanced on/off ratio at very low switching voltages as compared to pristine GO devices which is due to the presence of Au Nps, which are working as charge trapping centres.

Figure 13.

(a) Typical I‐V characteristics of the Al/GOAu/ITO device in semi‐log scale; inset shows I‐V characteristics for the Al/GO/ITO device. (b) log‐log I‐V plot for the GOAu device [71].

The slope of the I‐V curve in LRS was found to be ∼1 as shown in Figure 13b; however, this linear current‐voltage relationship need not be ohmic: It can be Schottky‐limited conduction in the Simmons’ limit of short electron mean free paths [75],while in the high voltage regime of HRS, the slope was found to be ∼4.4, which reveals that a strong space charge limited current (SCLC) mechanism also known as trapped charge limited current (TCLC) mechanism is prevailing in the device [76]. The TCLC behaviour of the films is in agreement with the presence of Au Nps in the films, which are working as charge trapping centres. Hence the charges get trapped in one voltage polarity transiting the device to HRS and detrapped in the opposite polarity rendering back the device to LRS again. Therefore, the device shows bipolar switching behaviour exhibiting trapping/detrapping mechanism. GO sheets have different types of defects, such as oxygen vacancies, dislocations etc. [77, 78]. The defects and trapping nodes present in GO sheets play a significant role in switching behaviour. Initially, the device was in LRS due to the presence of large number of oxygen vacancies and the Au Nps. The device performed well in both states showing retention, endurance and statistical distribution over different cells as shown in Figure 14ac.

Figure 14.

(a) Retention, (b) endurance properties and (c) statistical distribution over different cells of GOAu device in LRS and HRS [71].

As discussed above, Au Nps dispersed in GO layers trap the charge, resulting in capacitive behaviour of the devices. In order to test this scenario, capacitance‐voltage (C‐V) measurements were carried out. Figure 15a and b shows the C‐V curves of the Al/GO/ITO and Al/GOAu/ITO devices. The measured capacitance was found to be ∼3.4 pF in LRS and ∼11.2 pF in HRS in GO device, whereas it was ∼9 pF in LRS and ∼350 pF in HRS in the GOAu device. It was observed that in both the resistance states, capacitance values were increased by a factor of ∼10 in HRS/LRS in GOAu devices in comparison to GO devices, which is mainly due to the charge trapping process by Au Nps. In GO matrix having Au Nps, this can be explained as follows: the array of Au Nps induces the coupling capacitance and the trapping energy levels are set by the work function of Au Nps.

Figure 15.

C‐V curves of (a) GO and (b) GOAu devices in LRS and HRS [71].

Followed by an initial random charging, the charge carriers around a single Au Np may increase due to trapping process, which results in increasing the capacitive coupling and finally increases the coulomb repulsion. Au Nps embedded in GO matrix act as small capacitors having large capacitance due to their big surface/volume area and the associated interfacial polarization. An additional barrier will be created by these metal‐island capacitors which prevent the movement of electrons in the matrix and the charge transfer through these small metal‐islands, below a particular threshold voltage gets blocked (charges get trapped) leading to an increase in resistance as well. Therefore, in GOAu devices, achieving such a huge resistance in HRS can be attributed to the coulomb blockade effect imparted by the Au Nps which is associated to the quantum effect of metal nanoparticles [79, 80].

3. Conclusions

In summary, graphene oxide is a promising material for RRAM devices due to its high scalability and unique physical‐chemical properties. Fabrication of GO and its films, composites and heterostructures are very cost effective and opens up the direction for commercialization. Showing forming‐free behaviour is an excellent property of GO devices over other oxide‐based devices that require initial high voltages to start the switching process. Multi‐level switching in GO‐based heterostructures has the potential of high‐density data storage, which is the need of future non‐volatile memories. Flexibility and mechanical endurance observed in GO‐based composite RRAM devices have prospects in portable and flexible devices which is advantageous over the rigid silicon technology. Gold nanoparticles embedded in GO have shown enhanced switching properties with very high on/off resistance ratio and very low switching voltages, which are suitable for low power resistive memory devices. The mechanism underlying the graphene oxide‐based memories is the formation of conductive filaments due to the roles played by oxygen ions and vacancies. Therefore, GO‐based RRAM devices have enough potential to become one of the important non‐volatile memories due to their encouraging properties of forming free, multi‐bit data storage and low power flexible devices. However, further research is still needed towards scaling of these devices below 10 nm node and that too having fast switching speeds to establish graphene oxide‐based non‐volatile resistive devices achieve a niche in memory industry.


The authors acknowledge the financial support from DOD Grant (AFOSR‐FA9550‐16‐1‐0295) and IFN‐NSF Grant (EPS‐01002410) for travel support.

© 2018 The Author(s). Licensee IntechOpen. This chapter is distributed under the terms of the Creative Commons Attribution 3.0 License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

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Geetika Khurana, Nitu Kumar, James F. Scott and Ram S. Katiyar (April 4th 2018). Graphene Oxide-Based Memristor, Memristor and Memristive Neural Networks, Alex Pappachen James, IntechOpen, DOI: 10.5772/intechopen.69752. Available from:

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