Comparison table of some recent memristor devices.

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Open access peer-reviewed chapter

By Abdullah Yesil, Fatih Gül and Yunus Babacan

Submitted: August 1st 2017Reviewed: October 24th 2017Published: December 20th 2017

DOI: 10.5772/intechopen.71903

Downloaded: 320

Chua predicted the existence of the fundamental circuit element, which provides the linkage of flux (ϕ) and charge (q). The new circuit element that is called memristor (memory + resistor) was demonstrated by Hewlett Packard (HP) researchers in 2008. Researchers focused on memristor fabrication, modeling, and its application with other circuit elements. Researchers could not find the commercially memristor devices in the market because of some fabrication difficulties. For this reason, researchers focused on the memristor modeling to analyze its characteristics with other circuit elements. This chapter presents a review of the general information of memristor and its device parameters. The chapter is continued with the details of memristor mathematical and SPICE models and memristor emulators based on the other circuit elements.

- memristor
- memristor models
- SPICE
- memristor emulator
- active circuit element-based memristors

Both active circuit elements and passive circuit elements are used in circuit design, and the first circuit elements that come to mind are passive circuit elements: resistor, capacitor, and inductor. Resistor, capacitor, and inductor define the relationship between the voltage and current, voltage and charge, and current and flux, respectively. Leon Chua from the University of California (Berkeley) showed the missing relationship as shown in Figure 1 between flux and current in 1971 and 1976 [1, 2].

At the same time, Chua called the missing circuit element as a memristor (memory + resistor) and presented the mathematical equations of the new circuit element. But the seminal paper of Chua could not find attentions among the researchers because of the technical fabrication difficulties of the memristor. Therefore, researchers did not focus on the memristor and its application until its first fabrication of memristor by HP researchers in 2008 [3]. The first memristor is made from TiO_{2} thin film and has crossbar structure as shown in Figure 2.

The HP research team also presented the mathematical model of TiO_{2} memristor, and current-voltage relationship is defined by

where *V* is the voltage and *I* is the current. Here, *M* is the resistance of memristor and memristance and depends on *xi* state variables. Memristance which performs nonlinear characteristics depends on frequency and applied input signal. The TiO_{2} memristor consists of two main structures which are named doped and undoped region as shown in Figure 3, and the memristance changes the ratios of the doped region and device thickness.

Memristor acts as a conductor if the thickness of the doped region becomes wide as shown in Figure 3b. Undoped region becomes wide as shown in Figure 3c, and memristor behaves as a high-resistance element when the input signal applied in an opposite direction.

Memristance is as below:

The change of the *x* value is depicted:

The *μv* is the electron mobility, and *w* and *D* denote the doped area of memristor and thickness of the memristor, respectively. The resistances of the high and low dopant concentrations are symbolized with *RON* and *ROFF*, respectively. Researchers added a function to the memristor mathematical model to take into account the nonlinear dopant effect [3, 5, 6, 7]. Equation (3) is rearranged as follows:

The first function which is called window function is presented by HP research team [3] as shown below:

The HP model is linear and very simple; so Wolf and Joglekar [5] depicted the new window function as shown below:

The function is starting to similar the rectangular shape when *p*-value becomes higher, namely, dopant drift is decreasing as shown in Figure 4.

Biolek et al. [6] modified the model of Wolf and Joglekar:

The window function which is presented by Biolek is shown in Figure 5.

Prodromakis et al. [7] depict the versatile model as the following:

Model function of Prodromakis et al. becomes higher than the value of 1 unlike previous window functions. The function depends on the various *p*-values shown in Figure 6.

Researchers suggested various mathematical memristor models such as nonlinear ion-drift model [8], Simmons’ tunnel barrier model [9], and ThrEshold Adaptive Memristor (TEAM) model [10] different from the linear HP model. The chapter is continued with memristor device.

The pinched hysteresis loops serve as a fingerprint in the characterization of memristors [11] as shown in Figure 7. It is to say that, if any two-terminal device is showing pinched hysteresis loop, a memristor regardless of the device material is accepted. Resistive switching (or memristive behavior) in metal-oxide semiconductor was first observed by Hickmott in 1962, but it was interpreted as the current anomaly [12]. As in resistive switching devices, a typical pinched hysteresis loop is seen at the first and third quadrants of the current-voltage (I-V) curves [13]. Put differently, all memristors can be accepted as resistive switching devices regardless of the operating mechanisms and the device material [14].

The semiconductor-based memristor devices usually consist of an active layer sandwiched between a top and a bottom electrode (TE/BE) depicted in Figure 7. The first physical implementation of the memristor was achieved by HP labs using TiO_{2} metal-oxide active layer [3]. After that, several physical memristor devices suggested the use of different materials and production methods. Most metal-oxide semiconductors exhibit memristor characteristics, including TiO_{2}, ZnO, HfO_{2}, VO_{2}, TaO_{x}, and so on [13, 15, 16]. There are two types of contact in semiconductor: one is of Schottky (rectifying), and the other one is ohmic. Several electrode materials can be used as TE or BE including Pt, Au, Ag, Al, etc. In one diode-one resistor (1D1R)-type memory cell memristor device, one of the electrodes must be a Schottky contact [17].

The unipolar and bipolar operation of memristor devices which are shown in Figure 8 can be categorized in according with current-voltage characteristics. In unipolar operation characteristics depend only on the amplitude of the applied voltage, whereas bipolar operations are resolved by polarity and amplitude of the applied voltage [13]. Unipolar operation is more striking than bipolar operation in memristor switching devices, since it needs simple circuits. But then, bipolar operation has generally high uniformity and more endurance compared to unipolar operation [18].

There are two types of physical working mechanisms in the explanation of the time-dependent current-voltage characteristics, based on molecular or ionic models: the homogeneous interface type and the filamentary (conduction path) type [13, 16]. In the homogeneous type, the migration of oxygen vacancies as the majority carriers causes change of resistance. The filament-type mechanism is associated with the formation and rupture of conductive filaments in the active layer. Both types of mechanisms can be observed in the memristor devices as shown in Figure 9 and depend on the material and fabrication methods [18].

It is well known that reversible switching between a low-resistance state (LRS) or ON (SET) and a high-resistance state (HRS) or OFF (RESET) can be achieved by applying a certain voltage [18]. Operation voltage is also an important value for CMOS or other device integrations for memristor devices. Another criterion for the memristor devices is the power consumption related to the operation current. With the aim of escape permanent damage from over current, the compliance or limit current (CC) must be set in both unipolar and bipolar operations [13]. The compliance current is also related to power consumption of a memristor device [19].

The memristor has two states when used as a switching device: the high-resistance state (HRS) or OFF (RESET) state and the low-resistance state (LRS) or ON (SET) state [13]. The ON/OFF ratio defined as the proportion between resistances in HRS and LRS is some of the most important parameters when memristors are used as switching device [18].

The time to hold ON/OFF state is an important criterion when memristor device used a resistive switching memory or ReRAM element [20]. It is expected that the memristor device’s distribution of the HRS or LRS state which is shown in Figure 10 has acceptable values besides its ON/OFF ratio [19]. Since the memory unit needs to be repeatedly read or written by the other control units, cycling endurance is one of the main importance of memristor-based memory devices [18].

Some of recent memristor devices which are composed of various materials are compared according to the some important parameters as shown in Table 1 [19, 22, 23, 24]. The chapter is continued with memristor emulators based on the active circuit elements.

Active layer material | TE/BE | Operation mode | Operation mechanism | Operation voltage | ON/OFF ratio | Retention time | Endurance | Ref. |
---|---|---|---|---|---|---|---|---|

ZnO | Al/Al | Bipolar | Homogenous | −1.5 V/+1.5 V | 5 × 10^{1} | N/A | 100 | [19] |

TiO_{2} | Al/Al | Bipolar | Filamentary | −3 V/+1.5 V | 8 × 10^{2} | N/A | 10^{12} | [22] |

HfO_{2} | Pt/Ti | Bipolar | Filamentary | −3.5 V/+2 V | 10^{3} | 10^{4} | 1000 | [23] |

TaO_{x} | Pt/Pt | Unipolar | Filamentary | −1.5 V/+1 V | 10^{1} | N/A | 1000 | [24] |

Many SPICE models and emulators are presented by researchers [6, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47]. The first and applicable memristor model has been presented by Biolek and co-workers [6]. This model takes into account the boundary conditions using window function, and the feedback-controlled integrator is used to implement memory effect of the memristor. The block diagram of memristor and its SPICE model is shown in Figure 11. All simulation results which are shown in Figure 12 are completed using SPICE codes as shown below. Each curve is compatible with TiO_{2} memristor, and boundary effects are taken into account (Table 2).

* HP Memristor SPICE Model * For Transient Analysis only * created by Zdenek and Dalibor Biolek ************************** * Ron, Roff - Resistance in ON/OFF States * Rinit - Resistance at T = 0 * D - Width of the thin film * uv - Migration coefficient * p - Parameter of the WINDOW-function * for modeling nonlinear boundary conditions * x - W/D Ratio, W is the actual width * of the doped area (from 0 to D) * .SUBCKT memristor Plus Minus PARAMS: + Ron = 1 K Roff = 100 K Rinit = 80 K D = 10 N uv = 10F p = 1 *********************************************** * DIFFERENTIAL EQUATION MODELING * *********************************************** Gx 0 x value = {I(Emem)*uv*Ron/D^2*f(V(x),p)} Cx x 0 1 IC = {(Roff-Rinit)/(Roff-Ron)} Raux x 0 1T | * RESISTIVE PORT OF THE MEMRISTOR * ******************************* Emem plus aux value = {−I(Emem)*V(x)*(Roff-Ron)} Roff aux minus {Roff} *********************************************** *Flux computation* *********************************************** Eflux flux 0 value = {SDT(V(plus,minus))} *********************************************** *Charge computation* *********************************************** Echarge charge 0 value = {SDT(I(Emem))} *********************************************** * WINDOW FUNCTIONS * FOR NONLINEAR DRIFT MODELING * *********************************************** *window function, according to Joglekar .func f(x,p) = {1-(2*x-1)^(2*p)} *proposed window function ;.func f(x,i,p) = {1-(x-stp(−i))^(2*p)} .ENDS memristor |

Researchers are not able to reach the memristor devices in the market because of some production problems of the memristor. For this reason, researchers focused on the designing of memristor emulators to use with other circuit elements. Yener and Kuntman reported full active device-based memristor emulator which is consisting of differential difference current conveyor (DDCC) [35]. The proposed grounded memristor emulator consists of four circuit blocks based on DDCC as shown in Figure 13. Furthermore, there are no experimental results; however, its SPICE simulation results are given.

Another active circuit element-based grounded memristor emulator [36] has been implemented by using current backward transconductance amplifier (CBTA). This emulator consists of two different circuits such as decremental and incremental type given in Figure 14. Each memristor emulator is composed of a single CBTA, two resistors, one grounded capacitor, and single analog multiplier. In order to validate the feasibility of the presented memristor, only SPICE simulation results have been given.

The generalized mutator structure based on adder and subtractor has been proposed by Minaei et al. [37]. As far as connection ports are concerned, the generalized structure employs memristor, meminductor, and memcapacitor without using analog multiplier. By selecting an inductor to port 3, a capacitor to port 4, and a nonlinear resistor such as a diode to port 1, the generalized structure given in Figure 15 is utilized as memristor. Nonetheless, so as to verify the workableness of the presented structure, the SPICE simulation results are given.

Kim and co-workers presented the active circuit element-based memristor emulator [38]. This circuit is also implemented on the bread board using discrete circuit elements that are ADL1116PAL for NMOS transistors, ADL1117PAL for PMOS transistors, TL082 for OPAMP, and AD633 for analog multiplier and passive elements. There are three important tasks to implement memristor emulator: memory effect, frequency-/voltage-dependent characteristics, and nonlinearity. Memory effect and frequency/voltage dependency characteristics are implemented by using a capacitor like many other previous emulator circuits. Nonlinear characteristic of the memristor is obtained using multiplier circuit block. But each used block gives rise to extra power dissipation and more complex circuit (Figure 16).

Another active circuit-based memristor emulators which are shown in Figure 17 have been presented by Abuelma’atti and Khalifa [39]. Each emulator which is based on current-feedback operational amplifier (CFOA) enjoys operating two different types like decremental and incremental memristor emulators. This situation is a disadvantage of the emulator besides its grounded structure. Each circuit comprises three CFOAs, four resistors, two capacitors, and germanium diode without using an analog multiplier. Nonlinear characteristic is provided by germanium diode. CFOA which is an active element is modeled by AD844 commercially available active devices, and experimental results have been investigated.

Sánchez-López and Aguila-Cuapio proposed the charge-controlled memristor emulator circuit [40]. This circuit which is shown in Figure 18 is grounded; hence, application areas of the presented memristor emulator are limited in circuit designs. Moreover, it is implemented with discrete circuit element such as AD844 and AD633 besides its disadvantages.

Babacan and co-workers presented new memristor emulator based on multi-output operational transconductance amplifier (OTA) [41]. This emulator shown in Figure 19 is a derivative of the DDCC-based memristor emulator [42], but memristance value of this emulator can be adjusted by biasing current of the OTA. The change of the memristance value can be controlled by changing resistor (R) value. Average memristance value can be controlled using OTA-gm value because of the fact that OTA is used as controllable resistor by connecting the negative output terminal to the positive input terminal. In order to demonstrate the performance of OTA-based memristor emulator, both SPICE simulation results and experimental results have been performed. For experimental results, the memristor emulator is built using passive elements and commercially available active devices such as OPA860 for MO-OTA and AD633 for the analog multiplier.

Yesil and co-workers suggested only one DDCC-based memristor emulator which can be operated in high-frequency regions [42]. It is observed from Figure 20 that the capacitor provides the memory effect and the multiplication of both capacitor and resistor voltages is connected to the Y terminal of the active device. The resistance of memristor emulator circuit decreases when the Z terminal of the DDCC device is chosen as positive terminal (Z_{P}). Consequently, the circuit shows decremental memristor characteristics. For another state, an incremental memristor can be obtained when the Z terminal of DDCC is chosen as negative terminal (Z_{N}). This emulator consists of the third terminal (V_{sum}) to provide the floating characteristic. Serial connected memristors split applied voltage such as resistor if these memristors carry out a voltage; accordingly, the third terminal is connected to the output terminal. Just as DDCC-based [35], CBTA-based [36], and adder-and-subtractor [37]-based memristor, the performance of [42] is confirmed by SPICE simulations results.

Sozen and Cam proposed new floating memristor emulator based on OTA and CCII as shown in Figure 21 [43]. This emulator is made up of three OTAs, four CCIIs, and seven passive elements. Both SPICE simulation results and experimental results of the presented memristor emulator have been given to confirm its workableness and feasibility. Commercially available active devices CA3080 and AD844 have been utilized instead of OTA and CCII, respectively.

Sánchez-López et al. proposed second-generation current conveyor (CCII)-based flux-controlled memristor emulator which is shown in Figure 22 [44]. The presented emulator comprises of four CCIIs, a multiplier circuit, five resistors, and single grounded capacitor. AD844 and AD633 are used instead of CCII and analog multiplier in the flux-controlled memristor emulator, respectively. So as to indicate the performance of flux-controlled memristor emulator, both SPICE simulation results and experimental results have been exhibited.

Babacan and Kacar suggested new memristor emulator which does not need any multiplication block as shown in Figure 23 [45]. This emulator is also fully floating, namely, has two terminals, and input signal can be applied in both terminals. The nonlinearity is provided by transistors which are operated in the subthreshold region. The presented memristor emulator includes single-ended OTA, one grounded capacitor, and two PMOS transistors. Note that the bulk terminals of PMOS transistors are connected to drain terminals of relevant transistors.

The first memristor model which accounts for spike-timing-dependent plasticity (STDP) mechanism is proposed by Li and co-workers [46]. The model which is shown in Figure 24 consists of five circuit models, and each model depends on the previous model so this model is complex and does not have any circuit implementation.

Babacan and Kacar suggested real-time fully floating memristor emulator which is accounted for synaptic activity [47]. Both memristive and STDP characteristics are obtained from the circuit which is shown in Figure 25. It is observed from Figure 25 that fully floating memristor emulator consists of a few numbers of MOS transistors and capacitors without using analog multiplier. Furthermore, STDP is experimentally demonstrated in memristive devices [48, 49, 50].

In summary, the comparison of the memristor emulator circuits is according to some important design parameters such as used circuit elements, electronically controllability, power supply value, etc. Each emulator has superior properties among the other emulators. Researchers can prefer appropriate emulator circuit for their memristor-based circuit designs (Table 3).

Reference | No. of floating passive elements | No. of active comp | No. of grounded passive elements | Sim./exp | Electronically controllable | Floating/grounded memristor emulator | Power supply |
---|---|---|---|---|---|---|---|

[35] | — | 10 DDCCs, 8 transistors | 4 R, 1 C | Sim. | No | Grounded | ±1.25 V |

[36] | 1 R | 1 CBTA, 1 multiplier | 1 R, 1 C | Sim. | No | Grounded | ±0.9 V |

[37] | 1 L, 1 C | 1 adder and 1 subtractor | 1 D | Sim. | No | Grounded | ±1.25 V |

[38] | 1 R | 2 OPAMPs, 1 multiplier, 10 transistors | 1 R, 1 C | Both | No | Grounded/floating | ±5 V |

[39] | 2 R, 1 D | 3 CFOAs (AD844) | 2 R, 2 C | Exp. | No | Grounded | NA |

[40] | 1 R | 1 CCII(AD844), 1 multiplier (AD633) | 1 C | Both | No | Grounded | ±10 V |

[41] | — | 1 MO-OTA, 1 multiplier | 1 R, 1 C | Both | Yes | Grounded | ±1.25 V/±5 V |

[42] | 1 R | 1 DDCC, 1 multiplier | 1 R, 1 C | Sim. | No | Floating | ±1.5 |

[43] | 3 R | 3 OTAs, 4 CCIIs | 3 R, 1 C | Both | Yes | Floating | ±15 |

[44] | 2 R | 4 CCIIs (AD844), 1 multiplier (AD633) | 3 R, 1 C | Both | No | Floating | ±10 V |

[45] | — | 1 OTA, 2 transistors | 1 C | Sim. | No | Floating | ±1 V |

[47] | — | 10 transistors | 3 C | Sim. | No | Floating | — |

In this chapter, memristor devices, models, and emulators have been referred. Memristors have nonlinear characteristics; therefore, high-order mathematical equations should be used to create a mathematical model of the memristor. Active circuit elements are essential to build memristor emulators because of the fact that active elements are versatile and suitable for nonlinear circuit element designs. Nowadays, memristors can exhibit different characteristics when they are fabricated using various materials. Important characteristics such as switching mechanism, synaptic behavior, and operating frequency region are directly depending on the memristor structure. Hence, there is an essential to implement various models and circuits to emulate real memristors. Some emulator circuits exhibit hard-switching characteristics, other emulators exhibit smooth-switching characteristics, or some emulators account for spike-timing-dependent plasticity mechanism.

As a result, researchers are not able to reach real memristor easily so all emulator models and circuits are important to exhibit real memristors. Memristors are ultradense devices and consume very low energy; that is why it is not only important to emulate real emulator. Researchers need also emulator circuits which have minimum energy consumption and simple structure.

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