Open access peer-reviewed chapter

Simulation of Power Converters Using Matlab-Simulink

By Christophe Batard, Frédéric Poitiers, Christophe Millet and Nicolas Ginot

Submitted: December 1st 2011Reviewed: March 27th 2012Published: September 26th 2012

DOI: 10.5772/46419

Downloaded: 66270

1. Introduction

A static converter is an electrical circuit which can control the transfer of energy between a generator and a receiver. The efficiency of a converter should be excellent. The components constituting a converter are:

  • Capacitors, inductors and transformers with minimum losses,

  • Power semiconductors operating as switches.

The design of power converter consumes time with a significant cost. Performance is generally determined after testing converters at nominal operating points. Thus, simulation can substantially reduce development cost.

The development of specific software dedicated to simulation of power electronic systems (PSIM, SABER, PSCAD, “SimPowerSystems” toolbox of Simulink…) allows simulating fast and accurately the converter behavior. Unfortunately, the designers of converters don’t always have such available software. In many cases, they have to simulate power electronics devices for occasional need. So they don't want to buy the SimPowerSystems toolbox in addition to Matlab and Simulink. The purpose of this chapter is to present the ability to simulate power converters using only Simulink. Simulink is a graphical extension to MATLAB for representing mathematical functions and systems in the form of block diagram, and simulate the operation of these systems.

Traditionally two approaches are used to simulate power electronic systems:

  • The first, so called fixed topology, where semiconductors are impedances with low or high values based on their on-state or off-state. Equations system does not depend on the state of the semiconductor. Despite its simplicity, this approach raises problems of compromise between accuracy of the results and stability of numerical integration methods.

  • The second, so called variable topology, assimilates the switches to open-circuits or short-circuits. The system equations then depend on the state of the semiconductor. There are no accuracy problems but writing the equations of different configurations can be laborious as well as obtain switching conditions of the semiconductor.

In this chapter, we propose a method for simulating static converters with Simulink based on the variable topology approach where switching conditions of semiconductor are realized by switching functions.

2. Linear load modeling in Simulink

This paragraph deals with the modelling of linear elements commonly encountered in the electrical energy conversion. Elementary linear dipoles are described by a system of linear differential equations. There are several different ways to describe linear differential equations. The state-space representation (SSR) is the most easy to use with Matlab. The SSR is given by equations (1) and (2).

X˙=AX+BUE1
Y=CXE2

where X is an n by 1 vector representing the state (commonly current through an inductance or voltage across the capacitance ), U is a scalar representing the input (voltage or current), and Y is a scalar representing the output. The matrices A (n by n), B (n by 1), and C (1 by n) determine the relationships between the state and input and output variables.

The commonly elementary dipoles encountered in power electronics are:

  • RL series dipole

  • RLC series dipole

  • RC parallel dipole

  • L in series with RC parallel dipole

2.1. RL series dipole

The variation of the current through the dipole is governed by equation (3).

v(t)=Ri(t)+Ldi/dti(t)=1L(v(t)Ri(t))dtE3

The RL series dipole is modelled by the scheme illustrated in figure 1.

2.2. RLC series dipole

The variation of the current through the dipole is governed by equation (4) and the variation of the voltage across the capacity is governed by equation (5).

v(t)=Ri(t)+vC(t)+Ldi/dti(t)=1L(v(t)Ri(t)vC(t))dtE4
i(t)=CdvC/dtvC(t)=1CidtE5

Figure 1.

Model of a RL series dipole

The RLC series dipole is modelled by the scheme illustrated in figure 2.

Figure 2.

Model of a RLC series dipole

2.3. RC parallel dipole

The variation of the voltage across the dipole is governed by equation (6).

i(t)=Cdv/dt+v(t)/Rv(t)=1C(i(t)v(t)/R)dtE6

The RC parallel dipole is modelled by the scheme illustrated in figure 3.

2.4. L in series with RC parallel dipole

In a L in series with RC parallel dipole, the variation of the current through the inductance is governed by equation (7) and the variation of the voltage across the capacity is governed by equation (8).

vi(t)=vo(t)+LdiLdtiL(t)=1L(vi(t)vo(t))dtE7
iL(t)=iR(t)+Cdvodtvo(t)=1C(iL(t)iR(t))dtE8
iR(t)=vo(t)/RE9

The L in series with RC parallel dipole is modelled by the scheme illustrated in figure 4.

Figure 3.

Model of a RC parallel dipole

Figure 4.

Model of a L in series with RC parallel dipole

3. DC-DC converter model in Simulink

This part will be dedicated to the DC-DC converter modelling with Simulink. The input generator is a DC voltage source and the output generator is also a DC voltage source. The output voltage is always smoothed by a capacitor. Only the non-isolated DC-DC converters are studied in this paragraph. The switches are assumed ideal, as well as passive elements (L, C)

3.1. Buck converter

3.1.1. Operating phases

The buck converter circuit is illustrated in figure 5a. The most common strategy for controlling the power transmitted to the load is the intersective Pulse Width Modulation (PWM). A control voltage vm is compared to a triangular voltage vt. The triangular voltage vt determines the switching frequency ft. The switch T is controlled according to the difference vm – vt (figure 5b). Three operating phases are counted (figure 5c):

  • T state-on and D state-off

  • T state-off and D state-on

  • T and D state-off

Figure 5.

Buck converter

The variation of the current through the capacitor C is governed by equation (10). The variation of the voltage across the capacity is governed by equation (11). Equation (12) describes the variation of the voltage across the inductance which depends on the operating phase. F is a logical variable equal to one if vm is greater than or equal to vt, F equal to zero if vm is less than vt. Sign(iL) is also a logical variable which is equal to one if iL is positive, sign (iL) equal to zero if iL is zero.

iC(t)=iL(t)io(t)=CdvodtE10
vo(t)=1CiC(t)dt=1C(iL(t)io(t))dtE11
vL(t)=(vi(t)vo(t))*Fvo(t)*F¯*sign(iL)E12

3.1.2. Open-loop buck converter

Simulink model of the open-loop buck converter is shown in figure 6 a. The Buck block is illustrated in figure 6 c. Equation (12) is modelled by blocks addition, multiplication and logic. The structure of the converter requires a current iL necessarily positive or zero. Also, the inductance current is modelled by an integrator block that limits the minimum value of iL to zero.

The PWM control block is illustrated in figure 6 b.

In the case of a resistive load, the load block is constituted by a gain block (value 1/R).

Figure 6.

Buck converter described in Simulink

3.1.3. Closed-loop buck converter

A closed-loop buck converter circuit is illustrated in figure 7 a. The measurement of the output voltage is realized by 2 resistances R1 and R2. The regulation is achieved by a PID controller. Simulink model of the closed loop converter is shown in figure 7 b. Simulink PID control block is illustrated in figure 7 c.

The parameters used for the closed-loop simulation are :

Vi = 12 VL = 300 HC = 5 FR = 3 ft = 50 kHz
Output voltage measurement:R1 = 10 kR2 = 10 k
PID block :Kp = 10Ti = 0.2 ms

Table 1.

The voltage reference was fixed to 2.5 V. The simulation of the closed-loop buck converter is illustrated in figure 7 d. The list of configuration parameters used for is:

Start time : 0                                                                                     Stop time : 0.5 e3Type : Variablestep                                                                     Solver : ode15s (stiff/NDF)Max step size : 1e6                                                                      Relative tolerance : 1e3Min step size : auto                                                                         absolute tolerance : autoE13

Figure 7.

Modeling a closed loop DC / DC converter

In steady-state, Vref = Vmes = 2.5 V. From figure 7a, we deduce the theoretical value of Vo:

Vo|steadystate=R1+R2R2Vref=5VE14

Simulation is in good agreement with theoretical value. From figure 7d, we deduce that the transient state last roughly 0.2 ms.

3.2. Boost converter

3.2.1. Operating phases

The boost converter circuit is illustrated in figure 8 a. The principle of the switch control is described in figure 5b Three operating phases are counted (figure 8c) :

  • T state-on and D state-off

  • T state-off and D state-on

  • T and D state-off

The variation of the voltage across the inductance L (equation 14) and the current through the capacity (equation 15) depend on the operating phase.

vL(t)=vi(t)*F+(vi(t)vo(t))*F¯*sign(iL)E15
iC(t)=io(t)*F+iL(t)*F¯*sign(iL)=CdvodtE16
vo=1CiC(t)dt=1C(io(t).F+iL.F¯.sign(iL))dtE17

3.2.2. Open-loop operation

Simulink model of a open-loop boost converter is shown in figure 9a. The Boost block is illustrated in figure 9b. Equation (14), (15) and (16) are modeled by addition blocks, multiplication blocks and logic blocks. The structure of the converter requires a current iL necessarily positive or zero. Also, the inductance current is modeled by an integrator block that limits the minimum value of iL to zero.

The PWM control block is illustrated in figure 6 b.

In the case of a resistive load, the load block is constituted by a gain block (value 1/R).

Simulation example:

The parameters used for of an open-loop simulation are :

Vi = 12 VL = 200 HC = 50 FR = 5 ft = 50 kHz
Control blok:Vtmax= 1 VVtmin= - 1 VVm = 0

Table 2.

The simulation of the open-loop boost converter is illustrated in figure 9 c. The list of configuration parameters used is:

Start time : 0                                                                                     Stop time : 7 e3Type : Variablestep                                                                      Solver : ode15s (stiff/NDF)Max step size : 1e6                                                                       Relative tolerance : 1e3Min step size : auto                                                                         absolute tolerance : autoE18

Knowing that vt varies from – 1 V to + 1 V and vm = 0, we deduce that the duty cycle is equal to 0.5. In steady-state, we deduce theoretical value of Vo :

Vo|steadystate=Viα=24VE19

Simulation is in good agreement with theoretical value. From figure 9c, we deduce that the transient state last roughly 2.5 ms.

Figure 8.

Boost converter

Figure 9.

Boost converter described in Simulink

4. DC-AC converter model in Simulink

An inverter is a DC – AC power converter. This converter obtains AC voltage from DC voltage. The applications are numerous: power backup for the computer systems, variable speed drive motor, induction heating... In most cases, the dead times introduced into the control of the switches do not change the waveform of the inverter.

This paragraph is dedicated to the simulation of a three-phase inverter without taking into account the dead times introduced into the control of the switches.

4.1. Electrical circuit

A variable speed drive for AC motor is shown in figure 10. It consists on a continuous voltage source and a three-phase inverter feeding an AC motor.

In order to simplify the modelling, the electrical equivalent circuit of the AC motor is described by an inductance LM in series with a resistance RM. The motor runs with delta connection of the stator.

Figure 10.

Electrical circuit

There are many strategies for controlling the switches. The most common control strategy is the intersective PWM. Its principle is reminded in figure 11. The switch control signals are generated by comparing three sinusoidal voltages (modulating) which are phase-shifted through 2/3 [rad] with a same triangular voltage waveform (carrier).

Figure 11.

Three phase PWM control

Knowing the conduction intervals of the switches, it is then possible to determine the waveform of different voltages and currents.

The line to neutral voltage v10, v20 et v30 are dependent on the state of the switches. Examples:

K1stateon and K2stateoff: v10= + VDC  K1stateoff and K2stateon: v10= 0K3stateon and K4stateoff: v20= + VDC  K3stateoff and K4stateon: v20= 0K5stateon and K6stateoff: v30= + VDC  K5stateoff and K6stateon: v30= 0E20

The phase-phase voltage can be deduce from the line to neutral voltage:

u12 = v10 – v20

u23 = v20 – v30

u31 = v30 – v10

The input current ii is deduced from the current of switches K1, K3 and K5:

ii=iK1+iK3+iK5=F1.i1+F3.i2+F5.i3E21
(21)

4.2. Simulink model

Simulink model of the three-phase inverter is shown in figure 12 a. The control block is illustrated in figure 12 b. It models a three phases PWM control. The inverter block is illustrated in figure 12 c.

In the case of a resistive load, the load block is constituted by a gain block (value 1/R).

4.3. Simulation example

The parameters used for of an open-loop simulation are :

Power Circuit :VDC = 400 VLM = 10 mHRM = 5 
Control blok:ft = 20 kHzVt max = 1 VVt min = - 1 V
fm = 50 HzVm max = 0.5

Table 3.

The simulation of the open-loop three-phase inverter is illustrated in figure 13. The list of configuration parameters used is:

Start time: 0                                                                                      Stop time: 1.5Type: Variablestep                                                                       Solver: ode15s (stiff/NDF)Max step size: 1e5                                                                        Relative tolerance: 1e3Min step size: auto                                                                          absolute tolerance: autoE22

The relation between the amplitude of the sinusoidal voltage and the triangular voltage determines the maximum value of the fundamental line-line voltage of the inverter:

Umax=32VmmaxVtmaxVDC=320.51400=173VE23

Neglecting the current harmonics, the maximum value of the line current is deduced from equation (22) :

I1max=3J12max=3.UmaxRM2+(LM2πfm)2=3.17342+(1022π50)2=59 AE24

Simulations are in good agreement with theoretical values.

Figure 12.

Three phase inverter

Figure 13.

Simulation example of a three-phase inverter with PWM control

5. Modeling and simulation of diode rectifiers

Three-phase AC to DC converters are widely used in many industrial power converters in order to obtain continuous voltage using a classical three-phase AC-line. These converters, when they are used alone or associated for specific applications, can present problems due to their non-linear behaviour. It is then important to be able to model accurately the behaviour of these converters in order to study their influence on the input currents waveforms and their interactions with the loads (classically inverters and AC-motors).

Several studies have shown the importance to have tools to simulate the behaviour of complex power electronics systems (Ladoux et al., 2005), (Qijun et al. 2007), (Zuniga-Haro & Ramirez, 2009) and several methods have been also presented in order to reduce the simulation time or to improve the precision. Although constant topology methods have been developed (Araujo et al., 2002), variable topology methods seem to be very suitable for simulation of power-electronics converters (Terrien et al., 1999).

In this chapter, an original and simple method is developed to model and simulate AC-DC converters taking into account overlap phenomenon with continuous and discontinuous conduction modes using Matlab-Simulink. The diodes are assumed ideal (vd = 0 when the diode is state-on, id = 0 when the diode is state-off)

If the electrical network is considered as ideal (no line inductance) and the conduction is maintained continuous, (id>0), the modelling of the converters can be realised very simply by a functional approach (commutation functions) where the switches are opened or closed. An example is presented in figure 14.

Figure 14.

Basic model of a single-phase rectifier.

In this chapter, the proposed approach is completely different from the approach based on commutation functions. It permits to simulate accurately the commutation in the six-pulse AC-DC converter, even under unbalanced supply voltages (the influence of voltages unbalances on AC harmonic magnitudes currents has been demonstrated (de Oliveira & Guimaraes, 2007) or line impedances conditions.

The overlap phenomenon and the unbalance of line impedances can be taken into account by modifying the commutation functions to correspond to the real behaviour of the rectifiers in these conditions. Indeed, the commutations are not instantaneous. Several contributions have already been proposed in scientific literature to refine the modelling of rectifiers. Most of these contributions show good simulation results but the analytical models used are complex and not reflecting precisely the real behaviour of the converter (Hu & Morrison, 1997), (Arrillaga et al., 1997). Some methods have been developed in order to model and simulate power factor corrected single-phase AC-DC converters (Pandey et al., 2004).

5.1. Electrical model

The six-pulse AC-DC converter is illustrated in figure 15a. Inductances Li characterize the line inductances and Lo characterizes the output inductance. The AC-DC converter modelling is based on the variable topology approach. The diodes are modelled by an ideal model which traduces the state of the switch:

  • vD = 0 when the diode is state-on;

  • iD = 0 when the diode is state-off.

There are 13 operating phases:

  • 1 phase of discontinuous conduction mode (P0)

All the diodes are state-off (figure 15b)

P1: D1and D5stateon      P2: D1and D6stateon       P3: D2and D6stateonP4: D2and D4stateon     P5: D3and D4stateon      P6: D3and D5stateonE25
O1: D1, D5and D6stateon     O2: D1, D2and D6stateon       O3: D2,D4and D6stateonO4: D2, D3and D4stateon     O5: D3, D4and D5stateon      O6: D1, D3and D5stateonFor an operating phase, we determinate the di/dt through each inductance (Li and Lo) and the voltage across each diode. In order to simplify results presentation, we consider that the line is balanced (same RMS voltages and line inductances Li) and have no resistive part.

Figure 15.

Six-pulse diode rectifier.

Naturally, the method is equivalent under unbalanced conditions but the mathematical expressions of the different variables are more complex.

As an example, we will consider the following succession of phases: P0, P1, O1, P2, O2, P3…:

To shift from phase P0 (diodes state-off) to phase P1 (D1 D5 state-on), the voltage across diodes D1 and D5 have to be equal to zero.

To shift from phase P1 (D1 D5 state-on) to overlap phase O1 (D1 D5 D6 state-on), the voltage across the diode D6 has to be equal to zero.

To shift from overlap phase O1 (D1 D5 D6 state-on) to phase P2 (D1 D6 state-on), the current through the diode D5 has to be equal to zero.

And so forth …

5.1.1. Discontinuous conduction mode

This mode corresponds to the case where io = 0 (figure 15b). In this case, all diodes are opened. Equation (24) describes this mode.

dirdt=disdt=ditdt=0E26

5.1.2. Continuous conduction mode

Let’s take example of the continuous conduction mode P1. From the figure 15c, we can write equations (25), (26) and (27) :

dirdt=-disdt=diodt=urs-vo2Li+Lo E27
ditdt = 0 E28
vD6=ustLi2Li+Lo (ursvo)E29

We obtain the di/dt corresponding to the other continuous conduction modes by making circular permutations of indexes. For example, for conduction mode P2: D1 and D6 are state-on. The indexes s and t are permuted as presented below:

dirdt = - ditdt = diodt = urt - vo2 Li + Lo E30
disdt = 0 E31

5.1.3. Overlap phases

Let’s take example of the overlap phase O1. From the figure 15c, we can write equations (30) and (31) :

dirdt=diodt E32
is + it = - i0  - disdt - ditdt = diodt E33

The expression of the di/dt as a function of the device parameters is more complicated to obtain here than in the case of a classical operating phase. Equations have been detailed in (Batard et al., 2007) and the final result is recalled below:

 dirdt = diodt = 13 Li + 2 Lo [ urs + urt - 2 vo] E34
disdt = 13 Li+2 Lo (2 Li+LoLi urs + Li + LoLi urt + vo)E35
ditdt=13Li+2Lo(Li+LoLiurs-2Li+LoLiurt+vo)E36

We obtain the di/dt corresponding to the other overlap modes by making circular permutations of indexes. For example, for overlap mode O2: D1, D2 and D6 are state-on. The indexes r and t are permuted and the sign of vs and dio/dt are changed:

dirdt = 13 Li+2 Lo (Li + LoLi uts  - 2 Li+LoLi utr - vo)E37
disdt = 13 Li+2 Lo (2 Li+LoLi uts + Li + LoLi utr  vo)E38
 ditdt = - diodt = 13 Li + 2 Lo [ uts + utr + 2 vo] E39

5.2. Simulink model

The simulink model of the six-pulse diode rectifier is illustrated in figure 16 a. The resistive load is modelled as a gain. The internal structure of the diodes rectifier block is presented in figure 16 b. Four different blocks can be seen on this scheme.

The first one called MF1 is a Matlab function which computes each diode voltage. The inputs of this block are the initial phase and the three-phase network voltages.

The second one called MF2 is also a Matlab function which computes the new operating phase and each inductance di/dt. Its computing algorithm is shown in figure 16 d. The new operating phase depends on the initial phase, the diode voltages and currents.

The third, called “Initial Phase” extract the operating phase of the MF2 block, this operating phase becomes the initial phase of the next calculation step (the Simulink block "memory" is used).

The Current block computes each diode current which permits to obtain the DC current and the line currents.

Figure 16.

Diode rectifier model

The internal structure of the Current block is shown in figure 16 c. The originality of our approach is the calculation of the values of each diode current with the values of di/dt of inductances Li and Lo. We use then six integrator blocks (one for each diode). The integrator blocks are set to limit their minimal output value to zero (lower saturation limit), this feature permits to avoid the problem of accurate determination of the instant when diodes currents reach to zero.

It is then possible to determinate the output current of the rectifier (io = iD1 + iD2 + iD3) and the input line currents (ir = iD1 – iD4, is = iD2 – iD5, it = iD3 – iD6).

5.3. Experimental validation

Simulations and experimental waveforms related to figure 15 are shown in figure 17. The simulation parameters are adjusted as follows:

URMS = 230 V ; R = 58 ; Li =800 H ; Lo = 800 mH

It can be seen that the simulated waveforms are very close to the experimental ones. The overlap interval 1 is equivalent for simulation and experimental results (1 0.7 ms).

Figure 17.

Comparison of Simulation and Experimental Waveforms in a six-pulse diode rectifier

The list of configuration parameters used for Matlab simulation is:

Start time : 0                                                                                     Stop time : 0.2sType : Variablestep                                                                      Solver : ode15s (stiff/NDF)Max step size : 1e4                                                                      Relative tolerance : 1e5Min step size : auto                                                                         absolute tolerance : autoE40

Using a PC with an Intel core 2 duo CPU running at 2.19 GHz with 1 Go de RAM, the simulation time was 4 s.

This model has also been tested with a load constituted of an inverter and an induction machine. The results of this test have validated operations for discontinuous conduction mode. For the same configuration parameters, the simulation time was 5 s.

6. Modeling and simulation of thyristor rectifiers

The Simulink model of the controlled rectifier is very close to the Simulink model of the diode rectifier. Only the condition to turn the thyristor on is different to the condition to turn the diode on. For an ideal thyristor, it is recalled that the thyristor turn-on if its voltage is positive and if a current pulse is sent to the gate.

To illustrate the modelling of controlled rectifier with Simulink, let's look at one of the principles of speed control of DC machines.

6.1. Electrical model

Let us consider the electrical scheme presented on figure 18 a. It represents a DC motor fed by a six-pulse rectifier. The electrical equivalent circuit of the DC motor is described by an inductance La in series with a resistance Ra in series with an induced voltage Va which characterizes the electromotive force, as illustrated in figure 18 b.

Figure 18.

Controlled rectifier with inductive load

The thyristor are modelled by an ideal model which traduces the state of the switch:

  • VT = 0 when the thyristor is state-on

  • IT = 0 when the thyristor is state-off

Similar to the diode rectifier, there are 13 operating phases to describe:

  • 1 phase of discontinuous conduction mode (P0)

All the thyristor are state-off

P1: T1and T5stateon       P2: T1and T6stateon        P3: T2and T6stateonP4: T2and T4stateon      P5: T3and T4stateon        P6: T3and T5stateonE41
O1: T1, T5and T6stateon O2: T1, T2and T6stateon  O3: T2,T4and T6stateonO4: T2, T3and T4stateon  O5: T3, T4and T5stateon  O6: T1, T3and T5stateonE42

The different operating phases are illustrated in figure 15. The equations that governs an operating phase are the same whatever we work on a diode rectifier or a controlled rectifier.

6.2. Simulink model

The simulink model of the controlled rectifier with inductive load is presented in figure 19. It consists of four blocks:

  • Input Voltage block characterizes the mains supply,

  • teta_r block models the thyristor control,

  • Controlled rectifier block computes the different operating phases.

  • The load block represents the motor resistance Ra and the induced voltage Va.

The motor inductance La is regrouped with the output line inductance Lo to have a single output inductor Loeq.

Figure 19.

Simulink model of the controlled rectifier with inductive load

6.2.1. Internal structure of the rectifier block

The structure of the rectifier block is presented on figure 20 a. Four different blocks can be seen on this scheme: the first one called “Control T” is used for the control of the thyristor gate. The second one called MF1 is used to compute the inductances state and voltage. The third called Current computes inductances currents. Then, the Initial Phase block computes the initial state for next computing phase.

The computing algorithm has been created in accordance with figure 20 b. For each computing step, the new operating phase is calculated. This phase is a function of the initial phase, the sign of the inductance currents and the diode voltages. For each operating phase, the value of each inductance di/dt is calculated and permits to know the diodes currents with the integrator function.

The current block is strictly identical to the current block shown in figure 16.

6.2.2. Thyristor control

The control device for thyristor T1 is presented in figure 21. The switch-on of T1 is delayed of r after urt has reached to zero (block "Delay 1"). The control thus carried out is a pulse train (the width of a pulse is computed by block "Delay 2").

The same principle is applied to the other thyristor.

Figure 20.

Structure of the rectifier block

6.3. Experimental validation in continuous conduction mode

Simulations and experimental waveforms related to the electrical circuit presented in figure 18 are shown in figure 22. The simulation parameters are adjusted as follows:

URMS = 230 V ; Ra = 4 ; Va = 145 V; Li = 800 H ; Loeq = 800 mH

The list of configuration parameters used for Matlab simulation is:

Start time : 0                                                                                     Stop time : 0.2sType : Variablestep                                                                      Solver : ode15s (stiff/NDF)Max step size : 1e4                                                                      Relative tolerance : 1e5Min step size : auto                                                                         absolute tolerance : autoE43

Figure 21.

Control of thyristor T1

Figure 22.

Comparison of Simulation and Experimental Waveforms

We can see that simulation results are in good agreement with experimental waveforms. The overlap delays are equivalent for simulation and experimental results.

7. Conclusion

This chapter has shown that it is possible to simulate many electrical power converters only using Simulink toolbox of Matlab, thus avoiding the purchase of expensive and complex dedicated software. The simulation method is based on the variable topology approach where switching conditions of semiconductor are realized by switching functions.

The first part of this chapter is dedicated to the modelling of linear loads: RL series, RLC series and L in series with RC parallel dipoles are considered. The second part deals with the simulation of DC-DC converters. The buck converter is first studied: after describing the operating phases, open-loop and closed-loop models are presented. A simulation is realised for closed-loop model showing good agreement with theoretical values. The third part shows how to model three-phases DC-AC converters. The electrical circuit and his complete Simulink model are presented and simulation results on RL series load with PWM control are shown. The fourth part presents the modelling of a six-pulse AC-DC converter which is frequently used in industrial applications. The complete model of this converter and his Simulink equivalent circuit are accurately described taking into account overlap phenomenon. A simulation result on RL series load is presented and compared to experimental result. The similarity of the two results shows the validity of the proposed model. The fifth part extends the method to controlled rectifier. The structure studied here is a six-pulse thyristor rectifier feeding a DC motor. The difference with the diode rectifier is presented with the introduction of a thyristor control block in the simulation. Simulations results are showed in continuous condition mode and are in good agreement with experimental results.

Many of the results presented in this chapter are computed with short simulation times (few seconds). This can be achieved thanks to the simplicity of the proposed method. The power electronics converters presented are used alone but the method can be easily extended to cascaded devices allowing the simulation of complex power electronic structures such as, for example, active filters with non-linear loads.

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Christophe Batard, Frédéric Poitiers, Christophe Millet and Nicolas Ginot (September 26th 2012). Simulation of Power Converters Using Matlab-Simulink, MATLAB - A Fundamental Tool for Scientific Computing and Engineering Applications - Volume 1, Vasilios N. Katsikis, IntechOpen, DOI: 10.5772/46419. Available from:

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