Open access peer-reviewed chapter

Power Efficient Data-Aware SRAM Cell for SRAM-Based FPGA Architecture

By Ajay Kumar Singh

Submitted: May 24th 2016Reviewed: December 14th 2016Published: May 31st 2017

DOI: 10.5772/67257

Downloaded: 418

© 2017 The Author(s). Licensee IntechOpen. This chapter is distributed under the terms of the Creative Commons Attribution 3.0 License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

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Ajay Kumar Singh (May 31st 2017). Power Efficient Data-Aware SRAM Cell for SRAM-Based FPGA Architecture, Field George Dekoulis, IntechOpen, DOI: 10.5772/67257. Available from:

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