Engineering » Electrical and Electronic Engineering » "Wireless Sensor Networks - Technology and Applications", book edited by Mohammad Matin, ISBN 978-953-51-0676-0, Published: July 18, 2012 under CC BY 3.0 license. © The Author(s).

Radio-Triggered Power Management in Wireless Sensor Networks

By Jie Wang, Qinghua Gao, Yan Yu, Hongyu Wang and Minglu Jin
DOI: 10.5772/39189

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Overview

Figure 1. Illustration of the network controller and node system

Figure 2. Block diagram of the node equip with the radio-triggered wake-up circuit

Figure 3. RF to DC radio-triggered wake-up circuit

Figure 4. Basic voltage doubler rectifier

Figure 5. Rectifier during the negative part of the RF cycle

Figure 6. Rectifier during the positive part of the RF cycle

Figure 7. Multistage rectifier

Figure 8. Equivalent circuit of the HSMS2852

Figure 9. Voltage of L type matching network with input signal of 1.7uW (-27.7dBm)

Figure 10. Voltage of π type matching network with input signal of 1.7uW (-27.7dBm)

Figure 12. The prototype design

Figure 13. Measured return loss

Figure 15. The measured and simulated output voltage as a function of the input power

Figure 16. The measured and simulated output voltage as a function of distance

Figure 17. Long distance radio-triggered wake-up circuit with a comparator

Figure 18. Principle of the pulse width modulation scheme

Radio-Triggered Power Management in Wireless Sensor Networks

Jie Wang1, Qinghua Gao1, Yan Yu1, Hongyu Wang1 and Minglu Jin1

1. Introduction

As an emerging technique, the wireless sensor networks (WSNs) provide a cheap and straightforward way to acquire sensor data in hard accessible places or on rotating devices. Generally, the sensor nodes are self-supportive by including sensing, processing, storage and communication capabilities. And the node hardware usually operates with batteries, as it is infeasible to sustain the nodes with power supply, and other ambient sources of energy (like solar cells and wind energy) do not provide the required power levels, require the specific operational conditions or negatively impact from the shape. In most of the WSNs applications, it is inconvenient or even infeasible to replace the batteries of the node, and the lifetime of the batteries is equivalent to the lifetime of the WSNs. Hence, to prolong the lifetime of the WSNs, it is an important issue to design a power management scheme for employing the wake-up/sleep schedules, so as to perform effective power management for the WSNs nodes.

The essence function of the power management scheme is to determine at what time a node should enter a high-power wake-up running mode or enter a low-power sleep mode. And an excellent power management scheme should guarantee that a node should stay in the sleep mode as more as possible, since the power consumption of the two modes is dramatically different. For example, if the node adopts the MSP430 processor as the Micro Control Union (MCU), which has five power saving modes with different energy saving features. In one of the working modes, the processor shuts down all the components except for the memory, and the current consumption is only 0.1uA. This is less than 0.1% of the active working mode. So the lifetime of the node can be remarkably increased if it stays in the low-power sleep mode as long as possible. The simplicity of changing the wake-up mode to the sleep mode by applying a set of MCU instructions that shut down the hardware components is universally acknowledged. However, difficulties exist in the design process of changing the sleep mode to the running mode when the MCU of the WSNs node is in deep sleep mode and is unconscious of when to wake up. However, the messages can only be received and processed when the node is in the wake-up running mode. Hence, how to develop a low cost, low power consumption scheme to wake up the node from the sleep mode on demand becomes a challenging and promising task.

To solve this problem, many power management schemes have been proposed. The most widely adopted scheme is to realize wake-up/sleep schedule by waking up the WSNs nodes periodically. However, it is hard to define the wake up period, as the energy would be wasted if the node wakes up too often, and the network controller's commands would be missed if the node wakes up too seldom. A common phenomenon is that nothing happened in most of the wake-up periods, and the node enters sleep mode again. The disadvantage of this scheme is that it can not ensure that the node stays in the running mode when needed, meanwhile, the periodically wake up operation consumes excessive energy, which makes the scheme a high power consumption method. Another method is to use a low power stand-alone radio receiver subsystem to monitor the environment [1], [2]. The node keeps sleeping unless the receiver wakes it up after receiving the wake-up signal. For example, Atmel's ATA5283 is an ideal chip to do this work [1]. The newly proposed PicoRadio has such function too [2]. However, the consumption of extra energy and cost is the negative part of this method.

The chapter is organized as follows. The following section gives the background and related work. Section 3 describes the system view of the radio-triggered wake-up circuit. Section 4 presents the detailed circuit level design. Section 5 provides the simulation and measurement results. Section 6 discusses some schemes to improve the performance of the basic circuit, such as the schemes to improve the wake-up distance and to realize addressable wake-up. And the conclusion is drawn in the section 7.

2. Related work

The essential function of the power management scheme is to reduce the power consumption of the node consumed by unused hardware peripherals and radio resource. While it is easy to define when transmission is required, reception is usually unpredictable and asynchronous to a sensor node. However, the messages can only be received and processed when the node is in the wake-up running mode. Hence, how to develop a low cost, low power consumption scheme to wake-up the node from the sleep mode on demand becomes a challenging and promising task.

The simplest power management schemes are continuous listening or duty-cycling. Besides having energy conservation, an evident drawback of the duty cycling schemes is the increased latency compared to the always-on mode, and the scheme can not ensure that the node stays in the running mode when needed. Some advanced energy-efficient multi-access control (MAC) protocols like WiseMAC protocol and SCP-MAC protocol have been proposed, the detailed protocols can be referred to the survey of WSNs specific MAC protocols [3], [4], [5]. The wake-up costs may be amortised over periods of inactivity, in which MAC protocols regularly perform carrier sense operations. A work [6] explores several schemes for predicting the arrival time of the next message after an initial wake-up, which allows for scheduling an efficient carrier sense. More recently, a radio-triggered MAC protocol was proposed to realize power management [7].

Some literatures [8], [9], [10], [11], [12], [13] present the design of the power harvesting circuit for the radio frequency identification devices (RFID) chip. They adopt the high efficiency rectifier to realize the RF to DC signal transformation. They designed the circuit as a module for the RFID IC chip. To design a chip to realize the wake-up function is too complex and expensive for the WSNs node. Hence, we realize the design using discrete components. It's cheaper and more flexible and can be applied to different applications with little change. Our proposed passive radio-triggered wake-up circuit [14] is made up of some diodes, capacitors, and inductors, and could transform the RF power to DC voltage efficiently, and the circuit itself is a passive circuit which does not need any power supply. The above advantages make the passive radio-triggered wake-up circuit an ideal choice for realizing the power management in the cost sensitive WSNs.

3. System overview

The WSNs node with passive radio-triggered wake-up circuit can be waked up by means of harvesting power from RF signal emitted by the network controller. And the network controller must transmit a high intensity RF signal through the air. When it is the time for the node to be waked up, the controller emits the wake-up signal, and the circuit harvests the RF signal and produces a DC interrupt signal to wake up the MCU of the node immediately. Fig. 1 illustrates the system view of the network controller and node. The whole WSNs is made up of the general node equip with the passive radio-triggered wake-up circuit, and the network controller which could transmit high intensity RF wake-up signal. It should be mentioned that since our proposed passive radio-triggered wake-up circuit is made up of discrete devices, it is very convenient to change the working frequency of the circuit. Hence, most of the commercial transmitters can be adopted to realize the network controller design. In the WSNs applications, one can integrate the network controller's function into the WSNs node for simplicity.

Figure 1.

Illustration of the network controller and node system

The block diagram of the WSNs node is shown in the Fig. 2. Besides the traditional modules of the node, a passive radio-triggered wake-up circuit which transforms the RF energy to DC voltage is added to the node. It shares the same antenna with the transceiver, and sends the DC voltage directly to the MCU to trigger the interrupt operation.

Figure 2.

Block diagram of the node equip with the radio-triggered wake-up circuit

In this chapter, the RF to DC passive radio-triggered wake-up circuit is designed to operate in the UHF frequency ISM band of 915MHz, it should be mentioned that it is quit convenient to change the working frequency of the circuit. The modules of the RF to DC radio-triggered wake-up circuit are shown in Fig. 3. The circuit is made up of an antenna, an impedance matching network, and a rectifier. The antenna picks up the RF power sent out by the network controller, the impedance matching network ensures maximum power transfer in the system, and the rectifier converts the RF power to a DC voltage. In the Fig. 3, the signal at the mark 1 is RF signal, the signal at the mark 2 is also RF signal, however, the signal at the mark 3 is DC voltage. The rectifier realizes the crucial RF to DC transformation task, and the antenna and impedance matching network are auxiliary circuits that improve the RF to DC transformation efficiency.

Figure 3.

RF to DC radio-triggered wake-up circuit

The RF power received by the wake-up circuit at the mark 1 of Fig. 3 is given by the following equation

 ${P}_{\mathrm{r}}=\frac{{P}_{s}{G}_{s}{G}_{r}{\lambda }^{2}}{{\left(4\pi d\right)}^{2}}$ ()

where ${P}_{\mathrm{s}}$ is the transmission power of the network controller, ${G}_{\mathrm{s}}$ is the gain of the antenna of the network controller, ${G}_{\mathrm{r}}$ is the gain of the node antenna, $\lambda$ is the wavelength of the electromagnetic wave, and $d$ is the distance between the network controller and the node. In order to increase the working distance of the network controller, one can increase the transmission power of the network controller or increase the antenna gain of network controller or node. The transmission power ${P}_{\mathrm{s}}$ is 4W for our prototype 915MHz design. We assume that the antenna gain is 1dB. The wavelength $\lambda$ of 915MHz is 0.328m. If the distance between the network controller and the node is 40m, the received power ${P}_{\mathrm{r}}$ will be 1.7uW (-27.7dBm).

The impedance matching network transforms the input impedance of the rectifier to that of the antenna. A good impedance matching between the antenna and rectifier can reduce transmission loss and increase voltage gain [15]. Another function of the impedance matching network is to passively amplify the voltage. The theoretical amplifier efficiency of a matching network is expressed by the following equation

 $\frac{{V}_{out}}{{V}_{in}}=\frac{1}{2}\sqrt{1+{Q}^{2}}$ ()

where ${V}_{out}$ is the output voltage of the matching network (the voltage of mark 2 in Fig. 3), ${V}_{in}$ is the input voltage of the matching network (the voltage of mark 1 in Fig. 3), and $Q$ is the quality factor of the matching network. Equation (2) implies that the maximum gain of the matching circuit can be achieved with the maximum quality factor $Q$. However, one drawback of the high $Q$ circuit is that it reduces the bandwidth of the circuit. The relation of the quality factor $Q$ and bandwidth $\Delta f$ can be expressed as follows

 $Q=\frac{{f}_{c}}{\Delta f}$ ()

where ${f}_{c}$ is the center frequency of the wireless signal, and $\Delta f$ is the bandwidth of the circuit.

The rectifier is the most important module of the RF to DC circuit. It converts the RF energy to DC voltage. Because the peak voltage of the RF signal at the input of the rectifier is very low, we adopt the multistage rectifier in the design. Some papers have studied the rectifier design for passive RFID tags [11], [12]. However, all of them use CMOS process to design a chip to realize the function. Adding a chip to realize the wake-up function is too complex and expensive for the WSNs node. Hence, we realize the design using discrete components. It's cheaper and more flexible and can be applied to different applications with little change. Details of the design will be given in section 4.

4. Circuits design

4.1. Basic voltage doubler rectifier

The basic voltage doubler rectifier is shown in Fig. 4. It is made up of two diodes and two capacitors. The two diodes are connected in series, oriented so that forward current can only flow from the ground potential to the positive terminal of the output voltage ${V}_{out}$. The capacitor C1 prevents the DC current from flowing into the circuit. It stores the charge and permits the high frequency currents to flow. The capacitor C2 stores the resulting charge to smooth the output voltage ${V}_{out}$. Essentially, the circuit is a charge-pump structure. The capacitor C1 and diode D1 make up a dc-level shifter, and the capacitor C2 and diode D2 form a peak detector.

Figure 4.

Basic voltage doubler rectifier

When the RF signal is negative and larger than the turn-on voltage of the diode D1, the current flows from the ground point through the diode D1 and causes charge to accumulate on the capacitor C1. The equivalent model of the negative part of the RF cycle is shown in Fig. 5. At the negative peak, the voltage across the capacitor C1 is the difference between the negative peak voltage ${V}_{pk}$ and the voltage on top of the diode ${V}_{on}$. The right (positive) plate of the capacitor will be charged up to the voltage of ${V}_{pk}-{V}_{on}$. As a result, the DC level of the signal applied to the peak detector (capacitor C2 and diode D2) is shifted to the voltage ${V}_{shift}$ as

 ${V}_{shift}={V}_{pk}-{V}_{on}$ ()

Figure 5.

Rectifier during the negative part of the RF cycle

When the RF signal is positive and larger than the turn-on voltage of the diode D2, the diode D1 turns off and the diode D2 turns on. The current flows from the input capacitor C1 through the output diode D2 to the output capacitor C2. The equivalent model of the positive part of the RF cycle is shown in Fig. 6. The peak voltage over diode D2 can be calculated by

 ${V}_{out}={V}_{shift}+{V}_{pk}-{V}_{on}=2\left({V}_{pk}-{V}_{on}\right)$ ()

Figure 6.

Rectifier during the positive part of the RF cycle

The output voltage ${V}_{out}$ is defined by adding the voltage across the capacitor C1 to the peak positive RF voltage, and subtracting the turn-on voltage ${V}_{on}$. When the received RF power is invariable, in order to increase the output voltage ${V}_{out}$, the voltage on top of the diode ${V}_{on}$ must be as low as possible. Hence, the zero bias schottky diode is a good choice for the rectifier design. In theory, the output voltage ${V}_{out}$ could be double the peak voltage of the RF signal when the turn-on voltage ${V}_{on}$ can be ignored, from which fact the circuit derives its name. In the real application, the load resistance of the capacitors can not be ignored, and the circuit can not be able to draw out all the current and charge that stored in the capacitors, hence, the real output voltage ${V}_{out}$ must be less than the theory value.

4.2. Multistage rectifier

One stage rectifier can only produce a voltage of $2\left({V}_{pk}-{V}_{on}\right)$. In most of the scenes, the voltage is not high enough to trigger the MCU, hence, multistage rectifier is proposed.

As shown in Fig. 4. If we changed the ground level to a DC voltage ${V}_{ref}$, as has been analyzed above, the output voltage ${V}_{out}$ will be $2\left({V}_{pk}-{V}_{on}\right)+{V}_{ref}$. So we can cascade the basic voltage doubler rectifiers to form the multistage rectifier. The circuit diagram of the multistage rectifier is shown in Fig. 7. We can see that the multistage rectifier is made up of several one stage rectifiers, and the DC voltage generated at each stage is applied as the DC reference to its following stage. Therefore, the DC output voltage of the N-stage multistage rectifier is expressed as follows

 ${V}_{out}=2N×\left({V}_{pk}-{V}_{on}\right)$ ()

Equation (6) implies that one could continue to add as many stages as required to convert even the most modest input RF voltage into a proper output voltage ${V}_{out}$. But as stages are added, more and more power and charge are wasted in the diodes, capacitors, and PCB lines. The more the stages are added, the less efficient the circuit will be. What we want is the maximum of the output voltage as far as the radio-triggered wake-up function is concerned. Hence, the number of the stages must be carefully designed.

Figure 7.

Multistage rectifier

We adopt Avago's zero bias schottky diode HSMS2852 in our prototype design. At a small signal level, the schottky diode can be represented by a linear equivalent circuit, as shown in Fig. 8. Where Rj is the junction resistance of the diode, Cj is the junction capacitance of the diode, Rs is the parasitic resistance representing the losses in the diode's bond wire and the bulk silicon at the base of the chip, and Lp and Cp are parasitic inductance and capacitance caused by the package. As far as the HSMS2852 with SOT-23 package which is used in the prototype design is concerned, Rj is 9Kohm, Cj is 0.16pF, Rs is 20ohm, Cp is 0.08pF, and Lp is 2nH. We utilize the ADS software from Agilent to simulate the input impedance of the multistage rectifier with different stages by using the equivalent circuit in Fig. 8. The capacitors in the multistage rectifier are set to 100pF. The simulation results are summarized in the Table 1. From the Table we can see that the resistance and reactance reduce with the increasing of stages. Hence, with the increase of stages, it becomes more difficult to design the impedance matching circuit. Meanwhile, we should keep in mind that if we use different stages of multistage rectifier, the impedance matching circuit should be redesigned to ensure the maximum power transformation.

Figure 8.

Equivalent circuit of the HSMS2852

 Stages Zin(ohm) Stages Zin(ohm) 1 30.661-j329.6 6 5.102-j55.102 2 15.311-j165.071 7 4.376-j47.235 3 10.212-j110.135 8 3.826-j41.333 4 7.655-j82.623 9 3.402-j36.743 5 6.127-j66.114 10 3.064-j33.070

Table 1.

Input equivalent impedance of the multistage rectifier with different stages

4.3. Impedance matching network

From the Table 1 we can see that the input equivalent impedance of different stages consist of resistance and capacitive reactance. The impedance of the antenna is assumed as 50ohm for the 1/4 wavelength printed monopole antenna which is used in the design. As has mentioned above, the impedance matching network must have a high $Q$ so as to produce high voltage for the rectifier. Hence, a simple two elements L type matching is unsuitable as the $Q$ value of the L type matching network is fixed. The three elements $\pi$ type matching network is flexible to adjust the $Q$ value as requested. So a more flexible $\pi$ type matching network is adopted here. To illustrate the character of the basic one stage rectifier, a L type and a $\pi$ type matching network are designed and compared. Fig. 9 shows the result of the L type matching network and Fig. 10 shows the result of the $\pi$ type matching network.

Figure 9.

Voltage of L type matching network with input signal of 1.7uW (-27.7dBm)

Figure 10.

Voltage of π type matching network with input signal of 1.7uW (-27.7dBm)

In the Fig. 9 and Fig. 10, the Vmatch is the voltage measured at the output of matching network, and Vdc is the DC voltage output at the output of the rectifier. In the simulation, the power of the input RF signal is 1.7uW (-27.7dBm). From the figures we can see that the three elements $\pi$ type impedance matching network produces a voltage higher than the two elements L type network, and this is because the $\pi$ type matching network has a higher $Q$ than the L type network. In order to produce high voltage output, it is better to use the $\pi$ type matching network. As has been calculated with the equation (1), with a distance of 40m and transmitting power of 4W, the received signal strength is 1.7uW(-27.7dBm). Hence, the basic one stage rectifier circuit with good impedance matching will produce a DC voltage of about 200mV.

4.4. Optimization of the circuit

As has been discussed above, both the impedance and efficiency of the rectifier are changed with different stages. From equation (6) we can know that for a larger N a higher ${V}_{out}$ can be derived. However, the optimal number of stages should be found with a compromise between high DC output and low power loss due to power consumption of the schottky diodes. Meanwhile, the ${V}_{on}$ voltage of the zero bias schottky diode can not be neglected when the input signal is very weak. Hence, the more the stages, the more voltage will drop on the diodes. Table 2 shows the DC output voltage which is changed with the number of stages. The result is acquired with the input RF signal power of 100uW (-10dBm), 20uW (-17dBm), 6.8uW (-21.7dBm), and 1.7uW (-27.7dBm). As the cost is a key factor of the WSNs node design, only three stages are concerned here.

 Input power Stages -10dBm -17dBm -21.7dBm -27.7dBm 1 1.409V 813.1mV 493.5mV 200.8mV 2 2.212V 1.233V 682.7mV 224.7mV 3 2.807V 1.491V 692.7mV 225.6mV

Table 2.

Voltage under different input power with different stages

From Table 2 we can see that when the input power is high, the output voltage increases with the increase of the circuit stages obviously. However, when the input power is small, the output voltage increases with the circuit stages slightly. For the radio-triggered wake-up function, the input power is always small. Hence, two stages multistage rectifier circuit is suitable for the radio-triggered wake-up function. However, as far as other functions such as supplying power to other IC is concerned, it is a better choice to use a multistage rectifier with more stages. We simulate the character with different number of stages, and find that a 10 stages multistage rectifier can produce a voltage of 5.016V with the input signal power of -10dBm.

The rectifier output voltage is changed with the changing of the load impedance. For larger load impedance, a higher ${V}_{out}$ voltage can be derived. The simulated and measured results in this chapter are achieved with the load impedance of 100Kohm which is the general input impedance of the state-of-the-art MCU interrupt pin. With bigger load impedance, a higher voltage can be achieved.

 (a) Input power of -27.7dBm (b) Input power of -21.7dBm (c) Input power of -17dBm (d) Input power of -10dBm

Figure 11.

Output voltage of two stages rectifier with different input power

The time domain simulation waveforms of the two stages rectifier are shown in Fig. 11. We can see that with the increasing of the input power, it will take shorter time for the output voltage to become stable. With the input power of -27.7dBm, it takes about 25us to produce a voltage of 200mV. However, with the input power of -10dBm, it takes only about 3us to produce a voltage of 200mV. In the radio-triggered wake-up application, a wake-up time of less than 30us is an acceptable time to trigger the MCU to wake up.

5. Experimental results

To evaluate the above theory and simulation analysis, we design a prototype circuit as illustrated in the Fig. 12. The prototype circuit is a 915MHz passive radio-triggered wake-up circuit which is made up of a $\pi$ type impedance matching network and a two stages rectifier. For the sake of test and measurement, we use the SMA connectors to connect the circuit with the antenna, vector network analyzer, and oscilloscope. The default transmitting power of the network controller is 4W in the evaluations.

Figure 12.

The prototype design

To evaluate the performance of the $\pi$ type impedance matching network, we use the E5071C vector network analyzer from the Agilent to measure the return loss (S11 parameter) of the circuit. We scan the frequency band of 900MHz to 930MHz, and the measurement result is shown in Fig. 13. We can see that the return loss of the circuit is -16.9dB at the frequency of 915MHz, which is the minimum value in the whole frequency band. Hence, the circuit ensures that most of the energy can be transmitted to the rectifier circuit in 915MHz, and the $\pi$ type impedance matching network achieves good performance.

Figure 13.

Measured return loss

We use an oscilloscope to measure the DC output voltage under different input power, and the measurement results are illustrated in the Fig. 14. We measure the DC output voltage with an input power of -27.7dBm and -21.7dBm. From Fig. 14 we can see that the measured voltage level is close to the simulation result, and the rising time of the voltage is similar to the simulation result too. These results confirm the excellent performance of the two stages rectifier circuit.

 (a) Input power of -27.7dBm (b) Input power of -21.7dBm

Figure 14.

Measured DC output voltage with different input power

To evaluate the overall performance of the passive radio-triggered wake-up circuit, we measure and simulate the output voltage of the circuit with different input power, and plot the results in the Fig. 15. We can see that the measured results are near to the simulation results.

Figure 15.

The measured and simulated output voltage as a function of the input power

We also measure and simulate the output voltage of the circuit with different distance between the network controller and the WSNs node, and plot the results in the Fig. 16. We can see that the measured results are near to the simulation results too.

Figure 16.

The measured and simulated output voltage as a function of distance

The above experimental confirm the performance of the proposed passive radio-triggered wake-up circuit, and the results demonstrate that the circuit can transform the RF signal to DC voltage efficiently. Compared with the schemes proposed in the literatures [8], [9], [10], [11], [12], [13], our proposed scheme is the first one that uses the discrete components to realize the design and achieves as good as or even better performance. It's cheaper and more flexible and can be applied to different WSNs applications with little change.

6. Discussion about some performance improvement schemes

As has been analyzed above, the proposed passive radio-triggered wake-up circuit could achieve reasonable performance and could be adopted by the WSNs node to realize the power management task. However, in some WSNs based applications, one may want to improve the wake up distance of the network controller, or want to realize the addressable wake-up so as to wake up one node while keep the other nodes in the sleep node. In this section, we present some performance improvement schemes for solving the above two problems. It should be mentioned that the improvement schemes may need extra power supply.

6.1. Long distance wake-up circuit

As has been discussed above, the two stages rectifier can produce a DC voltage of about 220mV with the distance of 40m. This is enough for triggering a micro-power low voltage supervisor. However, in some WSNs based applications, one may need a distance of 100m or more, and the rectifier can not produce a voltage high enough for meeting this requirement. In the literature, two advanced methods were introduced to tackle this problem [16]. One method uses a store-energy radio-triggered circuit where a transformer is used. The disadvantage of this method is that it needs a relatively longer time to realize wake-up since the transformer needs some time to store enough energy. Meanwhile, the size of the transformer is too large, which makes it improper to be used in the WSNs node. Another method uses an amplifier to amplify the DC output signal of the passive radio-triggered wake-up circuit. The amplifier has internal power supply, so it can generate an output signal higher than the input wake-up signal. The disadvantage of this method is that the amplifier still consumes energy when there is no wake-up signal. Typically, an amplifier draws about 1uA, and this is a little high for the WSNs application.

In this chapter, we propose a comparator based long distance wake-up circuit. As we know, a comparator typically draws less current than an amplifier. For example, Linear Technology's LT1540 ultra-low power comparator typically draws 0.3uA current. By adding a comparator to the output of the passive radio-triggered wake-up circuit, the DC voltage can compare with a predefined threshold voltage and produce a high voltage trigger voltage to interrupt the MCU. Compared with the amplifier based approach, the comparator based scheme consumes less energy. Hence, it is a good choice to design long distance wake-up circuit based on a comparator. The block diagram of the long distance radio-triggered wake-up circuit with a comparator is shown in Fig. 17.

Figure 17.

Long distance radio-triggered wake-up circuit with a comparator

In the Fig. 17, the threshold value setting circuit is used to change the working distance of the circuit. A low threshold value can be used to achieve a long working distance. The comparator compares the DC output of the rectifier with the threshold value, and produces a trigger signal to wake up the MCU. The circuit proposed in Fig. 17 can produce a trigger signal with a DC output from the rectifier as low as 10mV. The drawback of this circuit is the extra energy consumed by the comparator and threshold value setting circuit which is about 0.5uA in all. For some applications where very long working distance is required, this method is a good choice.

The most intuitive method is the frequency division multiple address scheme [16], [17]. A set of radio-triggered circuits which work on different frequencies are put on one node, and the network controller sends the wake-up signal on multiple frequencies at the same time. The outputs of the radio-triggered circuits are fed to the AND-gates so that the circuit could only wake up the node when all the corresponding frequencies are present. The shortcoming of this method is that the number of possible addresses is very limited. When using 6 different frequencies, only 64 different nodes can be distinguished. Another disadvantage of this method is that the cost increases significantly with the increase of possible addresses.

In this chapter, we propose a pulse width modulation based addressable wake-up circuit. Compared with the frequency division multiple address scheme, the pulse width modulation scheme may be an economic, simple, and efficient one. With the pulse width modulation scheme, only one frequency channel is required. When the MCU is waked up by the wake-up circuit, it measures the pulse width of the signals, and demodulates the address transmitted by the network controller. The principle of the pulse width modulation scheme is shown in the Fig. 18. The signals '1' and '0' have different pulse width, and the MCU can demodulate the signal simply with the help of an on-chip timer. In the Fig. 18, the waveform of the address of '1010' is also illustrated.

Figure 18.

Principle of the pulse width modulation scheme

The advantage of this scheme is that it is very simple to be deployed in the WSNs node and network controller. There is no need to add any hardware, and the software for realizing the above scheme is so simple. Hence, the pulse width modulation based addressable scheme is an ideal choice for the radio-triggered wake-up circuit.

7. Conclusion and future work

In this chapter, we presented a radio-triggered wake-up circuit and explored its application in the power management of the WSNs. By harvesting energy from the radio signals, the radio-triggered hardware could provide a wake-up signal to the MCU without using power supply, and it takes no more than 30us for the circuit to produce the wake-up signal. The circuit could produce a DC output voltage of 220mV with the received power as low as 1.7uW (-27.7dBm), corresponding to a 40m distance in free-space with 4W radiation source. Meanwhile, we discussed some advanced schemes to improve the wake up distance and to realize the addressable wake-up. Equip with the radio-triggered wake-up circuit, the lifetime of the WSNs node could be prolonged.

It should be mentioned that the radio-triggered wake-up circuit can be used in other applications, such as the synchronization of the WSNs. And we will apply our radio-triggered wake-up circuit to the low duty cycle WSNs to realize the synchronization of the network. Meanwhile, we will explore other possible schemes for transforming the RF signal to DC voltage.

Acknowledgment

This work was supported by National Natural Science Foundation of China under grant numbers 61172058 and the National Hi_Tech Research and Development 863 program of China under grant numbers 2008AA092701. The authors would also like to thank the reviewers for their useful suggestions and comments.

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